2 DXE PCI Segment Library instance layered on top of ESAL services.
4 Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php.
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Protocol/ExtendedSalServiceClasses.h>
19 #include <Library/PciSegmentLib.h>
20 #include <Library/BaseLib.h>
21 #include <Library/DebugLib.h>
22 #include <Library/ExtendedSalLib.h>
25 Assert the validity of a PCI Segment address.
26 A valid PCI Segment address should not contain 1's in bits 31:28
28 @param A The address to validate.
29 @param M Additional bits to assert to be zero.
32 #define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A,M) \
33 ASSERT (((A) & (0xf0000000 | (M))) == 0)
36 Converts a PCI Library Address to a ESAL PCI Service Address.
37 Based on SAL Spec 3.2, there are two SAL PCI Address:
40 Bits 0..7 - Register address
41 Bits 8..10 - Function number
42 Bits 11..15 - Device number
43 Bits 16..23 - Bus number
44 Bits 24..31 - PCI segment group
45 Bits 32..63 - Reserved (0)
48 Bits 0..7 - Register address
49 Bits 8..11 - Extended Register address
50 Bits 12..14 - Function number
51 Bits 15..19 - Device number
52 Bits 20..27 - Bus number
53 Bits 28..43 - PCI segment group
54 Bits 44..63 - Reserved (0)
56 @param A The PCI Library Address to convert.
59 #define CONVERT_PCI_SEGMENT_LIB_ADDRESS_TO_PCI_ESAL_ADDRESS0(Address) (((Address >> 8) & 0xff000000) | (((Address) >> 4) & 0x00ffff00) | ((Address) & 0xff))
60 #define CONVERT_PCI_SEGMENT_LIB_ADDRESS_TO_PCI_ESAL_ADDRESS1(Address) (((Address >> 4) & 0xffff0000000) | ((Address) & 0xfffffff))
63 Check a PCI Library Address is a PCI Compatible Address or not.
65 #define IS_PCI_COMPATIBLE_ADDRESS(Address) (((Address) & 0xf00) == 0)
68 Internal worker function to read a PCI configuration register.
70 This function wraps EsalPciConfigRead function of Extended SAL PCI
72 It reads and returns the PCI configuration register specified by Address,
73 the width of data is specified by Width.
75 @param Address Address that encodes the PCI Bus, Device, Function and
77 @param Width Width of data to read
79 @return The value read from the PCI configuration register.
83 DxePciSegmentLibEsalReadWorker (
88 SAL_RETURN_REGS Return
;
90 if (IS_PCI_COMPATIBLE_ADDRESS(Address
)) {
92 EFI_EXTENDED_SAL_PCI_SERVICES_PROTOCOL_GUID_LO
,
93 EFI_EXTENDED_SAL_PCI_SERVICES_PROTOCOL_GUID_HI
,
94 SalPciConfigReadFunctionId
,
95 CONVERT_PCI_SEGMENT_LIB_ADDRESS_TO_PCI_ESAL_ADDRESS0 (Address
),
97 EFI_SAL_PCI_COMPATIBLE_ADDRESS
,
105 EFI_EXTENDED_SAL_PCI_SERVICES_PROTOCOL_GUID_LO
,
106 EFI_EXTENDED_SAL_PCI_SERVICES_PROTOCOL_GUID_HI
,
107 SalPciConfigReadFunctionId
,
108 CONVERT_PCI_SEGMENT_LIB_ADDRESS_TO_PCI_ESAL_ADDRESS1 (Address
),
110 EFI_SAL_PCI_EXTENDED_REGISTER_ADDRESS
,
118 return (UINT32
) Return
.r9
;
122 Internal worker function to writes a PCI configuration register.
124 This function wraps EsalPciConfigWrite function of Extended SAL PCI
126 It writes the PCI configuration register specified by Address with the
127 value specified by Data. The width of data is specifed by Width.
130 @param Address Address that encodes the PCI Bus, Device, Function and
132 @param Width Width of data to write
133 @param Data The value to write.
135 @return The value written to the PCI configuration register.
139 DxePciSegmentLibEsalWriteWorker (
145 if (IS_PCI_COMPATIBLE_ADDRESS(Address
)) {
147 EFI_EXTENDED_SAL_PCI_SERVICES_PROTOCOL_GUID_LO
,
148 EFI_EXTENDED_SAL_PCI_SERVICES_PROTOCOL_GUID_HI
,
149 SalPciConfigWriteFunctionId
,
150 CONVERT_PCI_SEGMENT_LIB_ADDRESS_TO_PCI_ESAL_ADDRESS0 (Address
),
153 EFI_SAL_PCI_COMPATIBLE_ADDRESS
,
160 EFI_EXTENDED_SAL_PCI_SERVICES_PROTOCOL_GUID_LO
,
161 EFI_EXTENDED_SAL_PCI_SERVICES_PROTOCOL_GUID_HI
,
162 SalPciConfigWriteFunctionId
,
163 CONVERT_PCI_SEGMENT_LIB_ADDRESS_TO_PCI_ESAL_ADDRESS1 (Address
),
166 EFI_SAL_PCI_EXTENDED_REGISTER_ADDRESS
,
177 Reads an 8-bit PCI configuration register.
179 Reads and returns the 8-bit PCI configuration register specified by Address.
180 This function must guarantee that all PCI read and write operations are
183 If any reserved bits in Address are set, then ASSERT().
185 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
188 @return The value read from the PCI configuration register.
197 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 0);
199 return (UINT8
) DxePciSegmentLibEsalReadWorker (Address
, 1);
203 Writes an 8-bit PCI configuration register.
205 Writes the 8-bit PCI configuration register specified by Address with the
206 value specified by Value. Value is returned. This function must guarantee
207 that all PCI read and write operations are serialized.
209 If any reserved bits in Address are set, then ASSERT().
211 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
213 @param Data The value to write.
215 @return The value written to the PCI configuration register.
225 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 0);
227 return (UINT8
) DxePciSegmentLibEsalWriteWorker (Address
, 1, Data
);
231 Performs a bitwise OR of an 8-bit PCI configuration register with
234 Reads the 8-bit PCI configuration register specified by Address, performs a
235 bitwise OR between the read result and the value specified by
236 OrData, and writes the result to the 8-bit PCI configuration register
237 specified by Address. The value written to the PCI configuration register is
238 returned. This function must guarantee that all PCI read and write operations
241 If any reserved bits in Address are set, then ASSERT().
243 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
245 @param OrData The value to OR with the PCI configuration register.
247 @return The value written back to the PCI configuration register.
257 return PciSegmentWrite8 (Address
, (UINT8
) (PciSegmentRead8 (Address
) | OrData
));
261 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
264 Reads the 8-bit PCI configuration register specified by Address, performs a
265 bitwise AND between the read result and the value specified by AndData, and
266 writes the result to the 8-bit PCI configuration register specified by
267 Address. The value written to the PCI configuration register is returned.
268 This function must guarantee that all PCI read and write operations are
271 If any reserved bits in Address are set, then ASSERT().
273 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
275 @param AndData The value to AND with the PCI configuration register.
277 @return The value written back to the PCI configuration register.
287 return PciSegmentWrite8 (Address
, (UINT8
) (PciSegmentRead8 (Address
) & AndData
));
291 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
292 value, followed a bitwise OR with another 8-bit value.
294 Reads the 8-bit PCI configuration register specified by Address, performs a
295 bitwise AND between the read result and the value specified by AndData,
296 performs a bitwise OR between the result of the AND operation and
297 the value specified by OrData, and writes the result to the 8-bit PCI
298 configuration register specified by Address. The value written to the PCI
299 configuration register is returned. This function must guarantee that all PCI
300 read and write operations are serialized.
302 If any reserved bits in Address are set, then ASSERT().
304 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
306 @param AndData The value to AND with the PCI configuration register.
307 @param OrData The value to OR with the result of the AND operation.
309 @return The value written back to the PCI configuration register.
314 PciSegmentAndThenOr8 (
320 return PciSegmentWrite8 (Address
, (UINT8
) ((PciSegmentRead8 (Address
) & AndData
) | OrData
));
324 Reads a bit field of a PCI configuration register.
326 Reads the bit field in an 8-bit PCI configuration register. The bit field is
327 specified by the StartBit and the EndBit. The value of the bit field is
330 If any reserved bits in Address are set, then ASSERT().
331 If StartBit is greater than 7, then ASSERT().
332 If EndBit is greater than 7, then ASSERT().
333 If EndBit is less than StartBit, then ASSERT().
335 @param Address PCI configuration register to read.
336 @param StartBit The ordinal of the least significant bit in the bit field.
338 @param EndBit The ordinal of the most significant bit in the bit field.
341 @return The value of the bit field read from the PCI configuration register.
346 PciSegmentBitFieldRead8 (
352 return BitFieldRead8 (PciSegmentRead8 (Address
), StartBit
, EndBit
);
356 Writes a bit field to a PCI configuration register.
358 Writes Value to the bit field of the PCI configuration register. The bit
359 field is specified by the StartBit and the EndBit. All other bits in the
360 destination PCI configuration register are preserved. The new value of the
361 8-bit register is returned.
363 If any reserved bits in Address are set, then ASSERT().
364 If StartBit is greater than 7, then ASSERT().
365 If EndBit is greater than 7, then ASSERT().
366 If EndBit is less than StartBit, then ASSERT().
368 @param Address PCI configuration register to write.
369 @param StartBit The ordinal of the least significant bit in the bit field.
371 @param EndBit The ordinal of the most significant bit in the bit field.
373 @param Value New value of the bit field.
375 @return The value written back to the PCI configuration register.
380 PciSegmentBitFieldWrite8 (
387 return PciSegmentWrite8 (
389 BitFieldWrite8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, Value
)
394 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
395 writes the result back to the bit field in the 8-bit port.
397 Reads the 8-bit PCI configuration register specified by Address, performs a
398 bitwise OR between the read result and the value specified by
399 OrData, and writes the result to the 8-bit PCI configuration register
400 specified by Address. The value written to the PCI configuration register is
401 returned. This function must guarantee that all PCI read and write operations
402 are serialized. Extra left bits in OrData are stripped.
404 If any reserved bits in Address are set, then ASSERT().
405 If StartBit is greater than 7, then ASSERT().
406 If EndBit is greater than 7, then ASSERT().
407 If EndBit is less than StartBit, then ASSERT().
409 @param Address PCI configuration register to write.
410 @param StartBit The ordinal of the least significant bit in the bit field.
412 @param EndBit The ordinal of the most significant bit in the bit field.
414 @param OrData The value to OR with the PCI configuration register.
416 @return The value written back to the PCI configuration register.
421 PciSegmentBitFieldOr8 (
428 return PciSegmentWrite8 (
430 BitFieldOr8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, OrData
)
435 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
436 AND, and writes the result back to the bit field in the 8-bit register.
438 Reads the 8-bit PCI configuration register specified by Address, performs a
439 bitwise AND between the read result and the value specified by AndData, and
440 writes the result to the 8-bit PCI configuration register specified by
441 Address. The value written to the PCI configuration register is returned.
442 This function must guarantee that all PCI read and write operations are
443 serialized. Extra left bits in AndData are stripped.
445 If any reserved bits in Address are set, then ASSERT().
446 If StartBit is greater than 7, then ASSERT().
447 If EndBit is greater than 7, then ASSERT().
448 If EndBit is less than StartBit, then ASSERT().
450 @param Address PCI configuration register to write.
451 @param StartBit The ordinal of the least significant bit in the bit field.
453 @param EndBit The ordinal of the most significant bit in the bit field.
455 @param AndData The value to AND with the PCI configuration register.
457 @return The value written back to the PCI configuration register.
462 PciSegmentBitFieldAnd8 (
469 return PciSegmentWrite8 (
471 BitFieldAnd8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, AndData
)
476 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
477 bitwise OR, and writes the result back to the bit field in the
480 Reads the 8-bit PCI configuration register specified by Address, performs a
481 bitwise AND followed by a bitwise OR between the read result and
482 the value specified by AndData, and writes the result to the 8-bit PCI
483 configuration register specified by Address. The value written to the PCI
484 configuration register is returned. This function must guarantee that all PCI
485 read and write operations are serialized. Extra left bits in both AndData and
488 If any reserved bits in Address are set, then ASSERT().
489 If StartBit is greater than 7, then ASSERT().
490 If EndBit is greater than 7, then ASSERT().
491 If EndBit is less than StartBit, then ASSERT().
493 @param Address PCI configuration register to write.
494 @param StartBit The ordinal of the least significant bit in the bit field.
496 @param EndBit The ordinal of the most significant bit in the bit field.
498 @param AndData The value to AND with the PCI configuration register.
499 @param OrData The value to OR with the result of the AND operation.
501 @return The value written back to the PCI configuration register.
506 PciSegmentBitFieldAndThenOr8 (
514 return PciSegmentWrite8 (
516 BitFieldAndThenOr8 (PciSegmentRead8 (Address
), StartBit
, EndBit
, AndData
, OrData
)
521 Reads a 16-bit PCI configuration register.
523 Reads and returns the 16-bit PCI configuration register specified by Address.
524 This function must guarantee that all PCI read and write operations are
527 If any reserved bits in Address are set, then ASSERT().
529 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
532 @return The value read from the PCI configuration register.
541 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 1);
543 return (UINT16
) DxePciSegmentLibEsalReadWorker (Address
, 2);
547 Writes a 16-bit PCI configuration register.
549 Writes the 16-bit PCI configuration register specified by Address with the
550 value specified by Value. Value is returned. This function must guarantee
551 that all PCI read and write operations are serialized.
553 If any reserved bits in Address are set, then ASSERT().
555 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
557 @param Data The value to write.
559 @return The value written to the PCI configuration register.
569 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 1);
571 return (UINT16
) DxePciSegmentLibEsalWriteWorker (Address
, 2, Data
);
575 Performs a bitwise OR of a 16-bit PCI configuration register with
578 Reads the 16-bit PCI configuration register specified by Address, performs a
579 bitwise OR between the read result and the value specified by
580 OrData, and writes the result to the 16-bit PCI configuration register
581 specified by Address. The value written to the PCI configuration register is
582 returned. This function must guarantee that all PCI read and write operations
585 If any reserved bits in Address are set, then ASSERT().
587 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
589 @param OrData The value to OR with the PCI configuration register.
591 @return The value written back to the PCI configuration register.
601 return PciSegmentWrite16 (Address
, (UINT16
) (PciSegmentRead16 (Address
) | OrData
));
605 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
608 Reads the 16-bit PCI configuration register specified by Address, performs a
609 bitwise AND between the read result and the value specified by AndData, and
610 writes the result to the 16-bit PCI configuration register specified by
611 Address. The value written to the PCI configuration register is returned.
612 This function must guarantee that all PCI read and write operations are
615 If any reserved bits in Address are set, then ASSERT().
617 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
619 @param AndData The value to AND with the PCI configuration register.
621 @return The value written back to the PCI configuration register.
631 return PciSegmentWrite16 (Address
, (UINT16
) (PciSegmentRead16 (Address
) & AndData
));
635 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
636 value, followed a bitwise OR with another 16-bit value.
638 Reads the 16-bit PCI configuration register specified by Address, performs a
639 bitwise AND between the read result and the value specified by AndData,
640 performs a bitwise OR between the result of the AND operation and
641 the value specified by OrData, and writes the result to the 16-bit PCI
642 configuration register specified by Address. The value written to the PCI
643 configuration register is returned. This function must guarantee that all PCI
644 read and write operations are serialized.
646 If any reserved bits in Address are set, then ASSERT().
648 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
650 @param AndData The value to AND with the PCI configuration register.
651 @param OrData The value to OR with the result of the AND operation.
653 @return The value written back to the PCI configuration register.
658 PciSegmentAndThenOr16 (
664 return PciSegmentWrite16 (Address
, (UINT16
) ((PciSegmentRead16 (Address
) & AndData
) | OrData
));
668 Reads a bit field of a PCI configuration register.
670 Reads the bit field in a 16-bit PCI configuration register. The bit field is
671 specified by the StartBit and the EndBit. The value of the bit field is
674 If any reserved bits in Address are set, then ASSERT().
675 If StartBit is greater than 15, then ASSERT().
676 If EndBit is greater than 15, then ASSERT().
677 If EndBit is less than StartBit, then ASSERT().
679 @param Address PCI configuration register to read.
680 @param StartBit The ordinal of the least significant bit in the bit field.
682 @param EndBit The ordinal of the most significant bit in the bit field.
685 @return The value of the bit field read from the PCI configuration register.
690 PciSegmentBitFieldRead16 (
696 return BitFieldRead16 (PciSegmentRead16 (Address
), StartBit
, EndBit
);
700 Writes a bit field to a PCI configuration register.
702 Writes Value to the bit field of the PCI configuration register. The bit
703 field is specified by the StartBit and the EndBit. All other bits in the
704 destination PCI configuration register are preserved. The new value of the
705 16-bit register is returned.
707 If any reserved bits in Address are set, then ASSERT().
708 If StartBit is greater than 15, then ASSERT().
709 If EndBit is greater than 15, then ASSERT().
710 If EndBit is less than StartBit, then ASSERT().
712 @param Address PCI configuration register to write.
713 @param StartBit The ordinal of the least significant bit in the bit field.
715 @param EndBit The ordinal of the most significant bit in the bit field.
717 @param Value New value of the bit field.
719 @return The value written back to the PCI configuration register.
724 PciSegmentBitFieldWrite16 (
731 return PciSegmentWrite16 (
733 BitFieldWrite16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, Value
)
738 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
739 writes the result back to the bit field in the 16-bit port.
741 Reads the 16-bit PCI configuration register specified by Address, performs a
742 bitwise OR between the read result and the value specified by
743 OrData, and writes the result to the 16-bit PCI configuration register
744 specified by Address. The value written to the PCI configuration register is
745 returned. This function must guarantee that all PCI read and write operations
746 are serialized. Extra left bits in OrData are stripped.
748 If any reserved bits in Address are set, then ASSERT().
749 If StartBit is greater than 15, then ASSERT().
750 If EndBit is greater than 15, then ASSERT().
751 If EndBit is less than StartBit, then ASSERT().
753 @param Address PCI configuration register to write.
754 @param StartBit The ordinal of the least significant bit in the bit field.
756 @param EndBit The ordinal of the most significant bit in the bit field.
758 @param OrData The value to OR with the PCI configuration register.
760 @return The value written back to the PCI configuration register.
765 PciSegmentBitFieldOr16 (
772 return PciSegmentWrite16 (
774 BitFieldOr16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, OrData
)
779 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
780 AND, and writes the result back to the bit field in the 16-bit register.
782 Reads the 16-bit PCI configuration register specified by Address, performs a
783 bitwise AND between the read result and the value specified by AndData, and
784 writes the result to the 16-bit PCI configuration register specified by
785 Address. The value written to the PCI configuration register is returned.
786 This function must guarantee that all PCI read and write operations are
787 serialized. Extra left bits in AndData are stripped.
789 If any reserved bits in Address are set, then ASSERT().
790 If StartBit is greater than 15, then ASSERT().
791 If EndBit is greater than 15, then ASSERT().
792 If EndBit is less than StartBit, then ASSERT().
794 @param Address PCI configuration register to write.
795 @param StartBit The ordinal of the least significant bit in the bit field.
797 @param EndBit The ordinal of the most significant bit in the bit field.
799 @param AndData The value to AND with the PCI configuration register.
801 @return The value written back to the PCI configuration register.
806 PciSegmentBitFieldAnd16 (
813 return PciSegmentWrite16 (
815 BitFieldAnd16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, AndData
)
820 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
821 bitwise OR, and writes the result back to the bit field in the
824 Reads the 16-bit PCI configuration register specified by Address, performs a
825 bitwise AND followed by a bitwise OR between the read result and
826 the value specified by AndData, and writes the result to the 16-bit PCI
827 configuration register specified by Address. The value written to the PCI
828 configuration register is returned. This function must guarantee that all PCI
829 read and write operations are serialized. Extra left bits in both AndData and
832 If any reserved bits in Address are set, then ASSERT().
833 If StartBit is greater than 15, then ASSERT().
834 If EndBit is greater than 15, then ASSERT().
835 If EndBit is less than StartBit, then ASSERT().
837 @param Address PCI configuration register to write.
838 @param StartBit The ordinal of the least significant bit in the bit field.
840 @param EndBit The ordinal of the most significant bit in the bit field.
842 @param AndData The value to AND with the PCI configuration register.
843 @param OrData The value to OR with the result of the AND operation.
845 @return The value written back to the PCI configuration register.
850 PciSegmentBitFieldAndThenOr16 (
858 return PciSegmentWrite16 (
860 BitFieldAndThenOr16 (PciSegmentRead16 (Address
), StartBit
, EndBit
, AndData
, OrData
)
865 Reads a 32-bit PCI configuration register.
867 Reads and returns the 32-bit PCI configuration register specified by Address.
868 This function must guarantee that all PCI read and write operations are
871 If any reserved bits in Address are set, then ASSERT().
873 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
876 @return The value read from the PCI configuration register.
885 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 3);
887 return DxePciSegmentLibEsalReadWorker (Address
, 4);
891 Writes a 32-bit PCI configuration register.
893 Writes the 32-bit PCI configuration register specified by Address with the
894 value specified by Value. Value is returned. This function must guarantee
895 that all PCI read and write operations are serialized.
897 If any reserved bits in Address are set, then ASSERT().
899 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
901 @param Data The value to write.
903 @return The value written to the PCI configuration register.
913 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address
, 3);
915 return DxePciSegmentLibEsalWriteWorker (Address
, 4, Data
);
919 Performs a bitwise OR of a 32-bit PCI configuration register with
922 Reads the 32-bit PCI configuration register specified by Address, performs a
923 bitwise OR between the read result and the value specified by
924 OrData, and writes the result to the 32-bit PCI configuration register
925 specified by Address. The value written to the PCI configuration register is
926 returned. This function must guarantee that all PCI read and write operations
929 If any reserved bits in Address are set, then ASSERT().
931 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
933 @param OrData The value to OR with the PCI configuration register.
935 @return The value written back to the PCI configuration register.
945 return PciSegmentWrite32 (Address
, PciSegmentRead32 (Address
) | OrData
);
949 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
952 Reads the 32-bit PCI configuration register specified by Address, performs a
953 bitwise AND between the read result and the value specified by AndData, and
954 writes the result to the 32-bit PCI configuration register specified by
955 Address. The value written to the PCI configuration register is returned.
956 This function must guarantee that all PCI read and write operations are
959 If any reserved bits in Address are set, then ASSERT().
961 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
963 @param AndData The value to AND with the PCI configuration register.
965 @return The value written back to the PCI configuration register.
975 return PciSegmentWrite32 (Address
, PciSegmentRead32 (Address
) & AndData
);
979 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
980 value, followed a bitwise OR with another 32-bit value.
982 Reads the 32-bit PCI configuration register specified by Address, performs a
983 bitwise AND between the read result and the value specified by AndData,
984 performs a bitwise OR between the result of the AND operation and
985 the value specified by OrData, and writes the result to the 32-bit PCI
986 configuration register specified by Address. The value written to the PCI
987 configuration register is returned. This function must guarantee that all PCI
988 read and write operations are serialized.
990 If any reserved bits in Address are set, then ASSERT().
992 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
994 @param AndData The value to AND with the PCI configuration register.
995 @param OrData The value to OR with the result of the AND operation.
997 @return The value written back to the PCI configuration register.
1002 PciSegmentAndThenOr32 (
1008 return PciSegmentWrite32 (Address
, (PciSegmentRead32 (Address
) & AndData
) | OrData
);
1012 Reads a bit field of a PCI configuration register.
1014 Reads the bit field in a 32-bit PCI configuration register. The bit field is
1015 specified by the StartBit and the EndBit. The value of the bit field is
1018 If any reserved bits in Address are set, then ASSERT().
1019 If StartBit is greater than 31, then ASSERT().
1020 If EndBit is greater than 31, then ASSERT().
1021 If EndBit is less than StartBit, then ASSERT().
1023 @param Address PCI configuration register to read.
1024 @param StartBit The ordinal of the least significant bit in the bit field.
1026 @param EndBit The ordinal of the most significant bit in the bit field.
1029 @return The value of the bit field read from the PCI configuration register.
1034 PciSegmentBitFieldRead32 (
1040 return BitFieldRead32 (PciSegmentRead32 (Address
), StartBit
, EndBit
);
1044 Writes a bit field to a PCI configuration register.
1046 Writes Value to the bit field of the PCI configuration register. The bit
1047 field is specified by the StartBit and the EndBit. All other bits in the
1048 destination PCI configuration register are preserved. The new value of the
1049 32-bit register is returned.
1051 If any reserved bits in Address are set, then ASSERT().
1052 If StartBit is greater than 31, then ASSERT().
1053 If EndBit is greater than 31, then ASSERT().
1054 If EndBit is less than StartBit, then ASSERT().
1056 @param Address PCI configuration register to write.
1057 @param StartBit The ordinal of the least significant bit in the bit field.
1059 @param EndBit The ordinal of the most significant bit in the bit field.
1061 @param Value New value of the bit field.
1063 @return The value written back to the PCI configuration register.
1068 PciSegmentBitFieldWrite32 (
1075 return PciSegmentWrite32 (
1077 BitFieldWrite32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, Value
)
1082 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
1083 writes the result back to the bit field in the 32-bit port.
1085 Reads the 32-bit PCI configuration register specified by Address, performs a
1086 bitwise OR between the read result and the value specified by
1087 OrData, and writes the result to the 32-bit PCI configuration register
1088 specified by Address. The value written to the PCI configuration register is
1089 returned. This function must guarantee that all PCI read and write operations
1090 are serialized. Extra left bits in OrData are stripped.
1092 If any reserved bits in Address are set, then ASSERT().
1093 If StartBit is greater than 31, then ASSERT().
1094 If EndBit is greater than 31, then ASSERT().
1095 If EndBit is less than StartBit, then ASSERT().
1097 @param Address PCI configuration register to write.
1098 @param StartBit The ordinal of the least significant bit in the bit field.
1100 @param EndBit The ordinal of the most significant bit in the bit field.
1102 @param OrData The value to OR with the PCI configuration register.
1104 @return The value written back to the PCI configuration register.
1109 PciSegmentBitFieldOr32 (
1116 return PciSegmentWrite32 (
1118 BitFieldOr32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, OrData
)
1123 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
1124 AND, and writes the result back to the bit field in the 32-bit register.
1126 Reads the 32-bit PCI configuration register specified by Address, performs a
1127 bitwise AND between the read result and the value specified by AndData, and
1128 writes the result to the 32-bit PCI configuration register specified by
1129 Address. The value written to the PCI configuration register is returned.
1130 This function must guarantee that all PCI read and write operations are
1131 serialized. Extra left bits in AndData are stripped.
1133 If any reserved bits in Address are set, then ASSERT().
1134 If StartBit is greater than 31, then ASSERT().
1135 If EndBit is greater than 31, then ASSERT().
1136 If EndBit is less than StartBit, then ASSERT().
1138 @param Address PCI configuration register to write.
1139 @param StartBit The ordinal of the least significant bit in the bit field.
1141 @param EndBit The ordinal of the most significant bit in the bit field.
1143 @param AndData The value to AND with the PCI configuration register.
1145 @return The value written back to the PCI configuration register.
1150 PciSegmentBitFieldAnd32 (
1157 return PciSegmentWrite32 (
1159 BitFieldAnd32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, AndData
)
1164 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1165 bitwise OR, and writes the result back to the bit field in the
1168 Reads the 32-bit PCI configuration register specified by Address, performs a
1169 bitwise AND followed by a bitwise OR between the read result and
1170 the value specified by AndData, and writes the result to the 32-bit PCI
1171 configuration register specified by Address. The value written to the PCI
1172 configuration register is returned. This function must guarantee that all PCI
1173 read and write operations are serialized. Extra left bits in both AndData and
1174 OrData are stripped.
1176 If any reserved bits in Address are set, then ASSERT().
1177 If StartBit is greater than 31, then ASSERT().
1178 If EndBit is greater than 31, then ASSERT().
1179 If EndBit is less than StartBit, then ASSERT().
1181 @param Address PCI configuration register to write.
1182 @param StartBit The ordinal of the least significant bit in the bit field.
1184 @param EndBit The ordinal of the most significant bit in the bit field.
1186 @param AndData The value to AND with the PCI configuration register.
1187 @param OrData The value to OR with the result of the AND operation.
1189 @return The value written back to the PCI configuration register.
1194 PciSegmentBitFieldAndThenOr32 (
1202 return PciSegmentWrite32 (
1204 BitFieldAndThenOr32 (PciSegmentRead32 (Address
), StartBit
, EndBit
, AndData
, OrData
)
1209 Reads a range of PCI configuration registers into a caller supplied buffer.
1211 Reads the range of PCI configuration registers specified by StartAddress and
1212 Size into the buffer specified by Buffer. This function only allows the PCI
1213 configuration registers from a single PCI function to be read. Size is
1214 returned. When possible 32-bit PCI configuration read cycles are used to read
1215 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1216 and 16-bit PCI configuration read cycles may be used at the beginning and the
1219 If StartAddress > 0x0FFFFFFF, then ASSERT().
1220 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1221 If Size > 0 and Buffer is NULL, then ASSERT().
1223 @param StartAddress Starting Address that encodes the PCI Segment, Bus, Device,
1224 Function and Register.
1225 @param Size Size in bytes of the transfer.
1226 @param Buffer Pointer to a buffer receiving the data read.
1233 PciSegmentReadBuffer (
1234 IN UINT64 StartAddress
,
1241 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress
, 0);
1242 ASSERT (((StartAddress
& 0xFFF) + Size
) <= 0x1000);
1248 ASSERT (Buffer
!= NULL
);
1251 // Save Size for return
1255 if ((StartAddress
& 1) != 0) {
1257 // Read a byte if StartAddress is byte aligned
1259 *(volatile UINT8
*)Buffer
= PciSegmentRead8 (StartAddress
);
1260 StartAddress
+= sizeof (UINT8
);
1261 Size
-= sizeof (UINT8
);
1262 Buffer
= (UINT8
*)Buffer
+ 1;
1265 if (Size
>= sizeof (UINT16
) && (StartAddress
& 2) != 0) {
1267 // Read a word if StartAddress is word aligned
1269 *(volatile UINT16
*)Buffer
= PciSegmentRead16 (StartAddress
);
1270 StartAddress
+= sizeof (UINT16
);
1271 Size
-= sizeof (UINT16
);
1272 Buffer
= (UINT16
*)Buffer
+ 1;
1275 while (Size
>= sizeof (UINT32
)) {
1277 // Read as many double words as possible
1279 *(volatile UINT32
*)Buffer
= PciSegmentRead32 (StartAddress
);
1280 StartAddress
+= sizeof (UINT32
);
1281 Size
-= sizeof (UINT32
);
1282 Buffer
= (UINT32
*)Buffer
+ 1;
1285 if (Size
>= sizeof (UINT16
)) {
1287 // Read the last remaining word if exist
1289 *(volatile UINT16
*)Buffer
= PciSegmentRead16 (StartAddress
);
1290 StartAddress
+= sizeof (UINT16
);
1291 Size
-= sizeof (UINT16
);
1292 Buffer
= (UINT16
*)Buffer
+ 1;
1295 if (Size
>= sizeof (UINT8
)) {
1297 // Read the last remaining byte if exist
1299 *(volatile UINT8
*)Buffer
= PciSegmentRead8 (StartAddress
);
1306 Copies the data in a caller supplied buffer to a specified range of PCI
1307 configuration space.
1309 Writes the range of PCI configuration registers specified by StartAddress and
1310 Size from the buffer specified by Buffer. This function only allows the PCI
1311 configuration registers from a single PCI function to be written. Size is
1312 returned. When possible 32-bit PCI configuration write cycles are used to
1313 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1314 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1315 and the end of the range.
1317 If StartAddress > 0x0FFFFFFF, then ASSERT().
1318 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1319 If Size > 0 and Buffer is NULL, then ASSERT().
1321 @param StartAddress Starting Address that encodes the PCI Segment, Bus, Device,
1322 Function and Register.
1323 @param Size Size in bytes of the transfer.
1324 @param Buffer Pointer to a buffer containing the data to write.
1331 PciSegmentWriteBuffer (
1332 IN UINT64 StartAddress
,
1339 ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress
, 0);
1340 ASSERT (((StartAddress
& 0xFFF) + Size
) <= 0x1000);
1346 ASSERT (Buffer
!= NULL
);
1349 // Save Size for return
1353 if ((StartAddress
& 1) != 0) {
1355 // Write a byte if StartAddress is byte aligned
1357 PciSegmentWrite8 (StartAddress
, *(UINT8
*)Buffer
);
1358 StartAddress
+= sizeof (UINT8
);
1359 Size
-= sizeof (UINT8
);
1360 Buffer
= (UINT8
*)Buffer
+ 1;
1363 if (Size
>= sizeof (UINT16
) && (StartAddress
& 2) != 0) {
1365 // Write a word if StartAddress is word aligned
1367 PciSegmentWrite16 (StartAddress
, *(UINT16
*)Buffer
);
1368 StartAddress
+= sizeof (UINT16
);
1369 Size
-= sizeof (UINT16
);
1370 Buffer
= (UINT16
*)Buffer
+ 1;
1373 while (Size
>= sizeof (UINT32
)) {
1375 // Write as many double words as possible
1377 PciSegmentWrite32 (StartAddress
, *(UINT32
*)Buffer
);
1378 StartAddress
+= sizeof (UINT32
);
1379 Size
-= sizeof (UINT32
);
1380 Buffer
= (UINT32
*)Buffer
+ 1;
1383 if (Size
>= sizeof (UINT16
)) {
1385 // Write the last remaining word if exist
1387 PciSegmentWrite16 (StartAddress
, *(UINT16
*)Buffer
);
1388 StartAddress
+= sizeof (UINT16
);
1389 Size
-= sizeof (UINT16
);
1390 Buffer
= (UINT16
*)Buffer
+ 1;
1393 if (Size
>= sizeof (UINT8
)) {
1395 // Write the last remaining byte if exist
1397 PciSegmentWrite8 (StartAddress
, *(UINT8
*)Buffer
);