2 Provide common routines used by BasePciSegmentLibSegmentInfo and
3 DxeRuntimePciSegmentLibSegmentInfo libraries.
5 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
10 #include "PciSegmentLibCommon.h"
19 UINT32 Reserved2
: 16;
20 } PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
;
23 Internal function that converts PciSegmentLib format address that encodes the PCI Bus, Device,
24 Function and Register to ECAM (Enhanced Configuration Access Mechanism) address.
26 @param Address The address that encodes the PCI Bus, Device, Function and
28 @param SegmentInfo An array of PCI_SEGMENT_INFO holding the segment information.
29 @param Count Number of segments.
34 PciSegmentLibGetEcamAddress (
36 IN CONST PCI_SEGMENT_INFO
*SegmentInfo
,
41 if (SegmentInfo
->SegmentNumber
== ((PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
*)&Address
)->Segment
) {
51 (((PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
*)&Address
)->Reserved1
== 0) &&
52 (((PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
*)&Address
)->Reserved2
== 0)
54 ASSERT (((PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
*)&Address
)->Bus
>= SegmentInfo
->StartBusNumber
);
55 ASSERT (((PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
*)&Address
)->Bus
<= SegmentInfo
->EndBusNumber
);
57 Address
= SegmentInfo
->BaseAddress
+ PCI_ECAM_ADDRESS (
58 ((PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
*)&Address
)->Bus
,
59 ((PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
*)&Address
)->Device
,
60 ((PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
*)&Address
)->Function
,
61 ((PCI_SEGMENT_LIB_ADDRESS_STRUCTURE
*)&Address
)->Register
64 if (sizeof (UINTN
) == sizeof (UINT32
)) {
65 ASSERT (Address
< BASE_4GB
);
68 return PciSegmentLibVirtualAddress ((UINTN
)Address
);
72 Reads an 8-bit PCI configuration register.
74 Reads and returns the 8-bit PCI configuration register specified by Address.
75 This function must guarantee that all PCI read and write operations are serialized.
77 If any reserved bits in Address are set, then ASSERT().
79 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
81 @return The 8-bit PCI configuration register specified by Address.
91 PCI_SEGMENT_INFO
*SegmentInfo
;
93 SegmentInfo
= GetPciSegmentInfo (&Count
);
94 return MmioRead8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
));
98 Writes an 8-bit PCI configuration register.
100 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
101 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
103 If any reserved bits in Address are set, then ASSERT().
105 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
106 @param Value The value to write.
108 @return The value written to the PCI configuration register.
119 PCI_SEGMENT_INFO
*SegmentInfo
;
121 SegmentInfo
= GetPciSegmentInfo (&Count
);
122 return MmioWrite8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), Value
);
126 Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value.
128 Reads the 8-bit PCI configuration register specified by Address,
129 performs a bitwise OR between the read result and the value specified by OrData,
130 and writes the result to the 8-bit PCI configuration register specified by Address.
131 The value written to the PCI configuration register is returned.
132 This function must guarantee that all PCI read and write operations are serialized.
134 If any reserved bits in Address are set, then ASSERT().
136 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
137 @param OrData The value to OR with the PCI configuration register.
139 @return The value written to the PCI configuration register.
150 PCI_SEGMENT_INFO
*SegmentInfo
;
152 SegmentInfo
= GetPciSegmentInfo (&Count
);
153 return MmioOr8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), OrData
);
157 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.
159 Reads the 8-bit PCI configuration register specified by Address,
160 performs a bitwise AND between the read result and the value specified by AndData,
161 and writes the result to the 8-bit PCI configuration register specified by Address.
162 The value written to the PCI configuration register is returned.
163 This function must guarantee that all PCI read and write operations are serialized.
164 If any reserved bits in Address are set, then ASSERT().
166 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
167 @param AndData The value to AND with the PCI configuration register.
169 @return The value written to the PCI configuration register.
180 PCI_SEGMENT_INFO
*SegmentInfo
;
182 SegmentInfo
= GetPciSegmentInfo (&Count
);
183 return MmioAnd8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), AndData
);
187 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
188 followed a bitwise OR with another 8-bit value.
190 Reads the 8-bit PCI configuration register specified by Address,
191 performs a bitwise AND between the read result and the value specified by AndData,
192 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
193 and writes the result to the 8-bit PCI configuration register specified by Address.
194 The value written to the PCI configuration register is returned.
195 This function must guarantee that all PCI read and write operations are serialized.
197 If any reserved bits in Address are set, then ASSERT().
199 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
200 @param AndData The value to AND with the PCI configuration register.
201 @param OrData The value to OR with the PCI configuration register.
203 @return The value written to the PCI configuration register.
208 PciSegmentAndThenOr8 (
215 PCI_SEGMENT_INFO
*SegmentInfo
;
217 SegmentInfo
= GetPciSegmentInfo (&Count
);
218 return MmioAndThenOr8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), AndData
, OrData
);
222 Reads a bit field of a PCI configuration register.
224 Reads the bit field in an 8-bit PCI configuration register. The bit field is
225 specified by the StartBit and the EndBit. The value of the bit field is
228 If any reserved bits in Address are set, then ASSERT().
229 If StartBit is greater than 7, then ASSERT().
230 If EndBit is greater than 7, then ASSERT().
231 If EndBit is less than StartBit, then ASSERT().
233 @param Address PCI configuration register to read.
234 @param StartBit The ordinal of the least significant bit in the bit field.
236 @param EndBit The ordinal of the most significant bit in the bit field.
239 @return The value of the bit field read from the PCI configuration register.
244 PciSegmentBitFieldRead8 (
251 PCI_SEGMENT_INFO
*SegmentInfo
;
253 SegmentInfo
= GetPciSegmentInfo (&Count
);
254 return MmioBitFieldRead8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
);
258 Writes a bit field to a PCI configuration register.
260 Writes Value to the bit field of the PCI configuration register. The bit
261 field is specified by the StartBit and the EndBit. All other bits in the
262 destination PCI configuration register are preserved. The new value of the
263 8-bit register is returned.
265 If any reserved bits in Address are set, then ASSERT().
266 If StartBit is greater than 7, then ASSERT().
267 If EndBit is greater than 7, then ASSERT().
268 If EndBit is less than StartBit, then ASSERT().
269 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
271 @param Address PCI configuration register to write.
272 @param StartBit The ordinal of the least significant bit in the bit field.
274 @param EndBit The ordinal of the most significant bit in the bit field.
276 @param Value New value of the bit field.
278 @return The value written back to the PCI configuration register.
283 PciSegmentBitFieldWrite8 (
291 PCI_SEGMENT_INFO
*SegmentInfo
;
293 SegmentInfo
= GetPciSegmentInfo (&Count
);
294 return MmioBitFieldWrite8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, Value
);
298 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
299 writes the result back to the bit field in the 8-bit port.
301 Reads the 8-bit PCI configuration register specified by Address, performs a
302 bitwise OR between the read result and the value specified by
303 OrData, and writes the result to the 8-bit PCI configuration register
304 specified by Address. The value written to the PCI configuration register is
305 returned. This function must guarantee that all PCI read and write operations
306 are serialized. Extra left bits in OrData are stripped.
308 If any reserved bits in Address are set, then ASSERT().
309 If StartBit is greater than 7, then ASSERT().
310 If EndBit is greater than 7, then ASSERT().
311 If EndBit is less than StartBit, then ASSERT().
312 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
314 @param Address PCI configuration register to write.
315 @param StartBit The ordinal of the least significant bit in the bit field.
317 @param EndBit The ordinal of the most significant bit in the bit field.
319 @param OrData The value to OR with the PCI configuration register.
321 @return The value written back to the PCI configuration register.
326 PciSegmentBitFieldOr8 (
334 PCI_SEGMENT_INFO
*SegmentInfo
;
336 SegmentInfo
= GetPciSegmentInfo (&Count
);
337 return MmioBitFieldOr8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, OrData
);
341 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
342 AND, and writes the result back to the bit field in the 8-bit register.
344 Reads the 8-bit PCI configuration register specified by Address, performs a
345 bitwise AND between the read result and the value specified by AndData, and
346 writes the result to the 8-bit PCI configuration register specified by
347 Address. The value written to the PCI configuration register is returned.
348 This function must guarantee that all PCI read and write operations are
349 serialized. Extra left bits in AndData are stripped.
351 If any reserved bits in Address are set, then ASSERT().
352 If StartBit is greater than 7, then ASSERT().
353 If EndBit is greater than 7, then ASSERT().
354 If EndBit is less than StartBit, then ASSERT().
355 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
357 @param Address PCI configuration register to write.
358 @param StartBit The ordinal of the least significant bit in the bit field.
360 @param EndBit The ordinal of the most significant bit in the bit field.
362 @param AndData The value to AND with the PCI configuration register.
364 @return The value written back to the PCI configuration register.
369 PciSegmentBitFieldAnd8 (
377 PCI_SEGMENT_INFO
*SegmentInfo
;
379 SegmentInfo
= GetPciSegmentInfo (&Count
);
380 return MmioBitFieldAnd8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, AndData
);
384 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
385 bitwise OR, and writes the result back to the bit field in the 8-bit port.
387 Reads the 8-bit PCI configuration register specified by Address, performs a
388 bitwise AND followed by a bitwise OR between the read result and
389 the value specified by AndData, and writes the result to the 8-bit PCI
390 configuration register specified by Address. The value written to the PCI
391 configuration register is returned. This function must guarantee that all PCI
392 read and write operations are serialized. Extra left bits in both AndData and
395 If any reserved bits in Address are set, then ASSERT().
396 If StartBit is greater than 7, then ASSERT().
397 If EndBit is greater than 7, then ASSERT().
398 If EndBit is less than StartBit, then ASSERT().
399 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
400 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
402 @param Address PCI configuration register to write.
403 @param StartBit The ordinal of the least significant bit in the bit field.
405 @param EndBit The ordinal of the most significant bit in the bit field.
407 @param AndData The value to AND with the PCI configuration register.
408 @param OrData The value to OR with the result of the AND operation.
410 @return The value written back to the PCI configuration register.
415 PciSegmentBitFieldAndThenOr8 (
424 PCI_SEGMENT_INFO
*SegmentInfo
;
426 SegmentInfo
= GetPciSegmentInfo (&Count
);
427 return MmioBitFieldAndThenOr8 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, AndData
, OrData
);
431 Reads a 16-bit PCI configuration register.
433 Reads and returns the 16-bit PCI configuration register specified by Address.
434 This function must guarantee that all PCI read and write operations are serialized.
436 If any reserved bits in Address are set, then ASSERT().
437 If Address is not aligned on a 16-bit boundary, then ASSERT().
439 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
441 @return The 16-bit PCI configuration register specified by Address.
451 PCI_SEGMENT_INFO
*SegmentInfo
;
453 SegmentInfo
= GetPciSegmentInfo (&Count
);
454 return MmioRead16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
));
458 Writes a 16-bit PCI configuration register.
460 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
461 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
463 If any reserved bits in Address are set, then ASSERT().
464 If Address is not aligned on a 16-bit boundary, then ASSERT().
466 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
467 @param Value The value to write.
469 @return The parameter of Value.
480 PCI_SEGMENT_INFO
*SegmentInfo
;
482 SegmentInfo
= GetPciSegmentInfo (&Count
);
483 return MmioWrite16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), Value
);
487 Performs a bitwise OR of a 16-bit PCI configuration register with
490 Reads the 16-bit PCI configuration register specified by Address, performs a
491 bitwise OR between the read result and the value specified by OrData, and
492 writes the result to the 16-bit PCI configuration register specified by Address.
493 The value written to the PCI configuration register is returned. This function
494 must guarantee that all PCI read and write operations are serialized.
496 If any reserved bits in Address are set, then ASSERT().
497 If Address is not aligned on a 16-bit boundary, then ASSERT().
499 @param Address Address that encodes the PCI Segment, Bus, Device, Function and
501 @param OrData The value to OR with the PCI configuration register.
503 @return The value written back to the PCI configuration register.
514 PCI_SEGMENT_INFO
*SegmentInfo
;
516 SegmentInfo
= GetPciSegmentInfo (&Count
);
517 return MmioOr16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), OrData
);
521 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.
523 Reads the 16-bit PCI configuration register specified by Address,
524 performs a bitwise AND between the read result and the value specified by AndData,
525 and writes the result to the 16-bit PCI configuration register specified by Address.
526 The value written to the PCI configuration register is returned.
527 This function must guarantee that all PCI read and write operations are serialized.
529 If any reserved bits in Address are set, then ASSERT().
530 If Address is not aligned on a 16-bit boundary, then ASSERT().
532 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
533 @param AndData The value to AND with the PCI configuration register.
535 @return The value written to the PCI configuration register.
546 PCI_SEGMENT_INFO
*SegmentInfo
;
548 SegmentInfo
= GetPciSegmentInfo (&Count
);
549 return MmioAnd16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), AndData
);
553 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
554 followed a bitwise OR with another 16-bit value.
556 Reads the 16-bit PCI configuration register specified by Address,
557 performs a bitwise AND between the read result and the value specified by AndData,
558 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
559 and writes the result to the 16-bit PCI configuration register specified by Address.
560 The value written to the PCI configuration register is returned.
561 This function must guarantee that all PCI read and write operations are serialized.
563 If any reserved bits in Address are set, then ASSERT().
564 If Address is not aligned on a 16-bit boundary, then ASSERT().
566 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
567 @param AndData The value to AND with the PCI configuration register.
568 @param OrData The value to OR with the PCI configuration register.
570 @return The value written to the PCI configuration register.
575 PciSegmentAndThenOr16 (
582 PCI_SEGMENT_INFO
*SegmentInfo
;
584 SegmentInfo
= GetPciSegmentInfo (&Count
);
585 return MmioAndThenOr16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), AndData
, OrData
);
589 Reads a bit field of a PCI configuration register.
591 Reads the bit field in a 16-bit PCI configuration register. The bit field is
592 specified by the StartBit and the EndBit. The value of the bit field is
595 If any reserved bits in Address are set, then ASSERT().
596 If Address is not aligned on a 16-bit boundary, then ASSERT().
597 If StartBit is greater than 15, then ASSERT().
598 If EndBit is greater than 15, then ASSERT().
599 If EndBit is less than StartBit, then ASSERT().
601 @param Address PCI configuration register to read.
602 @param StartBit The ordinal of the least significant bit in the bit field.
604 @param EndBit The ordinal of the most significant bit in the bit field.
607 @return The value of the bit field read from the PCI configuration register.
612 PciSegmentBitFieldRead16 (
619 PCI_SEGMENT_INFO
*SegmentInfo
;
621 SegmentInfo
= GetPciSegmentInfo (&Count
);
622 return MmioBitFieldRead16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
);
626 Writes a bit field to a PCI configuration register.
628 Writes Value to the bit field of the PCI configuration register. The bit
629 field is specified by the StartBit and the EndBit. All other bits in the
630 destination PCI configuration register are preserved. The new value of the
631 16-bit register is returned.
633 If any reserved bits in Address are set, then ASSERT().
634 If Address is not aligned on a 16-bit boundary, then ASSERT().
635 If StartBit is greater than 15, then ASSERT().
636 If EndBit is greater than 15, then ASSERT().
637 If EndBit is less than StartBit, then ASSERT().
638 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
640 @param Address PCI configuration register to write.
641 @param StartBit The ordinal of the least significant bit in the bit field.
643 @param EndBit The ordinal of the most significant bit in the bit field.
645 @param Value New value of the bit field.
647 @return The value written back to the PCI configuration register.
652 PciSegmentBitFieldWrite16 (
660 PCI_SEGMENT_INFO
*SegmentInfo
;
662 SegmentInfo
= GetPciSegmentInfo (&Count
);
663 return MmioBitFieldWrite16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, Value
);
667 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
668 the result back to the bit field in the 16-bit port.
670 Reads the 16-bit PCI configuration register specified by Address, performs a
671 bitwise OR between the read result and the value specified by
672 OrData, and writes the result to the 16-bit PCI configuration register
673 specified by Address. The value written to the PCI configuration register is
674 returned. This function must guarantee that all PCI read and write operations
675 are serialized. Extra left bits in OrData are stripped.
677 If any reserved bits in Address are set, then ASSERT().
678 If Address is not aligned on a 16-bit boundary, then ASSERT().
679 If StartBit is greater than 15, then ASSERT().
680 If EndBit is greater than 15, then ASSERT().
681 If EndBit is less than StartBit, then ASSERT().
682 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
684 @param Address PCI configuration register to write.
685 @param StartBit The ordinal of the least significant bit in the bit field.
687 @param EndBit The ordinal of the most significant bit in the bit field.
689 @param OrData The value to OR with the PCI configuration register.
691 @return The value written back to the PCI configuration register.
696 PciSegmentBitFieldOr16 (
704 PCI_SEGMENT_INFO
*SegmentInfo
;
706 SegmentInfo
= GetPciSegmentInfo (&Count
);
707 return MmioBitFieldOr16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, OrData
);
711 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
712 AND, writes the result back to the bit field in the 16-bit register.
714 Reads the 16-bit PCI configuration register specified by Address, performs a
715 bitwise AND between the read result and the value specified by AndData, and
716 writes the result to the 16-bit PCI configuration register specified by
717 Address. The value written to the PCI configuration register is returned.
718 This function must guarantee that all PCI read and write operations are
719 serialized. Extra left bits in AndData are stripped.
721 If any reserved bits in Address are set, then ASSERT().
722 If Address is not aligned on a 16-bit boundary, then ASSERT().
723 If StartBit is greater than 15, then ASSERT().
724 If EndBit is greater than 15, then ASSERT().
725 If EndBit is less than StartBit, then ASSERT().
726 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
728 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
729 @param StartBit The ordinal of the least significant bit in the bit field.
731 @param EndBit The ordinal of the most significant bit in the bit field.
733 @param AndData The value to AND with the PCI configuration register.
735 @return The value written back to the PCI configuration register.
740 PciSegmentBitFieldAnd16 (
748 PCI_SEGMENT_INFO
*SegmentInfo
;
750 SegmentInfo
= GetPciSegmentInfo (&Count
);
751 return MmioBitFieldAnd16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, AndData
);
755 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
756 bitwise OR, and writes the result back to the bit field in the
759 Reads the 16-bit PCI configuration register specified by Address, performs a
760 bitwise AND followed by a bitwise OR between the read result and
761 the value specified by AndData, and writes the result to the 16-bit PCI
762 configuration register specified by Address. The value written to the PCI
763 configuration register is returned. This function must guarantee that all PCI
764 read and write operations are serialized. Extra left bits in both AndData and
767 If any reserved bits in Address are set, then ASSERT().
768 If StartBit is greater than 15, then ASSERT().
769 If EndBit is greater than 15, then ASSERT().
770 If EndBit is less than StartBit, then ASSERT().
771 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
772 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
774 @param Address PCI configuration register to write.
775 @param StartBit The ordinal of the least significant bit in the bit field.
777 @param EndBit The ordinal of the most significant bit in the bit field.
779 @param AndData The value to AND with the PCI configuration register.
780 @param OrData The value to OR with the result of the AND operation.
782 @return The value written back to the PCI configuration register.
787 PciSegmentBitFieldAndThenOr16 (
796 PCI_SEGMENT_INFO
*SegmentInfo
;
798 SegmentInfo
= GetPciSegmentInfo (&Count
);
799 return MmioBitFieldAndThenOr16 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, AndData
, OrData
);
803 Reads a 32-bit PCI configuration register.
805 Reads and returns the 32-bit PCI configuration register specified by Address.
806 This function must guarantee that all PCI read and write operations are serialized.
808 If any reserved bits in Address are set, then ASSERT().
809 If Address is not aligned on a 32-bit boundary, then ASSERT().
811 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
813 @return The 32-bit PCI configuration register specified by Address.
823 PCI_SEGMENT_INFO
*SegmentInfo
;
825 SegmentInfo
= GetPciSegmentInfo (&Count
);
826 return MmioRead32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
));
830 Writes a 32-bit PCI configuration register.
832 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
833 Value is returned. This function must guarantee that all PCI read and write operations are serialized.
835 If any reserved bits in Address are set, then ASSERT().
836 If Address is not aligned on a 32-bit boundary, then ASSERT().
838 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
839 @param Value The value to write.
841 @return The parameter of Value.
852 PCI_SEGMENT_INFO
*SegmentInfo
;
854 SegmentInfo
= GetPciSegmentInfo (&Count
);
855 return MmioWrite32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), Value
);
859 Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.
861 Reads the 32-bit PCI configuration register specified by Address,
862 performs a bitwise OR between the read result and the value specified by OrData,
863 and writes the result to the 32-bit PCI configuration register specified by Address.
864 The value written to the PCI configuration register is returned.
865 This function must guarantee that all PCI read and write operations are serialized.
867 If any reserved bits in Address are set, then ASSERT().
868 If Address is not aligned on a 32-bit boundary, then ASSERT().
870 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
871 @param OrData The value to OR with the PCI configuration register.
873 @return The value written to the PCI configuration register.
884 PCI_SEGMENT_INFO
*SegmentInfo
;
886 SegmentInfo
= GetPciSegmentInfo (&Count
);
887 return MmioOr32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), OrData
);
891 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.
893 Reads the 32-bit PCI configuration register specified by Address,
894 performs a bitwise AND between the read result and the value specified by AndData,
895 and writes the result to the 32-bit PCI configuration register specified by Address.
896 The value written to the PCI configuration register is returned.
897 This function must guarantee that all PCI read and write operations are serialized.
899 If any reserved bits in Address are set, then ASSERT().
900 If Address is not aligned on a 32-bit boundary, then ASSERT().
902 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
903 @param AndData The value to AND with the PCI configuration register.
905 @return The value written to the PCI configuration register.
916 PCI_SEGMENT_INFO
*SegmentInfo
;
918 SegmentInfo
= GetPciSegmentInfo (&Count
);
919 return MmioAnd32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), AndData
);
923 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
924 followed a bitwise OR with another 32-bit value.
926 Reads the 32-bit PCI configuration register specified by Address,
927 performs a bitwise AND between the read result and the value specified by AndData,
928 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
929 and writes the result to the 32-bit PCI configuration register specified by Address.
930 The value written to the PCI configuration register is returned.
931 This function must guarantee that all PCI read and write operations are serialized.
933 If any reserved bits in Address are set, then ASSERT().
934 If Address is not aligned on a 32-bit boundary, then ASSERT().
936 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
937 @param AndData The value to AND with the PCI configuration register.
938 @param OrData The value to OR with the PCI configuration register.
940 @return The value written to the PCI configuration register.
945 PciSegmentAndThenOr32 (
952 PCI_SEGMENT_INFO
*SegmentInfo
;
954 SegmentInfo
= GetPciSegmentInfo (&Count
);
955 return MmioAndThenOr32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), AndData
, OrData
);
959 Reads a bit field of a PCI configuration register.
961 Reads the bit field in a 32-bit PCI configuration register. The bit field is
962 specified by the StartBit and the EndBit. The value of the bit field is
965 If any reserved bits in Address are set, then ASSERT().
966 If Address is not aligned on a 32-bit boundary, then ASSERT().
967 If StartBit is greater than 31, then ASSERT().
968 If EndBit is greater than 31, then ASSERT().
969 If EndBit is less than StartBit, then ASSERT().
971 @param Address PCI configuration register to read.
972 @param StartBit The ordinal of the least significant bit in the bit field.
974 @param EndBit The ordinal of the most significant bit in the bit field.
977 @return The value of the bit field read from the PCI configuration register.
982 PciSegmentBitFieldRead32 (
989 PCI_SEGMENT_INFO
*SegmentInfo
;
991 SegmentInfo
= GetPciSegmentInfo (&Count
);
992 return MmioBitFieldRead32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
);
996 Writes a bit field to a PCI configuration register.
998 Writes Value to the bit field of the PCI configuration register. The bit
999 field is specified by the StartBit and the EndBit. All other bits in the
1000 destination PCI configuration register are preserved. The new value of the
1001 32-bit register is returned.
1003 If any reserved bits in Address are set, then ASSERT().
1004 If Address is not aligned on a 32-bit boundary, then ASSERT().
1005 If StartBit is greater than 31, then ASSERT().
1006 If EndBit is greater than 31, then ASSERT().
1007 If EndBit is less than StartBit, then ASSERT().
1008 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1010 @param Address PCI configuration register to write.
1011 @param StartBit The ordinal of the least significant bit in the bit field.
1013 @param EndBit The ordinal of the most significant bit in the bit field.
1015 @param Value New value of the bit field.
1017 @return The value written back to the PCI configuration register.
1022 PciSegmentBitFieldWrite32 (
1030 PCI_SEGMENT_INFO
*SegmentInfo
;
1032 SegmentInfo
= GetPciSegmentInfo (&Count
);
1033 return MmioBitFieldWrite32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, Value
);
1037 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
1038 writes the result back to the bit field in the 32-bit port.
1040 Reads the 32-bit PCI configuration register specified by Address, performs a
1041 bitwise OR between the read result and the value specified by
1042 OrData, and writes the result to the 32-bit PCI configuration register
1043 specified by Address. The value written to the PCI configuration register is
1044 returned. This function must guarantee that all PCI read and write operations
1045 are serialized. Extra left bits in OrData are stripped.
1047 If any reserved bits in Address are set, then ASSERT().
1048 If StartBit is greater than 31, then ASSERT().
1049 If EndBit is greater than 31, then ASSERT().
1050 If EndBit is less than StartBit, then ASSERT().
1051 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1053 @param Address PCI configuration register to write.
1054 @param StartBit The ordinal of the least significant bit in the bit field.
1056 @param EndBit The ordinal of the most significant bit in the bit field.
1058 @param OrData The value to OR with the PCI configuration register.
1060 @return The value written back to the PCI configuration register.
1065 PciSegmentBitFieldOr32 (
1073 PCI_SEGMENT_INFO
*SegmentInfo
;
1075 SegmentInfo
= GetPciSegmentInfo (&Count
);
1076 return MmioBitFieldOr32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, OrData
);
1080 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
1081 AND, and writes the result back to the bit field in the 32-bit register.
1084 Reads the 32-bit PCI configuration register specified by Address, performs a bitwise
1085 AND between the read result and the value specified by AndData, and writes the result
1086 to the 32-bit PCI configuration register specified by Address. The value written to
1087 the PCI configuration register is returned. This function must guarantee that all PCI
1088 read and write operations are serialized. Extra left bits in AndData are stripped.
1089 If any reserved bits in Address are set, then ASSERT().
1090 If Address is not aligned on a 32-bit boundary, then ASSERT().
1091 If StartBit is greater than 31, then ASSERT().
1092 If EndBit is greater than 31, then ASSERT().
1093 If EndBit is less than StartBit, then ASSERT().
1094 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1096 @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
1097 @param StartBit The ordinal of the least significant bit in the bit field.
1099 @param EndBit The ordinal of the most significant bit in the bit field.
1101 @param AndData The value to AND with the PCI configuration register.
1103 @return The value written back to the PCI configuration register.
1108 PciSegmentBitFieldAnd32 (
1116 PCI_SEGMENT_INFO
*SegmentInfo
;
1118 SegmentInfo
= GetPciSegmentInfo (&Count
);
1119 return MmioBitFieldAnd32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, AndData
);
1123 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1124 bitwise OR, and writes the result back to the bit field in the
1127 Reads the 32-bit PCI configuration register specified by Address, performs a
1128 bitwise AND followed by a bitwise OR between the read result and
1129 the value specified by AndData, and writes the result to the 32-bit PCI
1130 configuration register specified by Address. The value written to the PCI
1131 configuration register is returned. This function must guarantee that all PCI
1132 read and write operations are serialized. Extra left bits in both AndData and
1133 OrData are stripped.
1135 If any reserved bits in Address are set, then ASSERT().
1136 If StartBit is greater than 31, then ASSERT().
1137 If EndBit is greater than 31, then ASSERT().
1138 If EndBit is less than StartBit, then ASSERT().
1139 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1140 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1142 @param Address PCI configuration register to write.
1143 @param StartBit The ordinal of the least significant bit in the bit field.
1145 @param EndBit The ordinal of the most significant bit in the bit field.
1147 @param AndData The value to AND with the PCI configuration register.
1148 @param OrData The value to OR with the result of the AND operation.
1150 @return The value written back to the PCI configuration register.
1155 PciSegmentBitFieldAndThenOr32 (
1164 PCI_SEGMENT_INFO
*SegmentInfo
;
1166 SegmentInfo
= GetPciSegmentInfo (&Count
);
1167 return MmioBitFieldAndThenOr32 (PciSegmentLibGetEcamAddress (Address
, SegmentInfo
, Count
), StartBit
, EndBit
, AndData
, OrData
);
1171 Reads a range of PCI configuration registers into a caller supplied buffer.
1173 Reads the range of PCI configuration registers specified by StartAddress and
1174 Size into the buffer specified by Buffer. This function only allows the PCI
1175 configuration registers from a single PCI function to be read. Size is
1176 returned. When possible 32-bit PCI configuration read cycles are used to read
1177 from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit
1178 and 16-bit PCI configuration read cycles may be used at the beginning and the
1181 If any reserved bits in StartAddress are set, then ASSERT().
1182 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1183 If Size > 0 and Buffer is NULL, then ASSERT().
1185 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
1186 Function and Register.
1187 @param Size Size in bytes of the transfer.
1188 @param Buffer Pointer to a buffer receiving the data read.
1195 PciSegmentReadBuffer (
1196 IN UINT64 StartAddress
,
1203 PCI_SEGMENT_INFO
*SegmentInfo
;
1206 ASSERT (((StartAddress
& 0xFFF) + Size
) <= 0x1000);
1208 SegmentInfo
= GetPciSegmentInfo (&Count
);
1209 Address
= PciSegmentLibGetEcamAddress (StartAddress
, SegmentInfo
, Count
);
1215 ASSERT (Buffer
!= NULL
);
1218 // Save Size for return
1222 if ((Address
& BIT0
) != 0) {
1224 // Read a byte if StartAddress is byte aligned
1226 *(volatile UINT8
*)Buffer
= MmioRead8 (Address
);
1227 Address
+= sizeof (UINT8
);
1228 Size
-= sizeof (UINT8
);
1229 Buffer
= (UINT8
*)Buffer
+ 1;
1232 if ((Size
>= sizeof (UINT16
)) && ((Address
& BIT1
) != 0)) {
1234 // Read a word if StartAddress is word aligned
1236 WriteUnaligned16 (Buffer
, MmioRead16 (Address
));
1237 Address
+= sizeof (UINT16
);
1238 Size
-= sizeof (UINT16
);
1239 Buffer
= (UINT16
*)Buffer
+ 1;
1242 while (Size
>= sizeof (UINT32
)) {
1244 // Read as many double words as possible
1246 WriteUnaligned32 (Buffer
, MmioRead32 (Address
));
1247 Address
+= sizeof (UINT32
);
1248 Size
-= sizeof (UINT32
);
1249 Buffer
= (UINT32
*)Buffer
+ 1;
1252 if (Size
>= sizeof (UINT16
)) {
1254 // Read the last remaining word if exist
1256 WriteUnaligned16 (Buffer
, MmioRead16 (Address
));
1257 Address
+= sizeof (UINT16
);
1258 Size
-= sizeof (UINT16
);
1259 Buffer
= (UINT16
*)Buffer
+ 1;
1262 if (Size
>= sizeof (UINT8
)) {
1264 // Read the last remaining byte if exist
1266 *(volatile UINT8
*)Buffer
= MmioRead8 (Address
);
1273 Copies the data in a caller supplied buffer to a specified range of PCI
1274 configuration space.
1276 Writes the range of PCI configuration registers specified by StartAddress and
1277 Size from the buffer specified by Buffer. This function only allows the PCI
1278 configuration registers from a single PCI function to be written. Size is
1279 returned. When possible 32-bit PCI configuration write cycles are used to
1280 write from StartAddress to StartAddress + Size. Due to alignment restrictions,
1281 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1282 and the end of the range.
1284 If any reserved bits in StartAddress are set, then ASSERT().
1285 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1286 If Size > 0 and Buffer is NULL, then ASSERT().
1288 @param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
1289 Function and Register.
1290 @param Size Size in bytes of the transfer.
1291 @param Buffer Pointer to a buffer containing the data to write.
1293 @return The parameter of Size.
1298 PciSegmentWriteBuffer (
1299 IN UINT64 StartAddress
,
1306 PCI_SEGMENT_INFO
*SegmentInfo
;
1309 ASSERT (((StartAddress
& 0xFFF) + Size
) <= 0x1000);
1311 SegmentInfo
= GetPciSegmentInfo (&Count
);
1312 Address
= PciSegmentLibGetEcamAddress (StartAddress
, SegmentInfo
, Count
);
1318 ASSERT (Buffer
!= NULL
);
1321 // Save Size for return
1325 if ((Address
& BIT0
) != 0) {
1327 // Write a byte if StartAddress is byte aligned
1329 MmioWrite8 (Address
, *(UINT8
*)Buffer
);
1330 Address
+= sizeof (UINT8
);
1331 Size
-= sizeof (UINT8
);
1332 Buffer
= (UINT8
*)Buffer
+ 1;
1335 if ((Size
>= sizeof (UINT16
)) && ((Address
& BIT1
) != 0)) {
1337 // Write a word if StartAddress is word aligned
1339 MmioWrite16 (Address
, ReadUnaligned16 (Buffer
));
1340 Address
+= sizeof (UINT16
);
1341 Size
-= sizeof (UINT16
);
1342 Buffer
= (UINT16
*)Buffer
+ 1;
1345 while (Size
>= sizeof (UINT32
)) {
1347 // Write as many double words as possible
1349 MmioWrite32 (Address
, ReadUnaligned32 (Buffer
));
1350 Address
+= sizeof (UINT32
);
1351 Size
-= sizeof (UINT32
);
1352 Buffer
= (UINT32
*)Buffer
+ 1;
1355 if (Size
>= sizeof (UINT16
)) {
1357 // Write the last remaining word if exist
1359 MmioWrite16 (Address
, ReadUnaligned16 (Buffer
));
1360 Address
+= sizeof (UINT16
);
1361 Size
-= sizeof (UINT16
);
1362 Buffer
= (UINT16
*)Buffer
+ 1;
1365 if (Size
>= sizeof (UINT8
)) {
1367 // Write the last remaining byte if exist
1369 MmioWrite8 (Address
, *(UINT8
*)Buffer
);