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1 /** @file
2
3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #include "Flash.h"
10
11 NAND_PART_INFO_TABLE gNandPartInfoTable[1] = {
12 { 0x2C, 0xBA, 17, 11 }
13 };
14
15 NAND_FLASH_INFO *gNandFlashInfo = NULL;
16 UINT8 *gEccCode;
17 UINTN gNum512BytesChunks = 0;
18
19 //
20
21 // Device path for SemiHosting. It contains our autogened Caller ID GUID.
22
23 //
24
25 typedef struct {
26
27 VENDOR_DEVICE_PATH Guid;
28
29 EFI_DEVICE_PATH_PROTOCOL End;
30
31 } FLASH_DEVICE_PATH;
32
33
34
35 FLASH_DEVICE_PATH gDevicePath = {
36 {
37 { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 } },
38 EFI_CALLER_ID_GUID
39 },
40 { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0} }
41 };
42
43
44
45 //Actual page address = Column address + Page address + Block address.
46 UINTN
47 GetActualPageAddressInBytes (
48 UINTN BlockIndex,
49 UINTN PageIndex
50 )
51 {
52 //BlockAddressStart = Start of the Block address in actual NAND
53 //PageAddressStart = Start of the Page address in actual NAND
54 return ((BlockIndex << gNandFlashInfo->BlockAddressStart) + (PageIndex << gNandFlashInfo->PageAddressStart));
55 }
56
57 VOID
58 NandSendCommand (
59 UINT8 Command
60 )
61 {
62 MmioWrite16(GPMC_NAND_COMMAND_0, Command);
63 }
64
65 VOID
66 NandSendAddress (
67 UINT8 Address
68 )
69 {
70 MmioWrite16(GPMC_NAND_ADDRESS_0, Address);
71 }
72
73 UINT16
74 NandReadStatus (
75 VOID
76 )
77 {
78 //Send READ STATUS command
79 NandSendCommand(READ_STATUS_CMD);
80
81 //Read status.
82 return MmioRead16(GPMC_NAND_DATA_0);
83 }
84
85 VOID
86 NandSendAddressCycles (
87 UINTN Address
88 )
89 {
90 //Column address
91 NandSendAddress(Address & 0xff);
92 Address >>= 8;
93
94 //Column address
95 NandSendAddress(Address & 0x07);
96 Address >>= 3;
97
98 //Page and Block address
99 NandSendAddress(Address & 0xff);
100 Address >>= 8;
101
102 //Block address
103 NandSendAddress(Address & 0xff);
104 Address >>= 8;
105
106 //Block address
107 NandSendAddress(Address & 0x01);
108 }
109
110 VOID
111 GpmcInit (
112 VOID
113 )
114 {
115 //Enable Smart-idle mode.
116 MmioWrite32 (GPMC_SYSCONFIG, SMARTIDLEMODE);
117
118 //Set IRQSTATUS and IRQENABLE to the reset value
119 MmioWrite32 (GPMC_IRQSTATUS, 0x0);
120 MmioWrite32 (GPMC_IRQENABLE, 0x0);
121
122 //Disable GPMC timeout control.
123 MmioWrite32 (GPMC_TIMEOUT_CONTROL, TIMEOUTDISABLE);
124
125 //Set WRITEPROTECT bit to enable write access.
126 MmioWrite32 (GPMC_CONFIG, WRITEPROTECT_HIGH);
127
128 //NOTE: Following GPMC_CONFIGi_0 register settings are taken from u-boot memory dump.
129 MmioWrite32 (GPMC_CONFIG1_0, DEVICETYPE_NAND | DEVICESIZE_X16);
130 MmioWrite32 (GPMC_CONFIG2_0, CSRDOFFTIME | CSWROFFTIME);
131 MmioWrite32 (GPMC_CONFIG3_0, ADVRDOFFTIME | ADVWROFFTIME);
132 MmioWrite32 (GPMC_CONFIG4_0, OEONTIME | OEOFFTIME | WEONTIME | WEOFFTIME);
133 MmioWrite32 (GPMC_CONFIG5_0, RDCYCLETIME | WRCYCLETIME | RDACCESSTIME | PAGEBURSTACCESSTIME);
134 MmioWrite32 (GPMC_CONFIG6_0, WRACCESSTIME | WRDATAONADMUXBUS | CYCLE2CYCLEDELAY | CYCLE2CYCLESAMECSEN);
135 MmioWrite32 (GPMC_CONFIG7_0, MASKADDRESS_128MB | CSVALID | BASEADDRESS);
136 }
137
138 EFI_STATUS
139 NandDetectPart (
140 VOID
141 )
142 {
143 UINT8 NandInfo = 0;
144 UINT8 PartInfo[5];
145 UINTN Index;
146 BOOLEAN Found = FALSE;
147
148 //Send READ ID command
149 NandSendCommand(READ_ID_CMD);
150
151 //Send one address cycle.
152 NandSendAddress(0);
153
154 //Read 5-bytes to idenfity code programmed into the NAND flash devices.
155 //BYTE 0 = Manufacture ID
156 //Byte 1 = Device ID
157 //Byte 2, 3, 4 = Nand part specific information (Page size, Block size etc)
158 for (Index = 0; Index < sizeof(PartInfo); Index++) {
159 PartInfo[Index] = MmioRead16(GPMC_NAND_DATA_0);
160 }
161
162 //Check if the ManufactureId and DeviceId are part of the currently supported nand parts.
163 for (Index = 0; Index < sizeof(gNandPartInfoTable)/sizeof(NAND_PART_INFO_TABLE); Index++) {
164 if (gNandPartInfoTable[Index].ManufactureId == PartInfo[0] && gNandPartInfoTable[Index].DeviceId == PartInfo[1]) {
165 gNandFlashInfo->BlockAddressStart = gNandPartInfoTable[Index].BlockAddressStart;
166 gNandFlashInfo->PageAddressStart = gNandPartInfoTable[Index].PageAddressStart;
167 Found = TRUE;
168 break;
169 }
170 }
171
172 if (Found == FALSE) {
173 DEBUG ((EFI_D_ERROR, "Nand part is not currently supported. Manufacture id: %x, Device id: %x\n", PartInfo[0], PartInfo[1]));
174 return EFI_NOT_FOUND;
175 }
176
177 //Populate NAND_FLASH_INFO based on the result of READ ID command.
178 gNandFlashInfo->ManufactureId = PartInfo[0];
179 gNandFlashInfo->DeviceId = PartInfo[1];
180 NandInfo = PartInfo[3];
181
182 if (PAGE_SIZE(NandInfo) == PAGE_SIZE_2K_VAL) {
183 gNandFlashInfo->PageSize = PAGE_SIZE_2K;
184 } else {
185 DEBUG ((EFI_D_ERROR, "Unknown Page size.\n"));
186 return EFI_DEVICE_ERROR;
187 }
188
189 if (SPARE_AREA_SIZE(NandInfo) == SPARE_AREA_SIZE_64B_VAL) {
190 gNandFlashInfo->SparePageSize = SPARE_AREA_SIZE_64B;
191 } else {
192 DEBUG ((EFI_D_ERROR, "Unknown Spare area size.\n"));
193 return EFI_DEVICE_ERROR;
194 }
195
196 if (BLOCK_SIZE(NandInfo) == BLOCK_SIZE_128K_VAL) {
197 gNandFlashInfo->BlockSize = BLOCK_SIZE_128K;
198 } else {
199 DEBUG ((EFI_D_ERROR, "Unknown Block size.\n"));
200 return EFI_DEVICE_ERROR;
201 }
202
203 if (ORGANIZATION(NandInfo) == ORGANIZATION_X8) {
204 gNandFlashInfo->Organization = 0;
205 } else if (ORGANIZATION(NandInfo) == ORGANIZATION_X16) {
206 gNandFlashInfo->Organization = 1;
207 }
208
209 //Calculate total number of blocks.
210 gNandFlashInfo->NumPagesPerBlock = DivU64x32(gNandFlashInfo->BlockSize, gNandFlashInfo->PageSize);
211
212 return EFI_SUCCESS;
213 }
214
215 VOID
216 NandConfigureEcc (
217 VOID
218 )
219 {
220 //Define ECC size 0 and size 1 to 512 bytes
221 MmioWrite32 (GPMC_ECC_SIZE_CONFIG, (ECCSIZE0_512BYTES | ECCSIZE1_512BYTES));
222 }
223
224 VOID
225 NandEnableEcc (
226 VOID
227 )
228 {
229 //Clear all the ECC result registers and select ECC result register 1
230 MmioWrite32 (GPMC_ECC_CONTROL, (ECCCLEAR | ECCPOINTER_REG1));
231
232 //Enable ECC engine on CS0
233 MmioWrite32 (GPMC_ECC_CONFIG, (ECCENABLE | ECCCS_0 | ECC16B));
234 }
235
236 VOID
237 NandDisableEcc (
238 VOID
239 )
240 {
241 //Turn off ECC engine.
242 MmioWrite32 (GPMC_ECC_CONFIG, ECCDISABLE);
243 }
244
245 VOID
246 NandCalculateEcc (
247 VOID
248 )
249 {
250 UINTN Index;
251 UINTN EccResultRegister;
252 UINTN EccResult;
253
254 //Capture 32-bit ECC result for each 512-bytes chunk.
255 //In our case PageSize is 2K so read ECC1-ECC4 result registers and
256 //generate total of 12-bytes of ECC code for the particular page.
257
258 EccResultRegister = GPMC_ECC1_RESULT;
259
260 for (Index = 0; Index < gNum512BytesChunks; Index++) {
261
262 EccResult = MmioRead32 (EccResultRegister);
263
264 //Calculate ECC code from 32-bit ECC result value.
265 //NOTE: Following calculation is not part of TRM. We got this information
266 //from Beagleboard mailing list.
267 gEccCode[Index * 3] = EccResult & 0xFF;
268 gEccCode[(Index * 3) + 1] = (EccResult >> 16) & 0xFF;
269 gEccCode[(Index * 3) + 2] = (((EccResult >> 20) & 0xF0) | ((EccResult >> 8) & 0x0F));
270
271 //Point to next ECC result register.
272 EccResultRegister += 4;
273 }
274 }
275
276 EFI_STATUS
277 NandReadPage (
278 IN UINTN BlockIndex,
279 IN UINTN PageIndex,
280 OUT VOID *Buffer,
281 OUT UINT8 *SpareBuffer
282 )
283 {
284 UINTN Address;
285 UINTN Index;
286 UINTN NumMainAreaWords = (gNandFlashInfo->PageSize/2);
287 UINTN NumSpareAreaWords = (gNandFlashInfo->SparePageSize/2);
288 UINT16 *MainAreaWordBuffer = Buffer;
289 UINT16 *SpareAreaWordBuffer = (UINT16 *)SpareBuffer;
290 UINTN Timeout = MAX_RETRY_COUNT;
291
292 //Generate device address in bytes to access specific block and page index
293 Address = GetActualPageAddressInBytes(BlockIndex, PageIndex);
294
295 //Send READ command
296 NandSendCommand(PAGE_READ_CMD);
297
298 //Send 5 Address cycles to access specific device address
299 NandSendAddressCycles(Address);
300
301 //Send READ CONFIRM command
302 NandSendCommand(PAGE_READ_CONFIRM_CMD);
303
304 //Poll till device is busy.
305 while (Timeout) {
306 if ((NandReadStatus() & NAND_READY) == NAND_READY) {
307 break;
308 }
309 Timeout--;
310 }
311
312 if (Timeout == 0) {
313 DEBUG ((EFI_D_ERROR, "Read page timed out.\n"));
314 return EFI_TIMEOUT;
315 }
316
317 //Reissue READ command
318 NandSendCommand(PAGE_READ_CMD);
319
320 //Enable ECC engine.
321 NandEnableEcc();
322
323 //Read data into the buffer.
324 for (Index = 0; Index < NumMainAreaWords; Index++) {
325 *MainAreaWordBuffer++ = MmioRead16(GPMC_NAND_DATA_0);
326 }
327
328 //Read spare area into the buffer.
329 for (Index = 0; Index < NumSpareAreaWords; Index++) {
330 *SpareAreaWordBuffer++ = MmioRead16(GPMC_NAND_DATA_0);
331 }
332
333 //Calculate ECC.
334 NandCalculateEcc();
335
336 //Turn off ECC engine.
337 NandDisableEcc();
338
339 //Perform ECC correction.
340 //Need to implement..
341
342 return EFI_SUCCESS;
343 }
344
345 EFI_STATUS
346 NandWritePage (
347 IN UINTN BlockIndex,
348 IN UINTN PageIndex,
349 OUT VOID *Buffer,
350 IN UINT8 *SpareBuffer
351 )
352 {
353 UINTN Address;
354 UINT16 *MainAreaWordBuffer = Buffer;
355 UINT16 *SpareAreaWordBuffer = (UINT16 *)SpareBuffer;
356 UINTN Index;
357 UINTN NandStatus;
358 UINTN Timeout = MAX_RETRY_COUNT;
359
360 //Generate device address in bytes to access specific block and page index
361 Address = GetActualPageAddressInBytes(BlockIndex, PageIndex);
362
363 //Send SERIAL DATA INPUT command
364 NandSendCommand(PROGRAM_PAGE_CMD);
365
366 //Send 5 Address cycles to access specific device address
367 NandSendAddressCycles(Address);
368
369 //Enable ECC engine.
370 NandEnableEcc();
371
372 //Data input from Buffer
373 for (Index = 0; Index < (gNandFlashInfo->PageSize/2); Index++) {
374 MmioWrite16(GPMC_NAND_DATA_0, *MainAreaWordBuffer++);
375
376 //After each write access, device has to wait to accept data.
377 //Currently we may not be programming proper timing parameters to
378 //the GPMC_CONFIGi_0 registers and we would need to figure that out.
379 //Without following delay, page programming fails.
380 gBS->Stall(1);
381 }
382
383 //Calculate ECC.
384 NandCalculateEcc();
385
386 //Turn off ECC engine.
387 NandDisableEcc();
388
389 //Prepare Spare area buffer with ECC codes.
390 SetMem(SpareBuffer, gNandFlashInfo->SparePageSize, 0xFF);
391 CopyMem(&SpareBuffer[ECC_POSITION], gEccCode, gNum512BytesChunks * 3);
392
393 //Program spare area with calculated ECC.
394 for (Index = 0; Index < (gNandFlashInfo->SparePageSize/2); Index++) {
395 MmioWrite16(GPMC_NAND_DATA_0, *SpareAreaWordBuffer++);
396 }
397
398 //Send PROGRAM command
399 NandSendCommand(PROGRAM_PAGE_CONFIRM_CMD);
400
401 //Poll till device is busy.
402 NandStatus = 0;
403 while (Timeout) {
404 NandStatus = NandReadStatus();
405 if ((NandStatus & NAND_READY) == NAND_READY) {
406 break;
407 }
408 Timeout--;
409 }
410
411 if (Timeout == 0) {
412 DEBUG ((EFI_D_ERROR, "Program page timed out.\n"));
413 return EFI_TIMEOUT;
414 }
415
416 //Bit0 indicates Pass/Fail status
417 if (NandStatus & NAND_FAILURE) {
418 return EFI_DEVICE_ERROR;
419 }
420
421 return EFI_SUCCESS;
422 }
423
424 EFI_STATUS
425 NandEraseBlock (
426 IN UINTN BlockIndex
427 )
428 {
429 UINTN Address;
430 UINTN NandStatus;
431 UINTN Timeout = MAX_RETRY_COUNT;
432
433 //Generate device address in bytes to access specific block and page index
434 Address = GetActualPageAddressInBytes(BlockIndex, 0);
435
436 //Send ERASE SETUP command
437 NandSendCommand(BLOCK_ERASE_CMD);
438
439 //Send 3 address cycles to device to access Page address and Block address
440 Address >>= 11; //Ignore column addresses
441
442 NandSendAddress(Address & 0xff);
443 Address >>= 8;
444
445 NandSendAddress(Address & 0xff);
446 Address >>= 8;
447
448 NandSendAddress(Address & 0xff);
449
450 //Send ERASE CONFIRM command
451 NandSendCommand(BLOCK_ERASE_CONFIRM_CMD);
452
453 //Poll till device is busy.
454 NandStatus = 0;
455 while (Timeout) {
456 NandStatus = NandReadStatus();
457 if ((NandStatus & NAND_READY) == NAND_READY) {
458 break;
459 }
460 Timeout--;
461 gBS->Stall(1);
462 }
463
464 if (Timeout == 0) {
465 DEBUG ((EFI_D_ERROR, "Erase block timed out for Block: %d.\n", BlockIndex));
466 return EFI_TIMEOUT;
467 }
468
469 //Bit0 indicates Pass/Fail status
470 if (NandStatus & NAND_FAILURE) {
471 return EFI_DEVICE_ERROR;
472 }
473
474 return EFI_SUCCESS;
475 }
476
477 EFI_STATUS
478 NandReadBlock (
479 IN UINTN StartBlockIndex,
480 IN UINTN EndBlockIndex,
481 OUT VOID *Buffer,
482 OUT VOID *SpareBuffer
483 )
484 {
485 UINTN BlockIndex;
486 UINTN PageIndex;
487 EFI_STATUS Status = EFI_SUCCESS;
488
489 for (BlockIndex = StartBlockIndex; BlockIndex <= EndBlockIndex; BlockIndex++) {
490 //For each block read number of pages
491 for (PageIndex = 0; PageIndex < gNandFlashInfo->NumPagesPerBlock; PageIndex++) {
492 Status = NandReadPage(BlockIndex, PageIndex, Buffer, SpareBuffer);
493 if (EFI_ERROR(Status)) {
494 return Status;
495 }
496 Buffer = ((UINT8 *)Buffer + gNandFlashInfo->PageSize);
497 }
498 }
499
500 return Status;
501 }
502
503 EFI_STATUS
504 NandWriteBlock (
505 IN UINTN StartBlockIndex,
506 IN UINTN EndBlockIndex,
507 OUT VOID *Buffer,
508 OUT VOID *SpareBuffer
509 )
510 {
511 UINTN BlockIndex;
512 UINTN PageIndex;
513 EFI_STATUS Status = EFI_SUCCESS;
514
515 for (BlockIndex = StartBlockIndex; BlockIndex <= EndBlockIndex; BlockIndex++) {
516 //Page programming.
517 for (PageIndex = 0; PageIndex < gNandFlashInfo->NumPagesPerBlock; PageIndex++) {
518 Status = NandWritePage(BlockIndex, PageIndex, Buffer, SpareBuffer);
519 if (EFI_ERROR(Status)) {
520 return Status;
521 }
522 Buffer = ((UINT8 *)Buffer + gNandFlashInfo->PageSize);
523 }
524 }
525
526 return Status;
527 }
528
529 EFI_STATUS
530 EFIAPI
531 NandFlashReset (
532 IN EFI_BLOCK_IO_PROTOCOL *This,
533 IN BOOLEAN ExtendedVerification
534 )
535 {
536 UINTN BusyStall = 50; // microSeconds
537 UINTN ResetBusyTimeout = (1000000 / BusyStall); // 1 Second
538
539 //Send RESET command to device.
540 NandSendCommand(RESET_CMD);
541
542 //Wait for 1ms before we check status register.
543 gBS->Stall(1000);
544
545 //Check BIT#5 & BIT#6 in Status register to make sure RESET is done.
546 while ((NandReadStatus() & NAND_RESET_STATUS) != NAND_RESET_STATUS) {
547
548 //In case of extended verification, wait for extended amount of time
549 //to make sure device is reset.
550 if (ExtendedVerification) {
551 if (ResetBusyTimeout == 0) {
552 return EFI_DEVICE_ERROR;
553 }
554
555 gBS->Stall(BusyStall);
556 ResetBusyTimeout--;
557 }
558 }
559
560 return EFI_SUCCESS;
561 }
562
563 EFI_STATUS
564 EFIAPI
565 NandFlashReadBlocks (
566 IN EFI_BLOCK_IO_PROTOCOL *This,
567 IN UINT32 MediaId,
568 IN EFI_LBA Lba,
569 IN UINTN BufferSize,
570 OUT VOID *Buffer
571 )
572 {
573 UINTN NumBlocks;
574 UINTN EndBlockIndex;
575 EFI_STATUS Status;
576 UINT8 *SpareBuffer = NULL;
577
578 if (Buffer == NULL) {
579 Status = EFI_INVALID_PARAMETER;
580 goto exit;
581 }
582
583 if (Lba > LAST_BLOCK) {
584 Status = EFI_INVALID_PARAMETER;
585 goto exit;
586 }
587
588 if ((BufferSize % gNandFlashInfo->BlockSize) != 0) {
589 Status = EFI_BAD_BUFFER_SIZE;
590 goto exit;
591 }
592
593 NumBlocks = DivU64x32(BufferSize, gNandFlashInfo->BlockSize);
594 EndBlockIndex = ((UINTN)Lba + NumBlocks) - 1;
595
596 SpareBuffer = (UINT8 *)AllocatePool(gNandFlashInfo->SparePageSize);
597 if (SpareBuffer == NULL) {
598 Status = EFI_OUT_OF_RESOURCES;
599 goto exit;
600 }
601
602 //Read block
603 Status = NandReadBlock((UINTN)Lba, EndBlockIndex, Buffer, SpareBuffer);
604 if (EFI_ERROR(Status)) {
605 DEBUG((EFI_D_ERROR, "Read block fails: %x\n", Status));
606 goto exit;
607 }
608
609 exit:
610 if (SpareBuffer != NULL) {
611 FreePool (SpareBuffer);
612 }
613
614 return Status;
615 }
616
617 EFI_STATUS
618 EFIAPI
619 NandFlashWriteBlocks (
620 IN EFI_BLOCK_IO_PROTOCOL *This,
621 IN UINT32 MediaId,
622 IN EFI_LBA Lba,
623 IN UINTN BufferSize,
624 IN VOID *Buffer
625 )
626 {
627 UINTN BlockIndex;
628 UINTN NumBlocks;
629 UINTN EndBlockIndex;
630 EFI_STATUS Status;
631 UINT8 *SpareBuffer = NULL;
632
633 if (Buffer == NULL) {
634 Status = EFI_INVALID_PARAMETER;
635 goto exit;
636 }
637
638 if (Lba > LAST_BLOCK) {
639 Status = EFI_INVALID_PARAMETER;
640 goto exit;
641 }
642
643 if ((BufferSize % gNandFlashInfo->BlockSize) != 0) {
644 Status = EFI_BAD_BUFFER_SIZE;
645 goto exit;
646 }
647
648 NumBlocks = DivU64x32(BufferSize, gNandFlashInfo->BlockSize);
649 EndBlockIndex = ((UINTN)Lba + NumBlocks) - 1;
650
651 SpareBuffer = (UINT8 *)AllocatePool(gNandFlashInfo->SparePageSize);
652 if (SpareBuffer == NULL) {
653 Status = EFI_OUT_OF_RESOURCES;
654 goto exit;
655 }
656
657 // Erase block
658 for (BlockIndex = (UINTN)Lba; BlockIndex <= EndBlockIndex; BlockIndex++) {
659 Status = NandEraseBlock(BlockIndex);
660 if (EFI_ERROR(Status)) {
661 DEBUG((EFI_D_ERROR, "Erase block failed. Status: %x\n", Status));
662 goto exit;
663 }
664 }
665
666 // Program data
667 Status = NandWriteBlock((UINTN)Lba, EndBlockIndex, Buffer, SpareBuffer);
668 if (EFI_ERROR(Status)) {
669 DEBUG((EFI_D_ERROR, "Block write fails: %x\n", Status));
670 goto exit;
671 }
672
673 exit:
674 if (SpareBuffer != NULL) {
675 FreePool (SpareBuffer);
676 }
677
678 return Status;
679 }
680
681 EFI_STATUS
682 EFIAPI
683 NandFlashFlushBlocks (
684 IN EFI_BLOCK_IO_PROTOCOL *This
685 )
686 {
687 return EFI_SUCCESS;
688 }
689
690
691
692 EFI_BLOCK_IO_MEDIA gNandFlashMedia = {
693 SIGNATURE_32('n','a','n','d'), // MediaId
694 FALSE, // RemovableMedia
695 TRUE, // MediaPresent
696 FALSE, // LogicalPartition
697 FALSE, // ReadOnly
698 FALSE, // WriteCaching
699 0, // BlockSize
700 2, // IoAlign
701 0, // Pad
702 0 // LastBlock
703 };
704
705 EFI_BLOCK_IO_PROTOCOL BlockIo =
706 {
707 EFI_BLOCK_IO_INTERFACE_REVISION, // Revision
708 &gNandFlashMedia, // *Media
709 NandFlashReset, // Reset
710 NandFlashReadBlocks, // ReadBlocks
711 NandFlashWriteBlocks, // WriteBlocks
712 NandFlashFlushBlocks // FlushBlocks
713 };
714
715 EFI_STATUS
716 NandFlashInitialize (
717 IN EFI_HANDLE ImageHandle,
718 IN EFI_SYSTEM_TABLE *SystemTable
719 )
720 {
721 EFI_STATUS Status;
722
723 gNandFlashInfo = (NAND_FLASH_INFO *)AllocateZeroPool (sizeof(NAND_FLASH_INFO));
724
725 //Initialize GPMC module.
726 GpmcInit();
727
728 //Reset NAND part
729 NandFlashReset(&BlockIo, FALSE);
730
731 //Detect NAND part and populate gNandFlashInfo structure
732 Status = NandDetectPart ();
733 if (EFI_ERROR(Status)) {
734 DEBUG((EFI_D_ERROR, "Nand part id detection failure: Status: %x\n", Status));
735 return Status;
736 }
737
738 //Count total number of 512Bytes chunk based on the page size.
739 if (gNandFlashInfo->PageSize == PAGE_SIZE_512B) {
740 gNum512BytesChunks = 1;
741 } else if (gNandFlashInfo->PageSize == PAGE_SIZE_2K) {
742 gNum512BytesChunks = 4;
743 } else if (gNandFlashInfo->PageSize == PAGE_SIZE_4K) {
744 gNum512BytesChunks = 8;
745 }
746
747 gEccCode = (UINT8 *)AllocatePool(gNum512BytesChunks * 3);
748 if (gEccCode == NULL) {
749 return EFI_OUT_OF_RESOURCES;
750 }
751
752 //Configure ECC
753 NandConfigureEcc ();
754
755 //Patch EFI_BLOCK_IO_MEDIA structure.
756 gNandFlashMedia.BlockSize = gNandFlashInfo->BlockSize;
757 gNandFlashMedia.LastBlock = LAST_BLOCK;
758
759 //Publish BlockIO.
760 Status = gBS->InstallMultipleProtocolInterfaces (
761 &ImageHandle,
762 &gEfiBlockIoProtocolGuid, &BlockIo,
763 &gEfiDevicePathProtocolGuid, &gDevicePath,
764 NULL
765 );
766 return Status;
767 }
768