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1 /** @file
2
3 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
4
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __OMAP3530DMA_H__
16 #define __OMAP3530DMA_H__
17
18
19 #define DMA4_MAX_CHANNEL 31
20
21 #define DMA4_IRQENABLE_L(_i) (0x48056018 + (0x4*(_i)))
22
23 #define DMA4_CCR(_i) (0x48056080 + (0x60*(_i)))
24 #define DMA4_CICR(_i) (0x48056088 + (0x60*(_i)))
25 #define DMA4_CSDP(_i) (0x48056090 + (0x60*(_i)))
26 #define DMA4_CEN(_i) (0x48056094 + (0x60*(_i)))
27 #define DMA4_CFN(_i) (0x48056098 + (0x60*(_i)))
28 #define DMA4_CSSA(_i) (0x4805609c + (0x60*(_i)))
29 #define DMA4_CDSA(_i) (0x480560a0 + (0x60*(_i)))
30 #define DMA4_CSEI(_i) (0x480560a4 + (0x60*(_i)))
31 #define DMA4_CSFI(_i) (0x480560a8 + (0x60*(_i)))
32 #define DMA4_CDEI(_i) (0x480560ac + (0x60*(_i)))
33 #define DMA4_CDFI(_i) (0x480560b0 + (0x60*(_i)))
34
35 #define DMA4_GCR (0x48056078)
36
37 // Channel Source Destination parameters
38 #define DMA4_CSDP_DATA_TYPE8 0
39 #define DMA4_CSDP_DATA_TYPE16 1
40 #define DMA4_CSDP_DATA_TYPE32 2
41
42 #define DMA4_CSDP_SRC_PACKED BIT6
43 #define DMA4_CSDP_SRC_NONPACKED 0
44
45 #define DMA4_CSDP_SRC_BURST_EN (0x0 << 7)
46 #define DMA4_CSDP_SRC_BURST_EN16 (0x1 << 7)
47 #define DMA4_CSDP_SRC_BURST_EN32 (0x2 << 7)
48 #define DMA4_CSDP_SRC_BURST_EN64 (0x3 << 7)
49
50 #define DMA4_CSDP_DST_PACKED BIT13
51 #define DMA4_CSDP_DST_NONPACKED 0
52
53 #define DMA4_CSDP_BURST_EN (0x0 << 14)
54 #define DMA4_CSDP_BURST_EN16 (0x1 << 14)
55 #define DMA4_CSDP_BURST_EN32 (0x2 << 14)
56 #define DMA4_CSDP_BURST_EN64 (0x3 << 14)
57
58 #define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16)
59 #define DMA4_CSDP_WRITE_MODE_POSTED (0x1 << 16)
60 #define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16)
61
62 #define DMA4_CSDP_DST_ENDIAN_LOCK_LOCK BIT18
63 #define DMA4_CSDP_DST_ENDIAN_LOCK_ADAPT 0
64
65 #define DMA4_CSDP_DST_ENDIAN_BIG BIT19
66 #define DMA4_CSDP_DST_ENDIAN_LITTLE 0
67
68 #define DMA4_CSDP_SRC_ENDIAN_LOCK_LOCK BIT20
69 #define DMA4_CSDP_SRC_ENDIAN_LOCK_ADAPT 0
70
71 #define DMA4_CSDP_SRC_ENDIAN_BIG BIT21
72 #define DMA4_CSDP_SRC_ENDIAN_LITTLE 0
73
74 // Channel Control
75 #define DMA4_CCR_SYNCHRO_CONTROL_MASK 0x1f
76
77 #define DMA4_CCR_FS_ELEMENT (0 | 0)
78 #define DMA4_CCR_FS_BLOCK (0 | BIT18)
79 #define DMA4_CCR_FS_FRAME (BIT5 | 0)
80 #define DMA4_CCR_FS_PACKET (BIT5 | BIT18)
81
82 #define DMA4_CCR_READ_PRIORITY_HIGH BIT6
83 #define DMA4_CCR_READ_PRIORITY_LOW 0
84
85 #define DMA4_CCR_ENABLE BIT7
86 #define DMA4_CCR_DISABLE 0
87
88 #define DMA4_CCR_SUSPEND_SENSITIVE_IGNORE BIT8
89 #define DMA4_CCR_SUSPEND_SENSITIVE 0
90
91 #define DMA4_CCR_RD_ACTIVE BIT9
92 #define DMA4_CCR_WR_ACTIVE BIT10
93
94 #define DMA4_CCR_SRC_AMODE (0 | 0)
95 #define DMA4_CCR_SRC_AMODE_POST_INC (0 | BIT12)
96 #define DMA4_CCR_SRC_AMODE_SINGLE_INDEX (BIT13 | 0)
97 #define DMA4_CCR_SRC_AMODE_DOUBLE_INDEX (BIT13 | BIT12)
98
99 #define DMA4_CCR_DST_AMODE (0 | 0)
100 #define DMA4_CCR_DST_AMODE_POST_INC (0 | BIT14)
101 #define DMA4_CCR_DST_AMODE_SINGLE_INDEX (BIT15 | 0)
102 #define DMA4_CCR_DST_AMODE_DOUBLE_INDEX (BIT15 | BIT14)
103
104 #define DMA4_CCR_CONST_FILL_ENABLE BIT16
105 #define DMA4_CCR_TRANSPARENT_COPY_ENABLE BIT17
106
107 #define DMA4_CCR_SEL_SRC_DEST_SYNC_SOURCE BIT24
108
109 #endif
110