Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.c

   1 /** @file
   2   OMAP35xx DMA abstractions modeled on PCI IO protocol. EnableDma()/DisableDma()
   3   are from OMAP35xx TRM.
   4
   5   Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
   6
   7   This program and the accompanying materials
   8   are licensed and made available under the terms and conditions of the BSD License
   9   which accompanies this distribution.  The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #include <Base.h>
  18 #include <Library/DebugLib.h>
  19 #include <Library/OmapDmaLib.h>
  20 #include <Library/MemoryAllocationLib.h>
  21 #include <Library/UefiBootServicesTableLib.h>
  22 #include <Library/UncachedMemoryAllocationLib.h>
  23 #include <Library/IoLib.h>
  24 #include <Library/BaseMemoryLib.h>
  25 #include <Library/ArmLib.h>
  26 #include <Omap3530/Omap3530.h>
  27
  28 #include <Protocol/Cpu.h>
  29
  30 typedef struct {
  31   EFI_PHYSICAL_ADDRESS      HostAddress;
  32   EFI_PHYSICAL_ADDRESS      DeviceAddress;
  33   UINTN                     NumberOfBytes;
  34   DMA_MAP_OPERATION         Operation;
  35   BOOLEAN                   DoubleBuffer;
  36 } MAP_INFO_INSTANCE;
  37
  38
  39
  40 EFI_CPU_ARCH_PROTOCOL      *gCpu;
  41 UINTN                      gCacheAlignment = 0;
  42
  43 /**
  44   Configure OMAP DMA Channel
  45
  46   @param  Channel               DMA Channel to configure
  47   @param  Dma4                  Pointer to structure used to initialize DMA registers for the Channel
  48
  49   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
  50   @retval EFI_INVALID_PARAMETER Channel is not valid
  51   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.
  52
  53 **/
  54 EFI_STATUS
  55 EFIAPI
  56 EnableDmaChannel (
  57   IN  UINTN       Channel,
  58   IN  OMAP_DMA4   *DMA4
  59   )
  60 {
  61   UINT32  RegVal;
  62
  63
  64   if (Channel > DMA4_MAX_CHANNEL) {
  65     return EFI_INVALID_PARAMETER;
  66   }
  67
  68   /* 1) Configure the transfer parameters in the logical DMA registers */
  69   /*-------------------------------------------------------------------*/
  70
  71   /* a) Set the data type CSDP[1:0], the Read/Write Port access type
  72         CSDP[8:7]/[15:14], the Source/dest endianism CSDP[21]/CSDP[19],
  73         write mode CSDP[17:16], source/dest packed or nonpacked CSDP[6]/CSDP[13] */
  74
  75   // Read CSDP
  76   RegVal = MmioRead32 (DMA4_CSDP (Channel));
  77
  78   // Build reg
  79   RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );
  80   RegVal = ((RegVal & ~(0x3 <<  7)) | (DMA4->ReadPortAccessType << 7));
  81   RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessType << 14));
  82   RegVal = ((RegVal & ~(0x1 << 21)) | (DMA4->SourceEndiansim << 21));
  83   RegVal = ((RegVal & ~(0x1 << 19)) | (DMA4->DestinationEndianism << 19));
  84   RegVal = ((RegVal & ~(0x3 << 16)) | (DMA4->WriteMode << 16));
  85   RegVal = ((RegVal & ~(0x1 <<  6)) | (DMA4->SourcePacked << 6));
  86   RegVal = ((RegVal & ~(0x1 << 13)) | (DMA4->DestinationPacked << 13));
  87   // Write CSDP
  88   MmioWrite32 (DMA4_CSDP (Channel), RegVal);
  89
  90   /* b) Set the number of element per frame CEN[23:0]*/
  91   MmioWrite32 (DMA4_CEN (Channel), DMA4->NumberOfElementPerFrame);
  92
  93   /* c) Set the number of frame per block CFN[15:0]*/
  94   MmioWrite32 (DMA4_CFN (Channel), DMA4->NumberOfFramePerTransferBlock);
  95
  96   /* d) Set the Source/dest start address index CSSA[31:0]/CDSA[31:0]*/
  97   MmioWrite32 (DMA4_CSSA (Channel), DMA4->SourceStartAddress);
  98   MmioWrite32 (DMA4_CDSA (Channel), DMA4->DestinationStartAddress);
  99
 100   /* e) Set the Read Port addressing mode CCR[13:12], the Write Port addressing mode CCR[15:14],
 101         read/write priority CCR[6]/CCR[26]
 102         I changed LCH CCR[20:19]=00 and CCR[4:0]=00000 to
 103         LCH CCR[20:19]= DMA4->WriteRequestNumber and CCR[4:0]=DMA4->ReadRequestNumber
 104   */
 105
 106   // Read CCR
 107   RegVal = MmioRead32 (DMA4_CCR (Channel));
 108
 109   // Build reg
 110   RegVal  = ((RegVal &  ~0x1f)            | DMA4->ReadRequestNumber);
 111   RegVal  = ((RegVal &  ~(BIT20 | BIT19)) | DMA4->WriteRequestNumber << 19);
 112   RegVal  = ((RegVal & ~(0x3 << 12)) | (DMA4->ReadPortAccessMode << 12));
 113   RegVal  = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessMode << 14));
 114   RegVal  = ((RegVal & ~(0x1 <<  6)) | (DMA4->ReadPriority << 6));
 115   RegVal  = ((RegVal & ~(0x1 << 26)) | (DMA4->WritePriority << 26));
 116
 117   // Write CCR
 118   MmioWrite32 (DMA4_CCR (Channel), RegVal);
 119
 120   /* f)- Set the source element index CSEI[15:0]*/
 121   MmioWrite32 (DMA4_CSEI (Channel), DMA4->SourceElementIndex);
 122
 123   /* - Set the source frame index CSFI[15:0]*/
 124   MmioWrite32 (DMA4_CSFI (Channel), DMA4->SourceFrameIndex);
 125
 126
 127   /* - Set the destination element index CDEI[15:0]*/
 128   MmioWrite32 (DMA4_CDEI (Channel), DMA4->DestinationElementIndex);
 129
 130   /* - Set the destination frame index CDFI[31:0]*/
 131   MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);
 132
 133   MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);
 134
 135   // Enable all the status bits since we are polling
 136   MmioWrite32 (DMA4_CICR (Channel), DMA4_CICR_ENABLE_ALL);
 137   MmioWrite32 (DMA4_CSR (Channel),  DMA4_CSR_RESET);
 138
 139   /* 2) Start the DMA transfer by Setting the enable bit CCR[7]=1 */
 140   /*--------------------------------------------------------------*/
 141   //write enable bit
 142   MmioOr32 (DMA4_CCR(Channel), DMA4_CCR_ENABLE); //Launch transfer
 143
 144   return EFI_SUCCESS;
 145 }
 146
 147 /**
 148   Turn of DMA channel configured by EnableDma().
 149
 150   @param  Channel               DMA Channel to configure
 151   @param  SuccesMask            Bits in DMA4_CSR register indicate EFI_SUCCESS
 152   @param  ErrorMask             Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR
 153
 154   @retval EFI_SUCCESS           DMA hardware disabled
 155   @retval EFI_INVALID_PARAMETER Channel is not valid
 156   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.
 157
 158 **/
 159 EFI_STATUS
 160 EFIAPI
 161 DisableDmaChannel (
 162   IN  UINTN       Channel,
 163   IN  UINT32      SuccessMask,
 164   IN  UINT32      ErrorMask
 165   )
 166 {
 167   EFI_STATUS  Status = EFI_SUCCESS;
 168   UINT32      Reg;
 169
 170
 171   if (Channel > DMA4_MAX_CHANNEL) {
 172     return EFI_INVALID_PARAMETER;
 173   }
 174
 175   do {
 176     Reg = MmioRead32 (DMA4_CSR(Channel));
 177     if ((Reg & ErrorMask) != 0) {
 178       Status = EFI_DEVICE_ERROR;
 179       DEBUG ((EFI_D_ERROR, "DMA Error (%d) %x\n", Channel, Reg));
 180       break;
 181     }
 182   } while ((Reg & SuccessMask) != SuccessMask);
 183
 184
 185   // Disable all status bits and clear them
 186   MmioWrite32 (DMA4_CICR (Channel), 0);
 187   MmioWrite32 (DMA4_CSR (Channel),  DMA4_CSR_RESET);
 188
 189   MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE));
 190   return Status;
 191 }
 192
 193
 194
 195 /**
 196   Provides the DMA controller-specific addresses needed to access system memory.
 197
 198   Operation is relative to the DMA bus master.
 199
 200   @param  Operation             Indicates if the bus master is going to read or write to system memory.
 201   @param  HostAddress           The system memory address to map to the DMA controller.
 202   @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes
 203                                 that were mapped.
 204   @param  DeviceAddress         The resulting map address for the bus master controller to use to
 205                                 access the hosts HostAddress.
 206   @param  Mapping               A resulting value to pass to Unmap().
 207
 208   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
 209   @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.
 210   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 211   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 212   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.
 213
 214 **/
 215 EFI_STATUS
 216 EFIAPI
 217 DmaMap (
 218   IN     DMA_MAP_OPERATION              Operation,
 219   IN     VOID                           *HostAddress,
 220   IN OUT UINTN                          *NumberOfBytes,
 221   OUT    PHYSICAL_ADDRESS               *DeviceAddress,
 222   OUT    VOID                           **Mapping
 223   )
 224 {
 225   EFI_STATUS            Status;
 226   MAP_INFO_INSTANCE     *Map;
 227   VOID                  *Buffer;
 228
 229   if ( HostAddress == NULL || NumberOfBytes == NULL ||
 230        DeviceAddress == NULL || Mapping == NULL ) {
 231     return EFI_INVALID_PARAMETER;
 232   }
 233
 234
 235   if (Operation >= MapOperationMaximum) {
 236     return EFI_INVALID_PARAMETER;
 237   }
 238
 239   *DeviceAddress = ConvertToPhysicalAddress (HostAddress);
 240
 241   // Remember range so we can flush on the other side
 242   Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
 243   if (Map == NULL) {
 244     return  EFI_OUT_OF_RESOURCES;
 245   }
 246
 247   *Mapping = Map;
 248
 249   if (((UINTN)HostAddress & (gCacheAlignment - 1)) != 0) {
 250     Map->DoubleBuffer  = TRUE;
 251     Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (*NumberOfBytes), &Buffer);
 252     if (EFI_ERROR (Status)) {
 253       return Status;
 254     }
 255
 256     *DeviceAddress = (PHYSICAL_ADDRESS)(UINTN)Buffer;
 257
 258   } else {
 259     Map->DoubleBuffer  = FALSE;
 260   }
 261
 262   *NumberOfBytes &= *NumberOfBytes & ~(gCacheAlignment - 1); // Only do it on full cache lines
 263
 264   Map->HostAddress   = (UINTN)HostAddress;
 265   Map->DeviceAddress = *DeviceAddress;
 266   Map->NumberOfBytes = *NumberOfBytes;
 267   Map->Operation     = Operation;
 268
 269   if (Map->DoubleBuffer) {
 270     if (Map->Operation == MapOperationBusMasterWrite) {
 271       CopyMem ((VOID *)(UINTN)Map->DeviceAddress, (VOID *)(UINTN)Map->HostAddress, Map->NumberOfBytes);
 272     }
 273   } else {
 274     // EfiCpuFlushTypeWriteBack, EfiCpuFlushTypeInvalidate
 275     if (Map->Operation == MapOperationBusMasterWrite || Map->Operation == MapOperationBusMasterRead) {
 276       gCpu->FlushDataCache (gCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress,  Map->NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
 277     }
 278   }
 279
 280   return EFI_SUCCESS;
 281 }
 282
 283
 284 /**
 285   Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()
 286   operation and releases any corresponding resources.
 287
 288   @param  Mapping               The mapping value returned from DmaMap*().
 289
 290   @retval EFI_SUCCESS           The range was unmapped.
 291   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
 292
 293 **/
 294 EFI_STATUS
 295 EFIAPI
 296 DmaUnmap (
 297   IN  VOID                         *Mapping
 298   )
 299 {
 300   MAP_INFO_INSTANCE *Map;
 301
 302   if (Mapping == NULL) {
 303     ASSERT (FALSE);
 304     return EFI_INVALID_PARAMETER;
 305   }
 306
 307   Map = (MAP_INFO_INSTANCE *)Mapping;
 308
 309   if (Map->DoubleBuffer) {
 310     if (Map->Operation == MapOperationBusMasterRead) {
 311       CopyMem ((VOID *)(UINTN)Map->HostAddress, (VOID *)(UINTN)Map->DeviceAddress, Map->NumberOfBytes);
 312     }
 313
 314     DmaFreeBuffer (EFI_SIZE_TO_PAGES (Map->NumberOfBytes), (VOID *)(UINTN)Map->DeviceAddress);
 315
 316   } else {
 317     if (Map->Operation == MapOperationBusMasterWrite) {
 318       //
 319       // Make sure we read buffer from uncached memory and not the cache
 320       //
 321       gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
 322     }
 323   }
 324
 325   FreePool (Map);
 326
 327   return EFI_SUCCESS;
 328 }
 329
 330 /**
 331   Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.
 332   mapping.
 333
 334   @param  MemoryType            The type of memory to allocate, EfiBootServicesData or
 335                                 EfiRuntimeServicesData.
 336   @param  Pages                 The number of pages to allocate.
 337   @param  HostAddress           A pointer to store the base system memory address of the
 338                                 allocated range.
 339
 340                                 @retval EFI_SUCCESS           The requested memory pages were allocated.
 341   @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are
 342                                 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
 343   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 344   @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.
 345
 346 **/
 347 EFI_STATUS
 348 EFIAPI
 349 DmaAllocateBuffer (
 350   IN  EFI_MEMORY_TYPE              MemoryType,
 351   IN  UINTN                        Pages,
 352   OUT VOID                         **HostAddress
 353   )
 354 {
 355   if (HostAddress == NULL) {
 356     return EFI_INVALID_PARAMETER;
 357   }
 358
 359   //
 360   // The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
 361   //
 362   // We used uncached memory to keep coherency
 363   //
 364   if (MemoryType == EfiBootServicesData) {
 365     *HostAddress = UncachedAllocatePages (Pages);
 366   } else if (MemoryType != EfiRuntimeServicesData) {
 367     *HostAddress = UncachedAllocateRuntimePages (Pages);
 368   } else {
 369     return EFI_INVALID_PARAMETER;
 370   }
 371
 372   return EFI_SUCCESS;
 373 }
 374
 375
 376 /**
 377   Frees memory that was allocated with DmaAllocateBuffer().
 378
 379   @param  Pages                 The number of pages to free.
 380   @param  HostAddress           The base system memory address of the allocated range.
 381
 382   @retval EFI_SUCCESS           The requested memory pages were freed.
 383   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
 384                                 was not allocated with DmaAllocateBuffer().
 385
 386 **/
 387 EFI_STATUS
 388 EFIAPI
 389 DmaFreeBuffer (
 390   IN  UINTN                        Pages,
 391   IN  VOID                         *HostAddress
 392   )
 393 {
 394   if (HostAddress == NULL) {
 395      return EFI_INVALID_PARAMETER;
 396   }
 397
 398   UncachedFreePages (HostAddress, Pages);
 399   return EFI_SUCCESS;
 400 }
 401
 402
 403 EFI_STATUS
 404 EFIAPI
 405 OmapDmaLibConstructor (
 406   IN EFI_HANDLE       ImageHandle,
 407   IN EFI_SYSTEM_TABLE *SystemTable
 408   )
 409 {
 410   EFI_STATUS              Status;
 411
 412   // Get the Cpu protocol for later use
 413   Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
 414   ASSERT_EFI_ERROR(Status);
 415
 416   gCacheAlignment = ArmDataCacheLineLength ();
 417
 418   return Status;
 419 }
 420