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Add a DMA lib for the OMAP. It is a combination of PCI IO (generic ARM) DMA functions...
[mirror_edk2.git] / Omap35xxPkg / Library / OmapDmaLib / OmapDmaLib.c
1 /** @file
2 OMAP35xx DMA abstractions modeled on PCI IO protocol. EnableDma()/DisableDma()
3 are from OMAP35xx TRM.
4
5 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
6
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #include <Base.h>
18 #include <Library/DebugLib.h>
19 #include <Library/OmapDmaLib.h>
20 #include <Library/MemoryAllocationLib.h>
21 #include <Library/UefiBootServicesTableLib.h>
22 #include <Library/UncachedMemoryAllocationLib.h>
23 #include <Library/IoLib.h>
24 #include <Omap3530/Omap3530.h>
25
26 #include <Protocol/Cpu.h>
27
28 typedef struct {
29 EFI_PHYSICAL_ADDRESS HostAddress;
30 EFI_PHYSICAL_ADDRESS DeviceAddress;
31 UINTN NumberOfBytes;
32 DMA_MAP_OPERATION Operation;
33 } MAP_INFO_INSTANCE;
34
35
36
37 EFI_CPU_ARCH_PROTOCOL *gCpu;
38
39 /**
40 Configure OMAP DMA Channel
41
42 @param Channel DMA Channel to configure
43 @param Dma4 Pointer to structure used to initialize DMA registers for the Channel
44
45 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
46 @retval EFI_INVALID_PARAMETER Channel is not valid
47 @retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
48
49 **/
50 EFI_STATUS
51 EFIAPI
52 EnableDmaChannel (
53 IN UINTN Channel,
54 IN OMAP_DMA4 *DMA4
55 )
56 {
57 UINT32 RegVal;
58
59
60 if (Channel > DMA4_MAX_CHANNEL) {
61 return EFI_INVALID_PARAMETER;
62 }
63
64 /* 1) Configure the transfer parameters in the logical DMA registers */
65 /*-------------------------------------------------------------------*/
66
67 /* a) Set the data type CSDP[1:0], the Read/Write Port access type
68 CSDP[8:7]/[15:14], the Source/dest endianism CSDP[21]/CSDP[19],
69 write mode CSDP[17:16], source/dest packed or nonpacked CSDP[6]/CSDP[13] */
70
71 // Read CSDP
72 RegVal = MmioRead32 (DMA4_CSDP (Channel));
73
74 // Build reg
75 RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );
76 RegVal = ((RegVal & ~(0x3 << 7)) | (DMA4->ReadPortAccessType << 7));
77 RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessType << 14));
78 RegVal = ((RegVal & ~(0x1 << 21)) | (DMA4->SourceEndiansim << 21));
79 RegVal = ((RegVal & ~(0x1 << 19)) | (DMA4->DestinationEndianism << 19));
80 RegVal = ((RegVal & ~(0x3 << 16)) | (DMA4->WriteMode << 16));
81 RegVal = ((RegVal & ~(0x1 << 6)) | (DMA4->SourcePacked << 6));
82 RegVal = ((RegVal & ~(0x1 << 13)) | (DMA4->DestinationPacked << 13));
83 // Write CSDP
84 MmioWrite32 (DMA4_CSDP (Channel), RegVal);
85
86 /* b) Set the number of element per frame CEN[23:0]*/
87 MmioWrite32 (DMA4_CEN (Channel), DMA4->NumberOfElementPerFrame);
88
89 /* c) Set the number of frame per block CFN[15:0]*/
90 MmioWrite32 (DMA4_CFN (Channel), DMA4->NumberOfFramePerTransferBlock);
91
92 /* d) Set the Source/dest start address index CSSA[31:0]/CDSA[31:0]*/
93 MmioWrite32 (DMA4_CSSA (Channel), DMA4->SourceStartAddress);
94 MmioWrite32 (DMA4_CDSA (Channel), DMA4->DestinationStartAddress);
95
96 /* e) Set the Read Port addressing mode CCR[13:12], the Write Port addressing mode CCR[15:14],
97 read/write priority CCR[6]/CCR[26]
98 I changed LCH CCR[20:19]=00 and CCR[4:0]=00000 to
99 LCH CCR[20:19]= DMA4->WriteRequestNumber and CCR[4:0]=DMA4->ReadRequestNumber
100 */
101
102 // Read CCR
103 RegVal = MmioRead32 (DMA4_CCR (Channel));
104
105 // Build reg
106 RegVal = ((RegVal & ~0x1f) | DMA4->ReadRequestNumber);
107 RegVal = ((RegVal & ~(BIT20 | BIT19)) | DMA4->WriteRequestNumber << 19);
108 RegVal = ((RegVal & ~(0x3 << 12)) | (DMA4->ReadPortAccessMode << 12));
109 RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessMode << 14));
110 RegVal = ((RegVal & ~(0x1 << 6)) | (DMA4->ReadPriority << 6));
111 RegVal = ((RegVal & ~(0x1 << 26)) | (DMA4->WritePriority << 26));
112
113 // Write CCR
114 MmioWrite32 (DMA4_CCR (Channel), RegVal);
115
116 /* f)- Set the source element index CSEI[15:0]*/
117 MmioWrite32 (DMA4_CSEI (Channel), DMA4->SourceElementIndex);
118
119 /* - Set the source frame index CSFI[15:0]*/
120 MmioWrite32 (DMA4_CSFI (Channel), DMA4->SourceFrameIndex);
121
122
123 /* - Set the destination element index CDEI[15:0]*/
124 MmioWrite32 (DMA4_CDEI (Channel), DMA4->DestinationElementIndex);
125
126 /* - Set the destination frame index CDFI[31:0]*/
127 MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);
128
129 /* 2) Start the DMA transfer by Setting the enable bit CCR[7]=1 */
130 /*--------------------------------------------------------------*/
131 //write enable bit
132 MmioOr32 (DMA4_CCR(0), DMA4_CCR_ENABLE); //Launch transfer
133
134 return EFI_SUCCESS;
135 }
136
137 /**
138 Turn of DMA channel configured by EnableDma().
139
140 @param Channel DMA Channel to configure
141
142 @retval EFI_SUCCESS DMA hardware disabled
143 @retval EFI_INVALID_PARAMETER Channel is not valid
144 @retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
145
146 **/
147 EFI_STATUS
148 EFIAPI
149 DisableDmaChannel (
150 IN UINTN Channel
151 )
152 {
153 if (Channel > DMA4_MAX_CHANNEL) {
154 return EFI_INVALID_PARAMETER;
155 }
156
157 MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE));
158 return EFI_SUCCESS;
159 }
160
161 /**
162 Provides the DMA controller-specific addresses needed to access system memory.
163
164 Operation is relative to the DMA bus master.
165
166 @param Operation Indicates if the bus master is going to read or write to system memory.
167 @param HostAddress The system memory address to map to the DMA controller.
168 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
169 that were mapped.
170 @param DeviceAddress The resulting map address for the bus master controller to use to
171 access the hosts HostAddress.
172 @param Mapping A resulting value to pass to Unmap().
173
174 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
175 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
176 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
177 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
178 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
179
180 **/
181 EFI_STATUS
182 EFIAPI
183 DmaMap (
184 IN DMA_MAP_OPERATION Operation,
185 IN VOID *HostAddress,
186 IN OUT UINTN *NumberOfBytes,
187 OUT PHYSICAL_ADDRESS *DeviceAddress,
188 OUT VOID **Mapping
189 )
190 {
191 MAP_INFO_INSTANCE *Map;
192
193 if ( HostAddress == NULL || NumberOfBytes == NULL ||
194 DeviceAddress == NULL || Mapping == NULL ) {
195 return EFI_INVALID_PARAMETER;
196 }
197
198
199 if (Operation >= MapOperationMaximum) {
200 return EFI_INVALID_PARAMETER;
201 }
202
203 *DeviceAddress = ConvertToPhysicalAddress (HostAddress);
204
205 // Remember range so we can flush on the other side
206 Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
207 if (Map == NULL) {
208 return EFI_OUT_OF_RESOURCES;
209 }
210
211 *Mapping = Map;
212
213 Map->HostAddress = (UINTN)HostAddress;
214 Map->DeviceAddress = *DeviceAddress;
215 Map->NumberOfBytes = *NumberOfBytes;
216 Map->Operation = Operation;
217
218 // EfiCpuFlushTypeWriteBack, EfiCpuFlushTypeInvalidate
219 gCpu->FlushDataCache (gCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
220
221 return EFI_SUCCESS;
222 }
223
224
225 /**
226 Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()
227 operation and releases any corresponding resources.
228
229 @param Mapping The mapping value returned from DmaMap*().
230
231 @retval EFI_SUCCESS The range was unmapped.
232 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
233
234 **/
235 EFI_STATUS
236 EFIAPI
237 DmaUnmap (
238 IN VOID *Mapping
239 )
240 {
241 MAP_INFO_INSTANCE *Map;
242
243 if (Mapping == NULL) {
244 ASSERT (FALSE);
245 return EFI_INVALID_PARAMETER;
246 }
247
248 Map = (MAP_INFO_INSTANCE *)Mapping;
249 if (Map->Operation == MapOperationBusMasterWrite) {
250 //
251 // Make sure we read buffer from uncached memory and not the cache
252 //
253 gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
254 }
255
256 FreePool (Map);
257
258 return EFI_SUCCESS;
259 }
260
261 /**
262 Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.
263 mapping.
264
265 @param MemoryType The type of memory to allocate, EfiBootServicesData or
266 EfiRuntimeServicesData.
267 @param Pages The number of pages to allocate.
268 @param HostAddress A pointer to store the base system memory address of the
269 allocated range.
270
271 @retval EFI_SUCCESS The requested memory pages were allocated.
272 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
273 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
274 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
275 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
276
277 **/EFI_STATUS
278 EFIAPI
279 DmaAllocateBuffer (
280 IN EFI_MEMORY_TYPE MemoryType,
281 IN UINTN Pages,
282 OUT VOID **HostAddress
283 )
284 {
285 if (HostAddress == NULL) {
286 return EFI_INVALID_PARAMETER;
287 }
288
289 //
290 // The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
291 //
292 // We used uncached memory to keep coherency
293 //
294 if (MemoryType == EfiBootServicesData) {
295 *HostAddress = UncachedAllocatePages (Pages);
296 } else if (MemoryType != EfiRuntimeServicesData) {
297 *HostAddress = UncachedAllocateRuntimePages (Pages);
298 } else {
299 return EFI_INVALID_PARAMETER;
300 }
301
302 return EFI_SUCCESS;
303 }
304
305
306 /**
307 Frees memory that was allocated with DmaAllocateBuffer().
308
309 @param Pages The number of pages to free.
310 @param HostAddress The base system memory address of the allocated range.
311
312 @retval EFI_SUCCESS The requested memory pages were freed.
313 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
314 was not allocated with DmaAllocateBuffer().
315
316 **/
317 EFI_STATUS
318 EFIAPI
319 DmaFreeBuffer (
320 IN UINTN Pages,
321 IN VOID *HostAddress
322 )
323 {
324 if (HostAddress == NULL) {
325 return EFI_INVALID_PARAMETER;
326 }
327
328 UncachedFreePages (HostAddress, Pages);
329 return EFI_SUCCESS;
330 }
331
332
333 EFI_STATUS
334 EFIAPI
335 OmapDmaLibConstructor (
336 IN EFI_HANDLE ImageHandle,
337 IN EFI_SYSTEM_TABLE *SystemTable
338 )
339 {
340 EFI_STATUS Status;
341
342 // Get the Cpu protocol for later use
343 Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
344 ASSERT_EFI_ERROR(Status);
345
346 return EFI_SUCCESS;
347 }
348