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1 /** @file
2 MMC/SD Card driver for OMAP 35xx (SDIO not supported)
3
4 This driver always produces a BlockIo protocol but it starts off with no Media
5 present. A TimerCallBack detects when media is inserted or removed and after
6 a media change event a call to BlockIo ReadBlocks/WriteBlocks will cause the
7 media to be detected (or removed) and the BlockIo Media structure will get
8 updated. No MMC/SD Card harward registers are updated until the first BlockIo
9 ReadBlocks/WriteBlocks after media has been insterted (booting with a card
10 plugged in counts as an insertion event).
11
12 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
13
14 SPDX-License-Identifier: BSD-2-Clause-Patent
15
16 **/
17
18 #include "MMCHS.h"
19
20 EFI_BLOCK_IO_MEDIA gMMCHSMedia = {
21 SIGNATURE_32('s','d','i','o'), // MediaId
22 TRUE, // RemovableMedia
23 FALSE, // MediaPresent
24 FALSE, // LogicalPartition
25 FALSE, // ReadOnly
26 FALSE, // WriteCaching
27 512, // BlockSize
28 4, // IoAlign
29 0, // Pad
30 0 // LastBlock
31 };
32
33 typedef struct {
34 VENDOR_DEVICE_PATH Mmc;
35 EFI_DEVICE_PATH End;
36 } MMCHS_DEVICE_PATH;
37
38 MMCHS_DEVICE_PATH gMmcHsDevicePath = {
39 {
40 {
41 HARDWARE_DEVICE_PATH,
42 HW_VENDOR_DP,
43 {
44 (UINT8)(sizeof(VENDOR_DEVICE_PATH)),
45 (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8),
46 },
47 },
48 { 0xb615f1f5, 0x5088, 0x43cd, { 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00 } },
49 },
50 {
51 END_DEVICE_PATH_TYPE,
52 END_ENTIRE_DEVICE_PATH_SUBTYPE,
53 { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }
54 }
55 };
56
57 CARD_INFO gCardInfo;
58 EMBEDDED_EXTERNAL_DEVICE *gTPS65950;
59 EFI_EVENT gTimerEvent;
60 BOOLEAN gMediaChange = FALSE;
61
62 //
63 // Internal Functions
64 //
65
66
67 VOID
68 ParseCardCIDData (
69 UINT32 Response0,
70 UINT32 Response1,
71 UINT32 Response2,
72 UINT32 Response3
73 )
74 {
75 gCardInfo.CIDData.MDT = ((Response0 >> 8) & 0xFFF);
76 gCardInfo.CIDData.PSN = (((Response0 >> 24) & 0xFF) | ((Response1 & 0xFFFFFF) << 8));
77 gCardInfo.CIDData.PRV = ((Response1 >> 24) & 0xFF);
78 gCardInfo.CIDData.PNM[4] = ((Response2) & 0xFF);
79 gCardInfo.CIDData.PNM[3] = ((Response2 >> 8) & 0xFF);
80 gCardInfo.CIDData.PNM[2] = ((Response2 >> 16) & 0xFF);
81 gCardInfo.CIDData.PNM[1] = ((Response2 >> 24) & 0xFF);
82 gCardInfo.CIDData.PNM[0] = ((Response3) & 0xFF);
83 gCardInfo.CIDData.OID = ((Response3 >> 8) & 0xFFFF);
84 gCardInfo.CIDData.MID = ((Response3 >> 24) & 0xFF);
85 }
86
87
88 VOID
89 UpdateMMCHSClkFrequency (
90 UINTN NewCLKD
91 )
92 {
93 //Set Clock enable to 0x0 to not provide the clock to the card
94 MmioAnd32 (MMCHS_SYSCTL, ~CEN);
95
96 //Set new clock frequency.
97 MmioAndThenOr32 (MMCHS_SYSCTL, ~CLKD_MASK, NewCLKD << 6);
98
99 //Poll till Internal Clock Stable
100 while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
101
102 //Set Clock enable to 0x1 to provide the clock to the card
103 MmioOr32 (MMCHS_SYSCTL, CEN);
104 }
105
106
107 EFI_STATUS
108 SendCmd (
109 UINTN Cmd,
110 UINTN CmdInterruptEnableVal,
111 UINTN CmdArgument
112 )
113 {
114 UINTN MmcStatus;
115 UINTN RetryCount = 0;
116
117 //Check if command line is in use or not. Poll till command line is available.
118 while ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) == DATI_NOT_ALLOWED);
119
120 //Provide the block size.
121 MmioWrite32 (MMCHS_BLK, BLEN_512BYTES);
122
123 //Setting Data timeout counter value to max value.
124 MmioAndThenOr32 (MMCHS_SYSCTL, ~DTO_MASK, DTO_VAL);
125
126 //Clear Status register.
127 MmioWrite32 (MMCHS_STAT, 0xFFFFFFFF);
128
129 //Set command argument register
130 MmioWrite32 (MMCHS_ARG, CmdArgument);
131
132 //Enable interrupt enable events to occur
133 MmioWrite32 (MMCHS_IE, CmdInterruptEnableVal);
134
135 //Send a command
136 MmioWrite32 (MMCHS_CMD, Cmd);
137
138 //Check for the command status.
139 while (RetryCount < MAX_RETRY_COUNT) {
140 do {
141 MmcStatus = MmioRead32 (MMCHS_STAT);
142 } while (MmcStatus == 0);
143
144 //Read status of command response
145 if ((MmcStatus & ERRI) != 0) {
146
147 //Perform soft-reset for mmci_cmd line.
148 MmioOr32 (MMCHS_SYSCTL, SRC);
149 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
150
151 DEBUG ((EFI_D_INFO, "MmcStatus: %x\n", MmcStatus));
152 return EFI_DEVICE_ERROR;
153 }
154
155 //Check if command is completed.
156 if ((MmcStatus & CC) == CC) {
157 MmioWrite32 (MMCHS_STAT, CC);
158 break;
159 }
160
161 RetryCount++;
162 }
163
164 if (RetryCount == MAX_RETRY_COUNT) {
165 return EFI_TIMEOUT;
166 }
167
168 return EFI_SUCCESS;
169 }
170
171
172 VOID
173 GetBlockInformation (
174 UINTN *BlockSize,
175 UINTN *NumBlocks
176 )
177 {
178 CSD_SDV2 *CsdSDV2Data;
179 UINTN CardSize;
180
181 if (gCardInfo.CardType == SD_CARD_2_HIGH) {
182 CsdSDV2Data = (CSD_SDV2 *)&gCardInfo.CSDData;
183
184 //Populate BlockSize.
185 *BlockSize = (0x1UL << CsdSDV2Data->READ_BL_LEN);
186
187 //Calculate Total number of blocks.
188 CardSize = CsdSDV2Data->C_SIZELow16 | (CsdSDV2Data->C_SIZEHigh6 << 2);
189 *NumBlocks = ((CardSize + 1) * 1024);
190 } else {
191 //Populate BlockSize.
192 *BlockSize = (0x1UL << gCardInfo.CSDData.READ_BL_LEN);
193
194 //Calculate Total number of blocks.
195 CardSize = gCardInfo.CSDData.C_SIZELow2 | (gCardInfo.CSDData.C_SIZEHigh10 << 2);
196 *NumBlocks = (CardSize + 1) * (1 << (gCardInfo.CSDData.C_SIZE_MULT + 2));
197 }
198
199 //For >=2G card, BlockSize may be 1K, but the transfer size is 512 bytes.
200 if (*BlockSize > 512) {
201 *NumBlocks = MultU64x32(*NumBlocks, *BlockSize/2);
202 *BlockSize = 512;
203 }
204
205 DEBUG ((EFI_D_INFO, "Card type: %x, BlockSize: %x, NumBlocks: %x\n", gCardInfo.CardType, *BlockSize, *NumBlocks));
206 }
207
208
209 VOID
210 CalculateCardCLKD (
211 UINTN *ClockFrequencySelect
212 )
213 {
214 UINT8 MaxDataTransferRate;
215 UINTN TransferRateValue = 0;
216 UINTN TimeValue = 0 ;
217 UINTN Frequency = 0;
218
219 MaxDataTransferRate = gCardInfo.CSDData.TRAN_SPEED;
220
221 // For SD Cards we would need to send CMD6 to set
222 // speeds abouve 25MHz. High Speed mode 50 MHz and up
223
224 //Calculate Transfer rate unit (Bits 2:0 of TRAN_SPEED)
225 switch (MaxDataTransferRate & 0x7) {
226 case 0:
227 TransferRateValue = 100 * 1000;
228 break;
229
230 case 1:
231 TransferRateValue = 1 * 1000 * 1000;
232 break;
233
234 case 2:
235 TransferRateValue = 10 * 1000 * 1000;
236 break;
237
238 case 3:
239 TransferRateValue = 100 * 1000 * 1000;
240 break;
241
242 default:
243 DEBUG((EFI_D_ERROR, "Invalid parameter.\n"));
244 ASSERT(FALSE);
245 }
246
247 //Calculate Time value (Bits 6:3 of TRAN_SPEED)
248 switch ((MaxDataTransferRate >> 3) & 0xF) {
249 case 1:
250 TimeValue = 10;
251 break;
252
253 case 2:
254 TimeValue = 12;
255 break;
256
257 case 3:
258 TimeValue = 13;
259 break;
260
261 case 4:
262 TimeValue = 15;
263 break;
264
265 case 5:
266 TimeValue = 20;
267 break;
268
269 case 6:
270 TimeValue = 25;
271 break;
272
273 case 7:
274 TimeValue = 30;
275 break;
276
277 case 8:
278 TimeValue = 35;
279 break;
280
281 case 9:
282 TimeValue = 40;
283 break;
284
285 case 10:
286 TimeValue = 45;
287 break;
288
289 case 11:
290 TimeValue = 50;
291 break;
292
293 case 12:
294 TimeValue = 55;
295 break;
296
297 case 13:
298 TimeValue = 60;
299 break;
300
301 case 14:
302 TimeValue = 70;
303 break;
304
305 case 15:
306 TimeValue = 80;
307 break;
308
309 default:
310 DEBUG((EFI_D_ERROR, "Invalid parameter.\n"));
311 ASSERT(FALSE);
312 }
313
314 Frequency = TransferRateValue * TimeValue/10;
315
316 //Calculate Clock divider value to program in MMCHS_SYSCTL[CLKD] field.
317 *ClockFrequencySelect = ((MMC_REFERENCE_CLK/Frequency) + 1);
318
319 DEBUG ((EFI_D_INFO, "MaxDataTransferRate: 0x%x, Frequency: %d KHz, ClockFrequencySelect: %x\n", MaxDataTransferRate, Frequency/1000, *ClockFrequencySelect));
320 }
321
322
323 VOID
324 GetCardConfigurationData (
325 VOID
326 )
327 {
328 UINTN BlockSize;
329 UINTN NumBlocks;
330 UINTN ClockFrequencySelect;
331
332 //Calculate BlockSize and Total number of blocks in the detected card.
333 GetBlockInformation(&BlockSize, &NumBlocks);
334 gCardInfo.BlockSize = BlockSize;
335 gCardInfo.NumBlocks = NumBlocks;
336
337 //Calculate Card clock divider value.
338 CalculateCardCLKD(&ClockFrequencySelect);
339 gCardInfo.ClockFrequencySelect = ClockFrequencySelect;
340 }
341
342
343 EFI_STATUS
344 InitializeMMCHS (
345 VOID
346 )
347 {
348 UINT8 Data = 0;
349 EFI_STATUS Status;
350
351 //Select Device group to belong to P1 device group in Power IC.
352 Data = DEV_GRP_P1;
353 Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEV_GRP), 1, &Data);
354 ASSERT_EFI_ERROR(Status);
355
356 //Configure voltage regulator for MMC1 in Power IC to output 3.0 voltage.
357 Data = VSEL_3_00V;
358 Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEDICATED_REG), 1, &Data);
359 ASSERT_EFI_ERROR(Status);
360
361 //After ramping up voltage, set VDDS stable bit to indicate that voltage level is stable.
362 MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));
363
364 // Enable WP GPIO
365 MmioAndThenOr32 (GPIO1_BASE + GPIO_OE, ~BIT23, BIT23);
366
367 // Enable Card Detect
368 Data = CARD_DETECT_ENABLE;
369 gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, TPS65950_GPIO_CTRL), 1, &Data);
370
371
372 return Status;
373 }
374
375
376 EFI_STATUS
377 PerformCardIdenfication (
378 VOID
379 )
380 {
381 EFI_STATUS Status;
382 UINTN CmdArgument = 0;
383 UINTN Response = 0;
384 UINTN RetryCount = 0;
385 BOOLEAN SDCmd8Supported = FALSE;
386
387 //Enable interrupts.
388 MmioWrite32 (MMCHS_IE, (BADA_EN | CERR_EN | DEB_EN | DCRC_EN | DTO_EN | CIE_EN |
389 CEB_EN | CCRC_EN | CTO_EN | BRR_EN | BWR_EN | TC_EN | CC_EN));
390
391 //Controller INIT procedure start.
392 MmioOr32 (MMCHS_CON, INIT);
393 MmioWrite32 (MMCHS_CMD, 0x00000000);
394 while (!(MmioRead32 (MMCHS_STAT) & CC));
395
396 //Wait for 1 ms
397 gBS->Stall(1000);
398
399 //Set CC bit to 0x1 to clear the flag
400 MmioOr32 (MMCHS_STAT, CC);
401
402 //Retry INIT procedure.
403 MmioWrite32 (MMCHS_CMD, 0x00000000);
404 while (!(MmioRead32 (MMCHS_STAT) & CC));
405
406 //End initialization sequence
407 MmioAnd32 (MMCHS_CON, ~INIT);
408
409 MmioOr32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_ON));
410
411 //Change clock frequency to 400KHz to fit protocol
412 UpdateMMCHSClkFrequency(CLKD_400KHZ);
413
414 MmioOr32 (MMCHS_CON, OD);
415
416 //Send CMD0 command.
417 Status = SendCmd (CMD0, CMD0_INT_EN, CmdArgument);
418 if (EFI_ERROR(Status)) {
419 DEBUG ((EFI_D_ERROR, "Cmd0 fails.\n"));
420 return Status;
421 }
422
423 DEBUG ((EFI_D_INFO, "CMD0 response: %x\n", MmioRead32 (MMCHS_RSP10)));
424
425 //Send CMD5 command.
426 Status = SendCmd (CMD5, CMD5_INT_EN, CmdArgument);
427 if (Status == EFI_SUCCESS) {
428 DEBUG ((EFI_D_ERROR, "CMD5 Success. SDIO card. Follow SDIO card specification.\n"));
429 DEBUG ((EFI_D_INFO, "CMD5 response: %x\n", MmioRead32 (MMCHS_RSP10)));
430 //NOTE: Returning unsupported error for now. Need to implement SDIO specification.
431 return EFI_UNSUPPORTED;
432 } else {
433 DEBUG ((EFI_D_INFO, "CMD5 fails. Not an SDIO card.\n"));
434 }
435
436 MmioOr32 (MMCHS_SYSCTL, SRC);
437 gBS->Stall(1000);
438 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
439
440 //Send CMD8 command. (New v2.00 command for Voltage check)
441 //Only 2.7V - 3.6V is supported for SD2.0, only SD 2.0 card can pass.
442 //MMC & SD1.1 card will fail this command.
443 CmdArgument = CMD8_ARG;
444 Status = SendCmd (CMD8, CMD8_INT_EN, CmdArgument);
445 if (Status == EFI_SUCCESS) {
446 Response = MmioRead32 (MMCHS_RSP10);
447 DEBUG ((EFI_D_INFO, "CMD8 success. CMD8 response: %x\n", Response));
448 if (Response != CmdArgument) {
449 return EFI_DEVICE_ERROR;
450 }
451 DEBUG ((EFI_D_INFO, "Card is SD2.0\n"));
452 SDCmd8Supported = TRUE; //Supports high capacity.
453 } else {
454 DEBUG ((EFI_D_INFO, "CMD8 fails. Not an SD2.0 card.\n"));
455 }
456
457 MmioOr32 (MMCHS_SYSCTL, SRC);
458 gBS->Stall(1000);
459 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
460
461 //Poll till card is busy
462 while (RetryCount < MAX_RETRY_COUNT) {
463 //Send CMD55 command.
464 CmdArgument = 0;
465 Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument);
466 if (Status == EFI_SUCCESS) {
467 DEBUG ((EFI_D_INFO, "CMD55 success. CMD55 response: %x\n", MmioRead32 (MMCHS_RSP10)));
468 gCardInfo.CardType = SD_CARD;
469 } else {
470 DEBUG ((EFI_D_INFO, "CMD55 fails.\n"));
471 gCardInfo.CardType = MMC_CARD;
472 }
473
474 //Send appropriate command for the card type which got detected.
475 if (gCardInfo.CardType == SD_CARD) {
476 CmdArgument = ((UINTN *) &(gCardInfo.OCRData))[0];
477
478 //Set HCS bit.
479 if (SDCmd8Supported) {
480 CmdArgument |= HCS;
481 }
482
483 Status = SendCmd (ACMD41, ACMD41_INT_EN, CmdArgument);
484 if (EFI_ERROR(Status)) {
485 DEBUG ((EFI_D_INFO, "ACMD41 fails.\n"));
486 return Status;
487 }
488 ((UINT32 *) &(gCardInfo.OCRData))[0] = MmioRead32 (MMCHS_RSP10);
489 DEBUG ((EFI_D_INFO, "SD card detected. ACMD41 OCR: %x\n", ((UINT32 *) &(gCardInfo.OCRData))[0]));
490 } else if (gCardInfo.CardType == MMC_CARD) {
491 CmdArgument = 0;
492 Status = SendCmd (CMD1, CMD1_INT_EN, CmdArgument);
493 if (EFI_ERROR(Status)) {
494 DEBUG ((EFI_D_INFO, "CMD1 fails.\n"));
495 return Status;
496 }
497 Response = MmioRead32 (MMCHS_RSP10);
498 DEBUG ((EFI_D_INFO, "MMC card detected.. CMD1 response: %x\n", Response));
499
500 //NOTE: For now, I am skipping this since I only have an SD card.
501 //Compare card OCR and host OCR (Section 22.6.1.3.2.4)
502 return EFI_UNSUPPORTED; //For now, MMC is not supported.
503 }
504
505 //Poll the card until it is out of its power-up sequence.
506 if (gCardInfo.OCRData.Busy == 1) {
507
508 if (SDCmd8Supported) {
509 gCardInfo.CardType = SD_CARD_2;
510 }
511
512 //Card is ready. Check CCS (Card capacity status) bit (bit#30).
513 //SD 2.0 standard card will response with CCS 0, SD high capacity card will respond with CCS 1.
514 if (gCardInfo.OCRData.AccessMode & BIT1) {
515 gCardInfo.CardType = SD_CARD_2_HIGH;
516 DEBUG ((EFI_D_INFO, "High capacity card.\n"));
517 } else {
518 DEBUG ((EFI_D_INFO, "Standard capacity card.\n"));
519 }
520
521 break;
522 }
523
524 gBS->Stall(1000);
525 RetryCount++;
526 }
527
528 if (RetryCount == MAX_RETRY_COUNT) {
529 DEBUG ((EFI_D_ERROR, "Timeout error. RetryCount: %d\n", RetryCount));
530 return EFI_TIMEOUT;
531 }
532
533 //Read CID data.
534 CmdArgument = 0;
535 Status = SendCmd (CMD2, CMD2_INT_EN, CmdArgument);
536 if (EFI_ERROR(Status)) {
537 DEBUG ((EFI_D_ERROR, "CMD2 fails. Status: %x\n", Status));
538 return Status;
539 }
540
541 DEBUG ((EFI_D_INFO, "CMD2 response: %x %x %x %x\n", MmioRead32 (MMCHS_RSP10), MmioRead32 (MMCHS_RSP32), MmioRead32 (MMCHS_RSP54), MmioRead32 (MMCHS_RSP76)));
542
543 //Parse CID register data.
544 ParseCardCIDData(MmioRead32 (MMCHS_RSP10), MmioRead32 (MMCHS_RSP32), MmioRead32 (MMCHS_RSP54), MmioRead32 (MMCHS_RSP76));
545
546 //Read RCA
547 CmdArgument = 0;
548 Status = SendCmd (CMD3, CMD3_INT_EN, CmdArgument);
549 if (EFI_ERROR(Status)) {
550 DEBUG ((EFI_D_ERROR, "CMD3 fails. Status: %x\n", Status));
551 return Status;
552 }
553
554 //Set RCA for the detected card. RCA is CMD3 response.
555 gCardInfo.RCA = (MmioRead32 (MMCHS_RSP10) >> 16);
556 DEBUG ((EFI_D_INFO, "CMD3 response: RCA %x\n", gCardInfo.RCA));
557
558 //MMC Bus setting change after card identification.
559 MmioAnd32 (MMCHS_CON, ~OD);
560 MmioOr32 (MMCHS_HCTL, SDVS_3_0_V);
561 UpdateMMCHSClkFrequency(CLKD_400KHZ); //Set the clock frequency to 400KHz.
562
563 return EFI_SUCCESS;
564 }
565
566
567 EFI_STATUS
568 GetCardSpecificData (
569 VOID
570 )
571 {
572 EFI_STATUS Status;
573 UINTN CmdArgument;
574
575 //Send CMD9 to retrieve CSD.
576 CmdArgument = gCardInfo.RCA << 16;
577 Status = SendCmd (CMD9, CMD9_INT_EN, CmdArgument);
578 if (EFI_ERROR(Status)) {
579 DEBUG ((EFI_D_ERROR, "CMD9 fails. Status: %x\n", Status));
580 return Status;
581 }
582
583 //Populate 128-bit CSD register data.
584 ((UINT32 *)&(gCardInfo.CSDData))[0] = MmioRead32 (MMCHS_RSP10);
585 ((UINT32 *)&(gCardInfo.CSDData))[1] = MmioRead32 (MMCHS_RSP32);
586 ((UINT32 *)&(gCardInfo.CSDData))[2] = MmioRead32 (MMCHS_RSP54);
587 ((UINT32 *)&(gCardInfo.CSDData))[3] = MmioRead32 (MMCHS_RSP76);
588
589 DEBUG ((EFI_D_INFO, "CMD9 response: %x %x %x %x\n", MmioRead32 (MMCHS_RSP10), MmioRead32 (MMCHS_RSP32), MmioRead32 (MMCHS_RSP54), MmioRead32 (MMCHS_RSP76)));
590
591 //Calculate total number of blocks and max. data transfer rate supported by the detected card.
592 GetCardConfigurationData();
593
594 return Status;
595 }
596
597
598 EFI_STATUS
599 PerformCardConfiguration (
600 VOID
601 )
602 {
603 UINTN CmdArgument = 0;
604 EFI_STATUS Status;
605
606 //Send CMD7
607 CmdArgument = gCardInfo.RCA << 16;
608 Status = SendCmd (CMD7, CMD7_INT_EN, CmdArgument);
609 if (EFI_ERROR(Status)) {
610 DEBUG ((EFI_D_ERROR, "CMD7 fails. Status: %x\n", Status));
611 return Status;
612 }
613
614 if ((gCardInfo.CardType != UNKNOWN_CARD) && (gCardInfo.CardType != MMC_CARD)) {
615 // We could read SCR register, but SD Card Phys spec stats any SD Card shall
616 // set SCR.SD_BUS_WIDTHS to support 4-bit mode, so why bother?
617
618 // Send ACMD6 (application specific commands must be prefixed with CMD55)
619 Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument);
620 if (!EFI_ERROR (Status)) {
621 // set device into 4-bit data bus mode
622 Status = SendCmd (ACMD6, ACMD6_INT_EN, 0x2);
623 if (!EFI_ERROR (Status)) {
624 // Set host controler into 4-bit mode
625 MmioOr32 (MMCHS_HCTL, DTW_4_BIT);
626 DEBUG ((EFI_D_INFO, "SD Memory Card set to 4-bit mode\n"));
627 }
628 }
629 }
630
631 //Send CMD16 to set the block length
632 CmdArgument = gCardInfo.BlockSize;
633 Status = SendCmd (CMD16, CMD16_INT_EN, CmdArgument);
634 if (EFI_ERROR(Status)) {
635 DEBUG ((EFI_D_ERROR, "CMD16 fails. Status: %x\n", Status));
636 return Status;
637 }
638
639 //Change MMCHS clock frequency to what detected card can support.
640 UpdateMMCHSClkFrequency(gCardInfo.ClockFrequencySelect);
641
642 return EFI_SUCCESS;
643 }
644
645
646 EFI_STATUS
647 ReadBlockData (
648 IN EFI_BLOCK_IO_PROTOCOL *This,
649 OUT VOID *Buffer
650 )
651 {
652 UINTN MmcStatus;
653 UINTN *DataBuffer = Buffer;
654 UINTN DataSize = This->Media->BlockSize/4;
655 UINTN Count;
656 UINTN RetryCount = 0;
657
658 //Check controller status to make sure there is no error.
659 while (RetryCount < MAX_RETRY_COUNT) {
660 do {
661 //Read Status.
662 MmcStatus = MmioRead32 (MMCHS_STAT);
663 } while(MmcStatus == 0);
664
665 //Check if Buffer read ready (BRR) bit is set?
666 if (MmcStatus & BRR) {
667
668 //Clear BRR bit
669 MmioOr32 (MMCHS_STAT, BRR);
670
671 //Read block worth of data.
672 for (Count = 0; Count < DataSize; Count++) {
673 *DataBuffer++ = MmioRead32 (MMCHS_DATA);
674 }
675 break;
676 }
677 RetryCount++;
678 }
679
680 if (RetryCount == MAX_RETRY_COUNT) {
681 return EFI_TIMEOUT;
682 }
683
684 return EFI_SUCCESS;
685 }
686
687
688 EFI_STATUS
689 WriteBlockData (
690 IN EFI_BLOCK_IO_PROTOCOL *This,
691 OUT VOID *Buffer
692 )
693 {
694 UINTN MmcStatus;
695 UINTN *DataBuffer = Buffer;
696 UINTN DataSize = This->Media->BlockSize/4;
697 UINTN Count;
698 UINTN RetryCount = 0;
699
700 //Check controller status to make sure there is no error.
701 while (RetryCount < MAX_RETRY_COUNT) {
702 do {
703 //Read Status.
704 MmcStatus = MmioRead32 (MMCHS_STAT);
705 } while(MmcStatus == 0);
706
707 //Check if Buffer write ready (BWR) bit is set?
708 if (MmcStatus & BWR) {
709
710 //Clear BWR bit
711 MmioOr32 (MMCHS_STAT, BWR);
712
713 //Write block worth of data.
714 for (Count = 0; Count < DataSize; Count++) {
715 MmioWrite32 (MMCHS_DATA, *DataBuffer++);
716 }
717
718 break;
719 }
720 RetryCount++;
721 }
722
723 if (RetryCount == MAX_RETRY_COUNT) {
724 return EFI_TIMEOUT;
725 }
726
727 return EFI_SUCCESS;
728 }
729
730 EFI_STATUS
731 DmaBlocks (
732 IN EFI_BLOCK_IO_PROTOCOL *This,
733 IN UINTN Lba,
734 IN OUT VOID *Buffer,
735 IN UINTN BlockCount,
736 IN OPERATION_TYPE OperationType
737 )
738 {
739 EFI_STATUS Status;
740 UINTN DmaSize = 0;
741 UINTN Cmd = 0;
742 UINTN CmdInterruptEnable;
743 UINTN CmdArgument;
744 VOID *BufferMap;
745 EFI_PHYSICAL_ADDRESS BufferAddress;
746 OMAP_DMA4 Dma4;
747 DMA_MAP_OPERATION DmaOperation;
748 EFI_STATUS MmcStatus;
749 UINTN RetryCount = 0;
750
751 CpuDeadLoop ();
752 // Map passed in buffer for DMA xfer
753 DmaSize = BlockCount * This->Media->BlockSize;
754 Status = DmaMap (DmaOperation, Buffer, &DmaSize, &BufferAddress, &BufferMap);
755 if (EFI_ERROR (Status)) {
756 return Status;
757 }
758
759 ZeroMem (&DmaOperation, sizeof (DMA_MAP_OPERATION));
760
761
762 Dma4.DataType = 2; // DMA4_CSDPi[1:0] 32-bit elements from MMCHS_DATA
763
764 Dma4.SourceEndiansim = 0; // DMA4_CSDPi[21]
765
766 Dma4.DestinationEndianism = 0; // DMA4_CSDPi[19]
767
768 Dma4.SourcePacked = 0; // DMA4_CSDPi[6]
769
770 Dma4.DestinationPacked = 0; // DMA4_CSDPi[13]
771
772 Dma4.NumberOfElementPerFrame = This->Media->BlockSize/4; // DMA4_CENi (TRM 4K is optimum value)
773
774 Dma4.NumberOfFramePerTransferBlock = BlockCount; // DMA4_CFNi
775
776 Dma4.ReadPriority = 0; // DMA4_CCRi[6] Low priority read
777
778 Dma4.WritePriority = 0; // DMA4_CCRi[23] Prefetech disabled
779
780
781 //Populate the command information based on the operation type.
782 if (OperationType == READ) {
783 Cmd = CMD18; //Multiple block read
784 CmdInterruptEnable = CMD18_INT_EN;
785 DmaOperation = MapOperationBusMasterCommonBuffer;
786
787 Dma4.ReadPortAccessType =0 ; // DMA4_CSDPi[8:7] Can not burst MMCHS_DATA reg
788
789 Dma4.WritePortAccessType = 3; // DMA4_CSDPi[15:14] Memory burst 16x32
790
791 Dma4.WriteMode = 1; // DMA4_CSDPi[17:16] Write posted
792
793
794
795 Dma4.SourceStartAddress = MMCHS_DATA; // DMA4_CSSAi
796
797 Dma4.DestinationStartAddress = (UINT32)BufferAddress; // DMA4_CDSAi
798
799 Dma4.SourceElementIndex = 1; // DMA4_CSEi
800
801 Dma4.SourceFrameIndex = 0x200; // DMA4_CSFi
802
803 Dma4.DestinationElementIndex = 1; // DMA4_CDEi
804
805 Dma4.DestinationFrameIndex = 0; // DMA4_CDFi
806
807
808
809 Dma4.ReadPortAccessMode = 0; // DMA4_CCRi[13:12] Always read MMCHS_DATA
810
811 Dma4.WritePortAccessMode = 1; // DMA4_CCRi[15:14] Post increment memory address
812
813 Dma4.ReadRequestNumber = 0x1e; // DMA4_CCRi[4:0] Syncro with MMCA_DMA_RX (61)
814
815 Dma4.WriteRequestNumber = 1; // DMA4_CCRi[20:19] Syncro upper 0x3e == 62 (one based)
816
817 } else if (OperationType == WRITE) {
818 Cmd = CMD25; //Multiple block write
819 CmdInterruptEnable = CMD25_INT_EN;
820 DmaOperation = MapOperationBusMasterRead;
821
822 Dma4.ReadPortAccessType = 3; // DMA4_CSDPi[8:7] Memory burst 16x32
823
824 Dma4.WritePortAccessType = 0; // DMA4_CSDPi[15:14] Can not burst MMCHS_DATA reg
825
826 Dma4.WriteMode = 1; // DMA4_CSDPi[17:16] Write posted ???
827
828
829
830 Dma4.SourceStartAddress = (UINT32)BufferAddress; // DMA4_CSSAi
831
832 Dma4.DestinationStartAddress = MMCHS_DATA; // DMA4_CDSAi
833
834 Dma4.SourceElementIndex = 1; // DMA4_CSEi
835
836 Dma4.SourceFrameIndex = 0x200; // DMA4_CSFi
837
838 Dma4.DestinationElementIndex = 1; // DMA4_CDEi
839
840 Dma4.DestinationFrameIndex = 0; // DMA4_CDFi
841
842
843
844 Dma4.ReadPortAccessMode = 1; // DMA4_CCRi[13:12] Post increment memory address
845
846 Dma4.WritePortAccessMode = 0; // DMA4_CCRi[15:14] Always write MMCHS_DATA
847
848 Dma4.ReadRequestNumber = 0x1d; // DMA4_CCRi[4:0] Syncro with MMCA_DMA_TX (60)
849
850 Dma4.WriteRequestNumber = 1; // DMA4_CCRi[20:19] Syncro upper 0x3d == 61 (one based)
851
852 } else {
853 return EFI_INVALID_PARAMETER;
854 }
855
856
857 EnableDmaChannel (2, &Dma4);
858
859
860 //Set command argument based on the card access mode (Byte mode or Block mode)
861 if (gCardInfo.OCRData.AccessMode & BIT1) {
862 CmdArgument = Lba;
863 } else {
864 CmdArgument = Lba * This->Media->BlockSize;
865 }
866
867 //Send Command.
868 Status = SendCmd (Cmd, CmdInterruptEnable, CmdArgument);
869 if (EFI_ERROR (Status)) {
870 DEBUG ((EFI_D_ERROR, "CMD fails. Status: %x\n", Status));
871 return Status;
872 }
873
874 //Check for the Transfer completion.
875 while (RetryCount < MAX_RETRY_COUNT) {
876 //Read Status
877 do {
878 MmcStatus = MmioRead32 (MMCHS_STAT);
879 } while (MmcStatus == 0);
880
881 //Check if Transfer complete (TC) bit is set?
882 if (MmcStatus & TC) {
883 break;
884 } else {
885 DEBUG ((EFI_D_ERROR, "MmcStatus for TC: %x\n", MmcStatus));
886 //Check if DEB, DCRC or DTO interrupt occured.
887 if ((MmcStatus & DEB) | (MmcStatus & DCRC) | (MmcStatus & DTO)) {
888 //There was an error during the data transfer.
889
890 //Set SRD bit to 1 and wait until it return to 0x0.
891 MmioOr32 (MMCHS_SYSCTL, SRD);
892 while((MmioRead32 (MMCHS_SYSCTL) & SRD) != 0x0);
893
894 DisableDmaChannel (2, DMA4_CSR_BLOCK, DMA4_CSR_ERR);
895 DmaUnmap (BufferMap);
896 return EFI_DEVICE_ERROR;
897 }
898 }
899 RetryCount++;
900 }
901
902 DisableDmaChannel (2, DMA4_CSR_BLOCK, DMA4_CSR_ERR);
903 Status = DmaUnmap (BufferMap);
904
905 if (RetryCount == MAX_RETRY_COUNT) {
906 DEBUG ((EFI_D_ERROR, "TransferBlockData timed out.\n"));
907 return EFI_TIMEOUT;
908 }
909
910 return Status;
911 }
912
913
914 EFI_STATUS
915 TransferBlock (
916 IN EFI_BLOCK_IO_PROTOCOL *This,
917 IN UINTN Lba,
918 IN OUT VOID *Buffer,
919 IN OPERATION_TYPE OperationType
920 )
921 {
922 EFI_STATUS Status;
923 UINTN MmcStatus;
924 UINTN RetryCount = 0;
925 UINTN Cmd = 0;
926 UINTN CmdInterruptEnable = 0;
927 UINTN CmdArgument = 0;
928
929
930 //Populate the command information based on the operation type.
931 if (OperationType == READ) {
932 Cmd = CMD17; //Single block read
933 CmdInterruptEnable = CMD18_INT_EN;
934 } else if (OperationType == WRITE) {
935 Cmd = CMD24; //Single block write
936 CmdInterruptEnable = CMD24_INT_EN;
937 }
938
939 //Set command argument based on the card access mode (Byte mode or Block mode)
940 if (gCardInfo.OCRData.AccessMode & BIT1) {
941 CmdArgument = Lba;
942 } else {
943 CmdArgument = Lba * This->Media->BlockSize;
944 }
945
946 //Send Command.
947 Status = SendCmd (Cmd, CmdInterruptEnable, CmdArgument);
948 if (EFI_ERROR(Status)) {
949 DEBUG ((EFI_D_ERROR, "CMD fails. Status: %x\n", Status));
950 return Status;
951 }
952
953 //Read or Write data.
954 if (OperationType == READ) {
955 Status = ReadBlockData (This, Buffer);
956 if (EFI_ERROR(Status)) {
957 DEBUG((EFI_D_ERROR, "ReadBlockData fails.\n"));
958 return Status;
959 }
960 } else if (OperationType == WRITE) {
961 Status = WriteBlockData (This, Buffer);
962 if (EFI_ERROR(Status)) {
963 DEBUG((EFI_D_ERROR, "WriteBlockData fails.\n"));
964 return Status;
965 }
966 }
967
968 //Check for the Transfer completion.
969 while (RetryCount < MAX_RETRY_COUNT) {
970 //Read Status
971 do {
972 MmcStatus = MmioRead32 (MMCHS_STAT);
973 } while (MmcStatus == 0);
974
975 //Check if Transfer complete (TC) bit is set?
976 if (MmcStatus & TC) {
977 break;
978 } else {
979 DEBUG ((EFI_D_ERROR, "MmcStatus for TC: %x\n", MmcStatus));
980 //Check if DEB, DCRC or DTO interrupt occured.
981 if ((MmcStatus & DEB) | (MmcStatus & DCRC) | (MmcStatus & DTO)) {
982 //There was an error during the data transfer.
983
984 //Set SRD bit to 1 and wait until it return to 0x0.
985 MmioOr32 (MMCHS_SYSCTL, SRD);
986 while((MmioRead32 (MMCHS_SYSCTL) & SRD) != 0x0);
987
988 return EFI_DEVICE_ERROR;
989 }
990 }
991 RetryCount++;
992 }
993
994 if (RetryCount == MAX_RETRY_COUNT) {
995 DEBUG ((EFI_D_ERROR, "TransferBlockData timed out.\n"));
996 return EFI_TIMEOUT;
997 }
998
999 return EFI_SUCCESS;
1000 }
1001
1002 BOOLEAN
1003 CardPresent (
1004 VOID
1005 )
1006 {
1007 EFI_STATUS Status;
1008 UINT8 Data;
1009
1010 //
1011 // Card detect is a GPIO0 on the TPS65950
1012 //
1013 Status = gTPS65950->Read (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, GPIODATAIN1), 1, &Data);
1014 if (EFI_ERROR (Status)) {
1015 return FALSE;
1016 }
1017
1018 if ((Data & CARD_DETECT_BIT) == CARD_DETECT_BIT) {
1019 // No Card present
1020 return FALSE;
1021 } else {
1022 return TRUE;
1023 }
1024 }
1025
1026 EFI_STATUS
1027 DetectCard (
1028 VOID
1029 )
1030 {
1031 EFI_STATUS Status;
1032
1033 if (!CardPresent ()) {
1034 return EFI_NO_MEDIA;
1035 }
1036
1037 //Initialize MMC host controller clocks.
1038 Status = InitializeMMCHS ();
1039 if (EFI_ERROR(Status)) {
1040 DEBUG ((EFI_D_ERROR, "Initialize MMC host controller fails. Status: %x\n", Status));
1041 return Status;
1042 }
1043
1044 //Software reset of the MMCHS host controller.
1045 MmioWrite32 (MMCHS_SYSCONFIG, SOFTRESET);
1046 gBS->Stall(1000);
1047 while ((MmioRead32 (MMCHS_SYSSTATUS) & RESETDONE_MASK) != RESETDONE);
1048
1049 //Soft reset for all.
1050 MmioWrite32 (MMCHS_SYSCTL, SRA);
1051 gBS->Stall(1000);
1052 while ((MmioRead32 (MMCHS_SYSCTL) & SRA) != 0x0);
1053
1054 //Voltage capabilities initialization. Activate VS18 and VS30.
1055 MmioOr32 (MMCHS_CAPA, (VS30 | VS18));
1056
1057 //Wakeup configuration
1058 MmioOr32 (MMCHS_SYSCONFIG, ENAWAKEUP);
1059 MmioOr32 (MMCHS_HCTL, IWE);
1060
1061 //MMCHS Controller default initialization
1062 MmioOr32 (MMCHS_CON, (OD | DW8_1_4_BIT | CEATA_OFF));
1063
1064 MmioWrite32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_OFF));
1065
1066 //Enable internal clock
1067 MmioOr32 (MMCHS_SYSCTL, ICE);
1068
1069 //Set the clock frequency to 80KHz.
1070 UpdateMMCHSClkFrequency (CLKD_80KHZ);
1071
1072 //Enable SD bus power.
1073 MmioOr32 (MMCHS_HCTL, (SDBP_ON));
1074
1075 //Poll till SD bus power bit is set.
1076 while ((MmioRead32 (MMCHS_HCTL) & SDBP_MASK) != SDBP_ON);
1077
1078 //Card idenfication
1079 Status = PerformCardIdenfication ();
1080 if (EFI_ERROR(Status)) {
1081 DEBUG ((EFI_D_ERROR, "No MMC/SD card detected.\n"));
1082 return Status;
1083 }
1084
1085 //Get CSD (Card specific data) for the detected card.
1086 Status = GetCardSpecificData();
1087 if (EFI_ERROR(Status)) {
1088 return Status;
1089 }
1090
1091 //Configure the card in data transfer mode.
1092 Status = PerformCardConfiguration();
1093 if (EFI_ERROR(Status)) {
1094 return Status;
1095 }
1096
1097 //Patch the Media structure.
1098 gMMCHSMedia.LastBlock = (gCardInfo.NumBlocks - 1);
1099 gMMCHSMedia.BlockSize = gCardInfo.BlockSize;
1100 gMMCHSMedia.ReadOnly = (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;
1101 gMMCHSMedia.MediaPresent = TRUE;
1102 gMMCHSMedia.MediaId++;
1103
1104 DEBUG ((EFI_D_INFO, "SD Card Media Change on Handle 0x%08x\n", gImageHandle));
1105
1106 return Status;
1107 }
1108
1109 #define MAX_MMCHS_TRANSFER_SIZE 0x4000
1110
1111 EFI_STATUS
1112 SdReadWrite (
1113 IN EFI_BLOCK_IO_PROTOCOL *This,
1114 IN UINTN Lba,
1115 OUT VOID *Buffer,
1116 IN UINTN BufferSize,
1117 IN OPERATION_TYPE OperationType
1118 )
1119 {
1120 EFI_STATUS Status = EFI_SUCCESS;
1121 UINTN RetryCount = 0;
1122 UINTN BlockCount;
1123 UINTN BytesToBeTranferedThisPass = 0;
1124 UINTN BytesRemainingToBeTransfered;
1125 EFI_TPL OldTpl;
1126
1127 BOOLEAN Update;
1128
1129
1130
1131 Update = FALSE;
1132
1133 if (gMediaChange) {
1134 Update = TRUE;
1135 Status = DetectCard ();
1136 if (EFI_ERROR (Status)) {
1137 // We detected a removal
1138 gMMCHSMedia.MediaPresent = FALSE;
1139 gMMCHSMedia.LastBlock = 0;
1140 gMMCHSMedia.BlockSize = 512; // Should be zero but there is a bug in DiskIo
1141 gMMCHSMedia.ReadOnly = FALSE;
1142 }
1143 gMediaChange = FALSE;
1144 } else if (!gMMCHSMedia.MediaPresent) {
1145 Status = EFI_NO_MEDIA;
1146 goto Done;
1147 }
1148
1149 if (Update) {
1150 DEBUG ((EFI_D_INFO, "SD Card ReinstallProtocolInterface ()\n"));
1151 gBS->ReinstallProtocolInterface (
1152 gImageHandle,
1153 &gEfiBlockIoProtocolGuid,
1154 &gBlockIo,
1155 &gBlockIo
1156 );
1157 return EFI_MEDIA_CHANGED;
1158 }
1159
1160 if (EFI_ERROR (Status)) {
1161 goto Done;
1162 }
1163
1164 if (Buffer == NULL) {
1165 Status = EFI_INVALID_PARAMETER;
1166 goto Done;
1167 }
1168
1169 if (Lba > This->Media->LastBlock) {
1170 Status = EFI_INVALID_PARAMETER;
1171 goto Done;
1172 }
1173
1174 if ((BufferSize % This->Media->BlockSize) != 0) {
1175 Status = EFI_BAD_BUFFER_SIZE;
1176 goto Done;
1177 }
1178
1179 //Check if the data lines are not in use.
1180 while ((RetryCount++ < MAX_RETRY_COUNT) && ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) != DATI_ALLOWED));
1181 if (RetryCount == MAX_RETRY_COUNT) {
1182 Status = EFI_TIMEOUT;
1183 goto Done;
1184 }
1185
1186 OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
1187
1188 BytesRemainingToBeTransfered = BufferSize;
1189 while (BytesRemainingToBeTransfered > 0) {
1190
1191 if (gMediaChange) {
1192 Status = EFI_NO_MEDIA;
1193 DEBUG ((EFI_D_INFO, "SdReadWrite() EFI_NO_MEDIA due to gMediaChange\n"));
1194 goto DoneRestoreTPL;
1195 }
1196
1197 // Turn OFF DMA path until it is debugged
1198 // BytesToBeTranferedThisPass = (BytesToBeTranferedThisPass >= MAX_MMCHS_TRANSFER_SIZE) ? MAX_MMCHS_TRANSFER_SIZE : BytesRemainingToBeTransfered;
1199 BytesToBeTranferedThisPass = This->Media->BlockSize;
1200
1201 BlockCount = BytesToBeTranferedThisPass/This->Media->BlockSize;
1202
1203 if (BlockCount > 1) {
1204 Status = DmaBlocks (This, Lba, Buffer, BlockCount, OperationType);
1205 } else {
1206 //Transfer a block worth of data.
1207 Status = TransferBlock (This, Lba, Buffer, OperationType);
1208 }
1209
1210 if (EFI_ERROR(Status)) {
1211 DEBUG ((EFI_D_ERROR, "TransferBlockData fails. %x\n", Status));
1212 goto DoneRestoreTPL;
1213 }
1214
1215 BytesRemainingToBeTransfered -= BytesToBeTranferedThisPass;
1216 Lba += BlockCount;
1217 Buffer = (UINT8 *)Buffer + This->Media->BlockSize;
1218 }
1219
1220 DoneRestoreTPL:
1221
1222 gBS->RestoreTPL (OldTpl);
1223
1224 Done:
1225
1226 return Status;
1227
1228 }
1229
1230
1231 /**
1232
1233 Reset the Block Device.
1234
1235
1236
1237 @param This Indicates a pointer to the calling context.
1238
1239 @param ExtendedVerification Driver may perform diagnostics on reset.
1240
1241
1242
1243 @retval EFI_SUCCESS The device was reset.
1244
1245 @retval EFI_DEVICE_ERROR The device is not functioning properly and could
1246
1247 not be reset.
1248
1249
1250
1251 **/
1252 EFI_STATUS
1253 EFIAPI
1254 MMCHSReset (
1255 IN EFI_BLOCK_IO_PROTOCOL *This,
1256 IN BOOLEAN ExtendedVerification
1257 )
1258 {
1259 return EFI_SUCCESS;
1260 }
1261
1262
1263 /**
1264
1265 Read BufferSize bytes from Lba into Buffer.
1266
1267
1268
1269 @param This Indicates a pointer to the calling context.
1270
1271 @param MediaId Id of the media, changes every time the media is replaced.
1272
1273 @param Lba The starting Logical Block Address to read from
1274
1275 @param BufferSize Size of Buffer, must be a multiple of device block size.
1276
1277 @param Buffer A pointer to the destination buffer for the data. The caller is
1278
1279 responsible for either having implicit or explicit ownership of the buffer.
1280
1281
1282
1283 @retval EFI_SUCCESS The data was read correctly from the device.
1284
1285 @retval EFI_DEVICE_ERROR The device reported an error while performing the read.
1286
1287 @retval EFI_NO_MEDIA There is no media in the device.
1288
1289 @retval EFI_MEDIA_CHANGED The MediaId does not matched the current device.
1290
1291 @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device.
1292
1293 @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid,
1294
1295 or the buffer is not on proper alignment.
1296
1297 EFI_STATUS
1298
1299 **/
1300 EFI_STATUS
1301 EFIAPI
1302 MMCHSReadBlocks (
1303 IN EFI_BLOCK_IO_PROTOCOL *This,
1304 IN UINT32 MediaId,
1305 IN EFI_LBA Lba,
1306 IN UINTN BufferSize,
1307 OUT VOID *Buffer
1308 )
1309 {
1310 EFI_STATUS Status;
1311
1312 //Perform Read operation.
1313 Status = SdReadWrite (This, (UINTN)Lba, Buffer, BufferSize, READ);
1314
1315 return Status;
1316
1317 }
1318
1319
1320 /**
1321
1322 Write BufferSize bytes from Lba into Buffer.
1323
1324
1325
1326 @param This Indicates a pointer to the calling context.
1327
1328 @param MediaId The media ID that the write request is for.
1329
1330 @param Lba The starting logical block address to be written. The caller is
1331
1332 responsible for writing to only legitimate locations.
1333
1334 @param BufferSize Size of Buffer, must be a multiple of device block size.
1335
1336 @param Buffer A pointer to the source buffer for the data.
1337
1338
1339
1340 @retval EFI_SUCCESS The data was written correctly to the device.
1341
1342 @retval EFI_WRITE_PROTECTED The device can not be written to.
1343
1344 @retval EFI_DEVICE_ERROR The device reported an error while performing the write.
1345
1346 @retval EFI_NO_MEDIA There is no media in the device.
1347
1348 @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device.
1349
1350 @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device.
1351
1352 @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid,
1353
1354 or the buffer is not on proper alignment.
1355
1356
1357
1358 **/
1359 EFI_STATUS
1360 EFIAPI
1361 MMCHSWriteBlocks (
1362 IN EFI_BLOCK_IO_PROTOCOL *This,
1363 IN UINT32 MediaId,
1364 IN EFI_LBA Lba,
1365 IN UINTN BufferSize,
1366 IN VOID *Buffer
1367 )
1368 {
1369 EFI_STATUS Status;
1370
1371 //Perform write operation.
1372 Status = SdReadWrite (This, (UINTN)Lba, Buffer, BufferSize, WRITE);
1373
1374
1375 return Status;
1376
1377 }
1378
1379
1380 /**
1381
1382 Flush the Block Device.
1383
1384
1385
1386 @param This Indicates a pointer to the calling context.
1387
1388
1389
1390 @retval EFI_SUCCESS All outstanding data was written to the device
1391
1392 @retval EFI_DEVICE_ERROR The device reported an error while writting back the data
1393
1394 @retval EFI_NO_MEDIA There is no media in the device.
1395
1396
1397
1398 **/
1399 EFI_STATUS
1400 EFIAPI
1401 MMCHSFlushBlocks (
1402 IN EFI_BLOCK_IO_PROTOCOL *This
1403 )
1404 {
1405 return EFI_SUCCESS;
1406 }
1407
1408
1409 EFI_BLOCK_IO_PROTOCOL gBlockIo = {
1410 EFI_BLOCK_IO_INTERFACE_REVISION, // Revision
1411 &gMMCHSMedia, // *Media
1412 MMCHSReset, // Reset
1413 MMCHSReadBlocks, // ReadBlocks
1414 MMCHSWriteBlocks, // WriteBlocks
1415 MMCHSFlushBlocks // FlushBlocks
1416 };
1417
1418
1419 /**
1420
1421 Timer callback to convert card present hardware into a boolean that indicates
1422
1423 a media change event has happened. If you just check the GPIO you could see
1424
1425 card 1 and then check again after card 1 was removed and card 2 was inserted
1426
1427 and you would still see media present. Thus you need the timer tick to catch
1428
1429 the toggle event.
1430
1431
1432
1433 @param Event Event whose notification function is being invoked.
1434
1435 @param Context The pointer to the notification function's context,
1436
1437 which is implementation-dependent. Not used.
1438
1439
1440
1441 **/
1442 VOID
1443 EFIAPI
1444 TimerCallback (
1445 IN EFI_EVENT Event,
1446 IN VOID *Context
1447 )
1448 {
1449 BOOLEAN Present;
1450
1451 Present = CardPresent ();
1452 if (gMMCHSMedia.MediaPresent) {
1453 if (!Present && !gMediaChange) {
1454 gMediaChange = TRUE;
1455 }
1456 } else {
1457 if (Present && !gMediaChange) {
1458 gMediaChange = TRUE;
1459 }
1460 }
1461 }
1462
1463
1464 EFI_STATUS
1465 EFIAPI
1466 MMCHSInitialize (
1467 IN EFI_HANDLE ImageHandle,
1468 IN EFI_SYSTEM_TABLE *SystemTable
1469 )
1470 {
1471 EFI_STATUS Status;
1472
1473 Status = gBS->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);
1474 ASSERT_EFI_ERROR(Status);
1475
1476 ZeroMem (&gCardInfo, sizeof (CARD_INFO));
1477
1478 Status = gBS->CreateEvent (EVT_TIMER | EVT_NOTIFY_SIGNAL, TPL_CALLBACK, TimerCallback, NULL, &gTimerEvent);
1479 ASSERT_EFI_ERROR (Status);
1480
1481 Status = gBS->SetTimer (gTimerEvent, TimerPeriodic, FixedPcdGet32 (PcdMmchsTimerFreq100NanoSeconds));
1482 ASSERT_EFI_ERROR (Status);
1483
1484 //Publish BlockIO.
1485 Status = gBS->InstallMultipleProtocolInterfaces (
1486 &ImageHandle,
1487 &gEfiBlockIoProtocolGuid, &gBlockIo,
1488 &gEfiDevicePathProtocolGuid, &gMmcHsDevicePath,
1489 NULL
1490 );
1491 return Status;
1492 }