Omap35xxPkg/MmcHostDxe/MmcHostDxe.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
   4 *  Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
   5 *
   6 *  SPDX-License-Identifier: BSD-2-Clause-Patent
   7 *
   8 **/
   9
  10 #include "MmcHostDxe.h"
  11
  12 EMBEDDED_EXTERNAL_DEVICE   *gTPS65950;
  13 UINT8                      mMaxDataTransferRate = 0;
  14 UINT32                     mRca = 0;
  15 BOOLEAN                    mBitModeSet = FALSE;
  16
  17
  18 typedef struct {
  19   VENDOR_DEVICE_PATH  Mmc;
  20   EFI_DEVICE_PATH     End;
  21 } MMCHS_DEVICE_PATH;
  22
  23 MMCHS_DEVICE_PATH gMMCDevicePath = {
  24   {
  25     {
  26       HARDWARE_DEVICE_PATH,
  27       HW_VENDOR_DP,
  28       { (UINT8)(sizeof(VENDOR_DEVICE_PATH)), (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8) },
  29     },
  30     { 0xb615f1f5, 0x5088, 0x43cd, { 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00 } }
  31   },
  32   {
  33     END_DEVICE_PATH_TYPE,
  34     END_ENTIRE_DEVICE_PATH_SUBTYPE,
  35     { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }
  36   }
  37 };
  38
  39 BOOLEAN
  40 IgnoreCommand (
  41   UINT32 Command
  42   )
  43 {
  44   switch(Command) {
  45     case MMC_CMD12:
  46       return TRUE;
  47     case MMC_CMD13:
  48       return TRUE;
  49     default:
  50       return FALSE;
  51   }
  52 }
  53
  54 UINT32
  55 TranslateCommand (
  56   UINT32 Command
  57   )
  58 {
  59   UINT32 Translation;
  60
  61   switch(Command) {
  62     case MMC_CMD2:
  63       Translation = CMD2;
  64       break;
  65     case MMC_CMD3:
  66       Translation = CMD3;
  67       break;
  68     /*case MMC_CMD6:
  69       Translation = CMD6;
  70       break;*/
  71     case MMC_CMD7:
  72       Translation = CMD7;
  73       break;
  74     case MMC_CMD8:
  75       Translation = CMD8;
  76       break;
  77     case MMC_CMD9:
  78       Translation = CMD9;
  79       break;
  80     /*case MMC_CMD12:
  81       Translation = CMD12;
  82       break;
  83     case MMC_CMD13:
  84       Translation = CMD13;
  85       break;*/
  86     case MMC_CMD16:
  87       Translation = CMD16;
  88       break;
  89     case MMC_CMD17:
  90       Translation = 0x113A0014;//CMD17;
  91       break;
  92     case MMC_CMD24:
  93       Translation = CMD24 | 4;
  94       break;
  95     case MMC_CMD55:
  96       Translation = CMD55;
  97       break;
  98     case MMC_ACMD41:
  99       Translation = ACMD41;
 100       break;
 101     default:
 102       Translation = Command;
 103   }
 104
 105   return Translation;
 106 }
 107
 108 VOID
 109 CalculateCardCLKD (
 110   UINTN *ClockFrequencySelect
 111   )
 112 {
 113   UINTN    TransferRateValue = 0;
 114   UINTN    TimeValue = 0 ;
 115   UINTN    Frequency = 0;
 116
 117   DEBUG ((DEBUG_BLKIO, "CalculateCardCLKD()\n"));
 118
 119   // For SD Cards  we would need to send CMD6 to set
 120   // speeds abouve 25MHz. High Speed mode 50 MHz and up
 121
 122   // Calculate Transfer rate unit (Bits 2:0 of TRAN_SPEED)
 123   switch (mMaxDataTransferRate & 0x7) { // 2
 124     case 0:
 125       TransferRateValue = 100 * 1000;
 126       break;
 127
 128     case 1:
 129       TransferRateValue = 1 * 1000 * 1000;
 130       break;
 131
 132     case 2:
 133       TransferRateValue = 10 * 1000 * 1000;
 134       break;
 135
 136     case 3:
 137       TransferRateValue = 100 * 1000 * 1000;
 138       break;
 139
 140     default:
 141       DEBUG ((DEBUG_BLKIO, "Invalid parameter.\n"));
 142       ASSERT(FALSE);
 143       return;
 144   }
 145
 146   //Calculate Time value (Bits 6:3 of TRAN_SPEED)
 147   switch ((mMaxDataTransferRate >> 3) & 0xF) { // 6
 148     case 1:
 149       TimeValue = 10;
 150       break;
 151
 152     case 2:
 153       TimeValue = 12;
 154       break;
 155
 156     case 3:
 157       TimeValue = 13;
 158       break;
 159
 160     case 4:
 161       TimeValue = 15;
 162       break;
 163
 164     case 5:
 165       TimeValue = 20;
 166       break;
 167
 168     case 6:
 169       TimeValue = 25;
 170       break;
 171
 172     case 7:
 173       TimeValue = 30;
 174       break;
 175
 176     case 8:
 177       TimeValue = 35;
 178       break;
 179
 180     case 9:
 181       TimeValue = 40;
 182       break;
 183
 184     case 10:
 185       TimeValue = 45;
 186       break;
 187
 188     case 11:
 189       TimeValue = 50;
 190       break;
 191
 192     case 12:
 193       TimeValue = 55;
 194       break;
 195
 196     case 13:
 197       TimeValue = 60;
 198       break;
 199
 200     case 14:
 201       TimeValue = 70;
 202       break;
 203
 204     case 15:
 205       TimeValue = 80;
 206       break;
 207
 208     default:
 209       DEBUG ((DEBUG_BLKIO, "Invalid parameter.\n"));
 210       ASSERT(FALSE);
 211       return;
 212   }
 213
 214   Frequency = TransferRateValue * TimeValue/10;
 215
 216   // Calculate Clock divider value to program in MMCHS_SYSCTL[CLKD] field.
 217   *ClockFrequencySelect = ((MMC_REFERENCE_CLK/Frequency) + 1);
 218
 219   DEBUG ((DEBUG_BLKIO, "mMaxDataTransferRate: 0x%x, Frequency: %d KHz, ClockFrequencySelect: %x\n", mMaxDataTransferRate, Frequency/1000, *ClockFrequencySelect));
 220 }
 221
 222 VOID
 223 UpdateMMCHSClkFrequency (
 224   UINTN NewCLKD
 225   )
 226 {
 227   DEBUG ((DEBUG_BLKIO, "UpdateMMCHSClkFrequency()\n"));
 228
 229   // Set Clock enable to 0x0 to not provide the clock to the card
 230   MmioAnd32 (MMCHS_SYSCTL, ~CEN);
 231
 232   // Set new clock frequency.
 233   MmioAndThenOr32 (MMCHS_SYSCTL, ~CLKD_MASK, NewCLKD << 6);
 234
 235   // Poll till Internal Clock Stable
 236   while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
 237
 238   // Set Clock enable to 0x1 to provide the clock to the card
 239   MmioOr32 (MMCHS_SYSCTL, CEN);
 240 }
 241
 242 EFI_STATUS
 243 InitializeMMCHS (
 244   VOID
 245   )
 246 {
 247   UINT8      Data;
 248   EFI_STATUS Status;
 249
 250   DEBUG ((DEBUG_BLKIO, "InitializeMMCHS()\n"));
 251
 252   // Select Device group to belong to P1 device group in Power IC.
 253   Data = DEV_GRP_P1;
 254   Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEV_GRP), 1, &Data);
 255   ASSERT_EFI_ERROR(Status);
 256
 257   // Configure voltage regulator for MMC1 in Power IC to output 3.0 voltage.
 258   Data = VSEL_3_00V;
 259   Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEDICATED_REG), 1, &Data);
 260   ASSERT_EFI_ERROR(Status);
 261
 262   // After ramping up voltage, set VDDS stable bit to indicate that voltage level is stable.
 263   MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));
 264
 265   // Enable WP GPIO
 266   MmioAndThenOr32 (GPIO1_BASE + GPIO_OE, ~BIT23, BIT23);
 267
 268   // Enable Card Detect
 269   Data = CARD_DETECT_ENABLE;
 270   gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, TPS65950_GPIO_CTRL), 1, &Data);
 271
 272   return Status;
 273 }
 274
 275 BOOLEAN
 276 MMCIsCardPresent (
 277   IN EFI_MMC_HOST_PROTOCOL     *This
 278   )
 279 {
 280   EFI_STATUS  Status;
 281   UINT8       Data;
 282
 283   //
 284   // Card detect is a GPIO0 on the TPS65950
 285   //
 286   Status = gTPS65950->Read (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, GPIODATAIN1), 1, &Data);
 287   if (EFI_ERROR (Status)) {
 288     return FALSE;
 289   }
 290
 291   return !(Data & CARD_DETECT_BIT);
 292 }
 293
 294 BOOLEAN
 295 MMCIsReadOnly (
 296   IN EFI_MMC_HOST_PROTOCOL     *This
 297   )
 298 {
 299   /* Note:
 300    * On our BeagleBoard the SD card WP pin is always read as TRUE.
 301    * Probably something wrong with GPIO configuration.
 302    * BeagleBoard-xM uses microSD cards so there is no write protect at all.
 303    * Hence commenting out SD card WP pin read status.
 304    */
 305   //return (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;
 306   return 0;
 307
 308 }
 309
 310 // TODO
 311 EFI_GUID mPL180MciDevicePathGuid = EFI_CALLER_ID_GUID;
 312
 313 EFI_STATUS
 314 MMCBuildDevicePath (
 315   IN EFI_MMC_HOST_PROTOCOL     *This,
 316   IN EFI_DEVICE_PATH_PROTOCOL  **DevicePath
 317   )
 318 {
 319   EFI_DEVICE_PATH_PROTOCOL    *NewDevicePathNode;
 320
 321   NewDevicePathNode = CreateDeviceNode(HARDWARE_DEVICE_PATH,HW_VENDOR_DP,sizeof(VENDOR_DEVICE_PATH));
 322   CopyGuid(&((VENDOR_DEVICE_PATH*)NewDevicePathNode)->Guid,&mPL180MciDevicePathGuid);
 323   *DevicePath = NewDevicePathNode;
 324   return EFI_SUCCESS;
 325 }
 326
 327 EFI_STATUS
 328 MMCSendCommand (
 329   IN EFI_MMC_HOST_PROTOCOL     *This,
 330   IN MMC_CMD                   MmcCmd,
 331   IN UINT32                    Argument
 332   )
 333 {
 334   UINTN MmcStatus;
 335   UINTN RetryCount = 0;
 336
 337   if (IgnoreCommand(MmcCmd))
 338     return EFI_SUCCESS;
 339
 340   MmcCmd = TranslateCommand(MmcCmd);
 341
 342   //DEBUG ((EFI_D_ERROR, "MMCSendCommand(%d)\n", MmcCmd));
 343
 344   // Check if command line is in use or not. Poll till command line is available.
 345   while ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) == DATI_NOT_ALLOWED);
 346
 347   // Provide the block size.
 348   MmioWrite32 (MMCHS_BLK, BLEN_512BYTES);
 349
 350   // Setting Data timeout counter value to max value.
 351   MmioAndThenOr32 (MMCHS_SYSCTL, ~DTO_MASK, DTO_VAL);
 352
 353   // Clear Status register.
 354   MmioWrite32 (MMCHS_STAT, 0xFFFFFFFF);
 355
 356   // Set command argument register
 357   MmioWrite32 (MMCHS_ARG, Argument);
 358
 359   //TODO: fix this
 360   //Enable interrupt enable events to occur
 361   //MmioWrite32 (MMCHS_IE, CmdInterruptEnableVal);
 362
 363   // Send a command
 364   MmioWrite32 (MMCHS_CMD, MmcCmd);
 365
 366   // Check for the command status.
 367   while (RetryCount < MAX_RETRY_COUNT) {
 368     do {
 369       MmcStatus = MmioRead32 (MMCHS_STAT);
 370     } while (MmcStatus == 0);
 371
 372     // Read status of command response
 373     if ((MmcStatus & ERRI) != 0) {
 374
 375       // Perform soft-reset for mmci_cmd line.
 376       MmioOr32 (MMCHS_SYSCTL, SRC);
 377       while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
 378
 379       //DEBUG ((EFI_D_INFO, "MmcStatus: 0x%x\n", MmcStatus));
 380       return EFI_DEVICE_ERROR;
 381     }
 382
 383     // Check if command is completed.
 384     if ((MmcStatus & CC) == CC) {
 385       MmioWrite32 (MMCHS_STAT, CC);
 386       break;
 387     }
 388
 389     RetryCount++;
 390   }
 391
 392   if (RetryCount == MAX_RETRY_COUNT) {
 393     DEBUG ((DEBUG_BLKIO, "MMCSendCommand: Timeout\n"));
 394     return EFI_TIMEOUT;
 395   }
 396
 397   return EFI_SUCCESS;
 398 }
 399
 400 EFI_STATUS
 401 MMCNotifyState (
 402   IN EFI_MMC_HOST_PROTOCOL    *This,
 403   IN MMC_STATE                State
 404   )
 405 {
 406   EFI_STATUS              Status;
 407   UINTN                   FreqSel;
 408
 409   switch(State) {
 410     case MmcInvalidState:
 411       ASSERT(0);
 412       break;
 413     case MmcHwInitializationState:
 414       mBitModeSet = FALSE;
 415
 416       DEBUG ((DEBUG_BLKIO, "MMCHwInitializationState()\n"));
 417       Status = InitializeMMCHS ();
 418       if (EFI_ERROR(Status)) {
 419         DEBUG ((DEBUG_BLKIO, "Initialize MMC host controller fails. Status: %x\n", Status));
 420         return Status;
 421       }
 422
 423       // Software reset of the MMCHS host controller.
 424       MmioWrite32 (MMCHS_SYSCONFIG, SOFTRESET);
 425       gBS->Stall(1000);
 426       while ((MmioRead32 (MMCHS_SYSSTATUS) & RESETDONE_MASK) != RESETDONE);
 427
 428       // Soft reset for all.
 429       MmioWrite32 (MMCHS_SYSCTL, SRA);
 430       gBS->Stall(1000);
 431       while ((MmioRead32 (MMCHS_SYSCTL) & SRA) != 0x0);
 432
 433       //Voltage capabilities initialization. Activate VS18 and VS30.
 434       MmioOr32 (MMCHS_CAPA, (VS30 | VS18));
 435
 436       // Wakeup configuration
 437       MmioOr32 (MMCHS_SYSCONFIG, ENAWAKEUP);
 438       MmioOr32 (MMCHS_HCTL, IWE);
 439
 440       // MMCHS Controller default initialization
 441       MmioOr32 (MMCHS_CON, (OD | DW8_1_4_BIT | CEATA_OFF));
 442
 443       MmioWrite32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_OFF));
 444
 445       // Enable internal clock
 446       MmioOr32 (MMCHS_SYSCTL, ICE);
 447
 448       // Set the clock frequency to 80KHz.
 449       UpdateMMCHSClkFrequency (CLKD_80KHZ);
 450
 451       // Enable SD bus power.
 452       MmioOr32 (MMCHS_HCTL, (SDBP_ON));
 453
 454       // Poll till SD bus power bit is set.
 455       while ((MmioRead32 (MMCHS_HCTL) & SDBP_MASK) != SDBP_ON);
 456
 457       // Enable interrupts.
 458       MmioWrite32 (MMCHS_IE, (BADA_EN | CERR_EN | DEB_EN | DCRC_EN | DTO_EN | CIE_EN |
 459         CEB_EN | CCRC_EN | CTO_EN | BRR_EN | BWR_EN | TC_EN | CC_EN));
 460
 461       // Controller INIT procedure start.
 462       MmioOr32 (MMCHS_CON, INIT);
 463       MmioWrite32 (MMCHS_CMD, 0x00000000);
 464       while (!(MmioRead32 (MMCHS_STAT) & CC));
 465
 466       // Wait for 1 ms
 467       gBS->Stall (1000);
 468
 469       // Set CC bit to 0x1 to clear the flag
 470       MmioOr32 (MMCHS_STAT, CC);
 471
 472       // Retry INIT procedure.
 473       MmioWrite32 (MMCHS_CMD, 0x00000000);
 474       while (!(MmioRead32 (MMCHS_STAT) & CC));
 475
 476       // End initialization sequence
 477       MmioAnd32 (MMCHS_CON, ~INIT);
 478
 479       MmioOr32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_ON));
 480
 481       // Change clock frequency to 400KHz to fit protocol
 482       UpdateMMCHSClkFrequency(CLKD_400KHZ);
 483
 484       MmioOr32 (MMCHS_CON, OD);
 485       break;
 486     case MmcIdleState:
 487       break;
 488     case MmcReadyState:
 489       break;
 490     case MmcIdentificationState:
 491       break;
 492     case MmcStandByState:
 493       CalculateCardCLKD (&FreqSel);
 494       UpdateMMCHSClkFrequency (FreqSel);
 495       break;
 496     case MmcTransferState:
 497       if (!mBitModeSet) {
 498         Status = MMCSendCommand (This, CMD55, mRca << 16);
 499         if (!EFI_ERROR (Status)) {
 500           // Set device into 4-bit data bus mode
 501           Status = MMCSendCommand (This, ACMD6, 0x2);
 502           if (!EFI_ERROR (Status)) {
 503             // Set host controler into 4-bit mode
 504             MmioOr32 (MMCHS_HCTL, DTW_4_BIT);
 505             DEBUG ((DEBUG_BLKIO, "SD Memory Card set to 4-bit mode\n"));
 506             mBitModeSet = TRUE;
 507           }
 508         }
 509       }
 510       break;
 511     case MmcSendingDataState:
 512       break;
 513     case MmcReceiveDataState:
 514       break;
 515     case MmcProgrammingState:
 516       break;
 517     case MmcDisconnectState:
 518     default:
 519       ASSERT(0);
 520   }
 521   return EFI_SUCCESS;
 522 }
 523
 524 EFI_STATUS
 525 MMCReceiveResponse (
 526   IN EFI_MMC_HOST_PROTOCOL     *This,
 527   IN MMC_RESPONSE_TYPE         Type,
 528   IN UINT32*                   Buffer
 529   )
 530 {
 531   if (Buffer == NULL) {
 532     return EFI_INVALID_PARAMETER;
 533   }
 534
 535   if (Type == MMC_RESPONSE_TYPE_R2) {
 536     Buffer[0] = MmioRead32 (MMCHS_RSP10);
 537     Buffer[1] = MmioRead32 (MMCHS_RSP32);
 538     Buffer[2] = MmioRead32 (MMCHS_RSP54);
 539     Buffer[3] = MmioRead32 (MMCHS_RSP76);
 540   } else {
 541     Buffer[0] = MmioRead32 (MMCHS_RSP10);
 542   }
 543
 544   if (Type == MMC_RESPONSE_TYPE_CSD) {
 545     mMaxDataTransferRate = Buffer[3] & 0xFF;
 546   } else if (Type == MMC_RESPONSE_TYPE_RCA) {
 547     mRca = Buffer[0] >> 16;
 548   }
 549
 550   return EFI_SUCCESS;
 551 }
 552
 553 EFI_STATUS
 554 MMCReadBlockData (
 555   IN EFI_MMC_HOST_PROTOCOL      *This,
 556   IN EFI_LBA                    Lba,
 557   IN UINTN                      Length,
 558   IN UINT32*                    Buffer
 559   )
 560 {
 561   UINTN MmcStatus;
 562   UINTN Count;
 563   UINTN RetryCount = 0;
 564
 565   DEBUG ((DEBUG_BLKIO, "MMCReadBlockData(LBA: 0x%x, Length: 0x%x, Buffer: 0x%x)\n", Lba, Length, Buffer));
 566
 567   // Check controller status to make sure there is no error.
 568   while (RetryCount < MAX_RETRY_COUNT) {
 569     do {
 570       // Read Status.
 571       MmcStatus = MmioRead32 (MMCHS_STAT);
 572     } while(MmcStatus == 0);
 573
 574     // Check if Buffer read ready (BRR) bit is set?
 575     if (MmcStatus & BRR) {
 576
 577       // Clear BRR bit
 578       MmioOr32 (MMCHS_STAT, BRR);
 579
 580       for (Count = 0; Count < Length / 4; Count++) {
 581         *Buffer++ = MmioRead32(MMCHS_DATA);
 582       }
 583       break;
 584     }
 585     RetryCount++;
 586   }
 587
 588   if (RetryCount == MAX_RETRY_COUNT) {
 589     return EFI_TIMEOUT;
 590   }
 591
 592   return EFI_SUCCESS;
 593 }
 594
 595 EFI_STATUS
 596 MMCWriteBlockData (
 597   IN EFI_MMC_HOST_PROTOCOL    *This,
 598   IN EFI_LBA                  Lba,
 599   IN UINTN                    Length,
 600   IN UINT32*                  Buffer
 601   )
 602 {
 603   UINTN MmcStatus;
 604   UINTN Count;
 605   UINTN RetryCount = 0;
 606
 607   // Check controller status to make sure there is no error.
 608   while (RetryCount < MAX_RETRY_COUNT) {
 609     do {
 610       // Read Status.
 611       MmcStatus = MmioRead32 (MMCHS_STAT);
 612     } while(MmcStatus == 0);
 613
 614     // Check if Buffer write ready (BWR) bit is set?
 615     if (MmcStatus & BWR) {
 616
 617       // Clear BWR bit
 618       MmioOr32 (MMCHS_STAT, BWR);
 619
 620       // Write block worth of data.
 621       for (Count = 0; Count < Length / 4; Count++) {
 622         MmioWrite32 (MMCHS_DATA, *Buffer++);
 623       }
 624
 625       break;
 626     }
 627     RetryCount++;
 628   }
 629
 630   if (RetryCount == MAX_RETRY_COUNT) {
 631     return EFI_TIMEOUT;
 632   }
 633
 634   return EFI_SUCCESS;
 635 }
 636
 637 EFI_MMC_HOST_PROTOCOL gMMCHost = {
 638   MMC_HOST_PROTOCOL_REVISION,
 639   MMCIsCardPresent,
 640   MMCIsReadOnly,
 641   MMCBuildDevicePath,
 642   MMCNotifyState,
 643   MMCSendCommand,
 644   MMCReceiveResponse,
 645   MMCReadBlockData,
 646   MMCWriteBlockData
 647 };
 648
 649 EFI_STATUS
 650 MMCInitialize (
 651   IN EFI_HANDLE         ImageHandle,
 652   IN EFI_SYSTEM_TABLE   *SystemTable
 653   )
 654 {
 655   EFI_STATUS    Status;
 656   EFI_HANDLE    Handle = NULL;
 657
 658   DEBUG ((DEBUG_BLKIO, "MMCInitialize()\n"));
 659
 660   Status = gBS->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);
 661   ASSERT_EFI_ERROR(Status);
 662
 663   Status = gBS->InstallMultipleProtocolInterfaces (
 664                   &Handle,
 665                   &gEfiMmcHostProtocolGuid,         &gMMCHost,
 666                   NULL
 667                   );
 668   ASSERT_EFI_ERROR (Status);
 669
 670   return Status;
 671 }