3 * Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
4 * Copyright (c) 2011, ARM Limited. All rights reserved.
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #include "MmcHostDxe.h"
18 EMBEDDED_EXTERNAL_DEVICE
*gTPS65950
;
19 UINT8 MaxDataTransferRate
= 0;
21 BOOLEAN BitModeSet
= FALSE
;
25 VENDOR_DEVICE_PATH Mmc
;
29 MMCHS_DEVICE_PATH gMMCDevicePath
= {
33 (UINT8
)(sizeof(VENDOR_DEVICE_PATH
)),
34 (UINT8
)((sizeof(VENDOR_DEVICE_PATH
)) >> 8),
35 0xb615f1f5, 0x5088, 0x43cd, 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00
39 END_ENTIRE_DEVICE_PATH_SUBTYPE
,
40 sizeof (EFI_DEVICE_PATH_PROTOCOL
),
96 Translation
= 0x113A0014;//CMD17;
99 Translation
= CMD24
| 4;
105 Translation
= ACMD41
;
108 Translation
= Command
;
116 UINTN
*ClockFrequencySelect
119 DEBUG((EFI_D_ERROR
, "CalculateCardCLKD()\n"));
120 UINTN TransferRateValue
= 0;
121 UINTN TimeValue
= 0 ;
124 // For SD Cards we would need to send CMD6 to set
125 // speeds abouve 25MHz. High Speed mode 50 MHz and up
127 //Calculate Transfer rate unit (Bits 2:0 of TRAN_SPEED)
128 switch (MaxDataTransferRate
& 0x7) { // 2
130 TransferRateValue
= 100 * 1000;
134 TransferRateValue
= 1 * 1000 * 1000;
138 TransferRateValue
= 10 * 1000 * 1000;
142 TransferRateValue
= 100 * 1000 * 1000;
146 DEBUG((EFI_D_ERROR
, "Invalid parameter.\n"));
150 //Calculate Time value (Bits 6:3 of TRAN_SPEED)
151 switch ((MaxDataTransferRate
>> 3) & 0xF) { // 6
213 DEBUG((EFI_D_ERROR
, "Invalid parameter.\n"));
217 Frequency
= TransferRateValue
* TimeValue
/10;
219 //Calculate Clock divider value to program in MMCHS_SYSCTL[CLKD] field.
220 *ClockFrequencySelect
= ((MMC_REFERENCE_CLK
/Frequency
) + 1);
222 DEBUG ((EFI_D_INFO
, "MaxDataTransferRate: 0x%x, Frequency: %d KHz, ClockFrequencySelect: %x\n", MaxDataTransferRate
, Frequency
/1000, *ClockFrequencySelect
));
226 UpdateMMCHSClkFrequency (
230 DEBUG((EFI_D_ERROR
, "UpdateMMCHSClkFrequency()\n"));
231 //Set Clock enable to 0x0 to not provide the clock to the card
232 MmioAnd32 (MMCHS_SYSCTL
, ~CEN
);
234 //Set new clock frequency.
235 MmioAndThenOr32 (MMCHS_SYSCTL
, ~CLKD_MASK
, NewCLKD
<< 6);
237 //Poll till Internal Clock Stable
238 while ((MmioRead32 (MMCHS_SYSCTL
) & ICS_MASK
) != ICS
);
240 //Set Clock enable to 0x1 to provide the clock to the card
241 MmioOr32 (MMCHS_SYSCTL
, CEN
);
249 DEBUG((EFI_D_ERROR
, "InitializeMMCHS()\n"));
253 //Select Device group to belong to P1 device group in Power IC.
255 Status
= gTPS65950
->Write (gTPS65950
, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4
, VMMC1_DEV_GRP
), 1, &Data
);
256 ASSERT_EFI_ERROR(Status
);
258 //Configure voltage regulator for MMC1 in Power IC to output 3.0 voltage.
260 Status
= gTPS65950
->Write (gTPS65950
, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4
, VMMC1_DEDICATED_REG
), 1, &Data
);
261 ASSERT_EFI_ERROR(Status
);
263 //After ramping up voltage, set VDDS stable bit to indicate that voltage level is stable.
264 MmioOr32 (CONTROL_PBIAS_LITE
, (PBIASLITEVMODE0
| PBIASLITEPWRDNZ0
| PBIASSPEEDCTRL0
| PBIASLITEVMODE1
| PBIASLITEWRDNZ1
));
267 MmioAndThenOr32 (GPIO1_BASE
+ GPIO_OE
, ~BIT23
, BIT23
);
269 // Enable Card Detect
270 Data
= CARD_DETECT_ENABLE
;
271 gTPS65950
->Write (gTPS65950
, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2
, TPS65950_GPIO_CTRL
), 1, &Data
);
282 //DEBUG((EFI_D_ERROR, "MMCIsCardPresent()\n"));
287 // Card detect is a GPIO0 on the TPS65950
289 Status
= gTPS65950
->Read (gTPS65950
, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2
, GPIODATAIN1
), 1, &Data
);
290 if (EFI_ERROR (Status
)) {
294 return !(Data
& CARD_DETECT_BIT
);
303 * On our BeagleBoard the SD card WP pin is always read as TRUE.
304 * Probably something wrong with GPIO configuration.
305 * BeagleBoard-xM uses microSD cards so there is no write protect at all.
306 * Hence commenting out SD card WP pin read status.
308 //return (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;
314 EFI_GUID mPL180MciDevicePathGuid
= EFI_CALLER_ID_GUID
;
318 IN EFI_DEVICE_PATH_PROTOCOL
**DevicePath
321 EFI_DEVICE_PATH_PROTOCOL
*NewDevicePathNode
;
323 NewDevicePathNode
= CreateDeviceNode(HARDWARE_DEVICE_PATH
,HW_VENDOR_DP
,sizeof(VENDOR_DEVICE_PATH
));
324 CopyGuid(&((VENDOR_DEVICE_PATH
*)NewDevicePathNode
)->Guid
,&mPL180MciDevicePathGuid
);
325 *DevicePath
= NewDevicePathNode
;
335 if (IgnoreCommand(MmcCmd
))
338 MmcCmd
= TranslateCommand(MmcCmd
);
340 //DEBUG((EFI_D_ERROR, "MMCSendCommand(%d)\n", MmcCmd));
342 UINTN RetryCount
= 0;
344 //Check if command line is in use or not. Poll till command line is available.
345 while ((MmioRead32 (MMCHS_PSTATE
) & DATI_MASK
) == DATI_NOT_ALLOWED
);
347 //Provide the block size.
348 MmioWrite32 (MMCHS_BLK
, BLEN_512BYTES
);
350 //Setting Data timeout counter value to max value.
351 MmioAndThenOr32 (MMCHS_SYSCTL
, ~DTO_MASK
, DTO_VAL
);
353 //Clear Status register.
354 MmioWrite32 (MMCHS_STAT
, 0xFFFFFFFF);
356 //Set command argument register
357 MmioWrite32 (MMCHS_ARG
, Argument
);
360 //Enable interrupt enable events to occur
361 //MmioWrite32 (MMCHS_IE, CmdInterruptEnableVal);
364 MmioWrite32 (MMCHS_CMD
, MmcCmd
);
366 //Check for the command status.
367 while (RetryCount
< MAX_RETRY_COUNT
) {
369 MmcStatus
= MmioRead32 (MMCHS_STAT
);
370 } while (MmcStatus
== 0);
372 //Read status of command response
373 if ((MmcStatus
& ERRI
) != 0) {
375 //Perform soft-reset for mmci_cmd line.
376 MmioOr32 (MMCHS_SYSCTL
, SRC
);
377 while ((MmioRead32 (MMCHS_SYSCTL
) & SRC
));
379 //DEBUG ((EFI_D_INFO, "MmcStatus: 0x%x\n", MmcStatus));
380 return EFI_DEVICE_ERROR
;
383 //Check if command is completed.
384 if ((MmcStatus
& CC
) == CC
) {
385 MmioWrite32 (MMCHS_STAT
, CC
);
392 if (RetryCount
== MAX_RETRY_COUNT
) {
393 DEBUG((EFI_D_ERROR
, "MMCSendCommand: Timeout\n"));
408 case MmcInvalidState
:
411 case MmcHwInitializationState
:
414 DEBUG((EFI_D_ERROR
, "MMCHwInitializationState()\n"));
415 Status
= InitializeMMCHS ();
416 if (EFI_ERROR(Status
)) {
417 DEBUG ((EFI_D_ERROR
, "Initialize MMC host controller fails. Status: %x\n", Status
));
421 //Software reset of the MMCHS host controller.
422 MmioWrite32 (MMCHS_SYSCONFIG
, SOFTRESET
);
424 while ((MmioRead32 (MMCHS_SYSSTATUS
) & RESETDONE_MASK
) != RESETDONE
);
426 //Soft reset for all.
427 MmioWrite32 (MMCHS_SYSCTL
, SRA
);
429 while ((MmioRead32 (MMCHS_SYSCTL
) & SRA
) != 0x0);
431 //Voltage capabilities initialization. Activate VS18 and VS30.
432 MmioOr32 (MMCHS_CAPA
, (VS30
| VS18
));
434 //Wakeup configuration
435 MmioOr32 (MMCHS_SYSCONFIG
, ENAWAKEUP
);
436 MmioOr32 (MMCHS_HCTL
, IWE
);
438 //MMCHS Controller default initialization
439 MmioOr32 (MMCHS_CON
, (OD
| DW8_1_4_BIT
| CEATA_OFF
));
441 MmioWrite32 (MMCHS_HCTL
, (SDVS_3_0_V
| DTW_1_BIT
| SDBP_OFF
));
443 //Enable internal clock
444 MmioOr32 (MMCHS_SYSCTL
, ICE
);
446 //Set the clock frequency to 80KHz.
447 UpdateMMCHSClkFrequency (CLKD_80KHZ
);
449 //Enable SD bus power.
450 MmioOr32 (MMCHS_HCTL
, (SDBP_ON
));
452 //Poll till SD bus power bit is set.
453 while ((MmioRead32 (MMCHS_HCTL
) & SDBP_MASK
) != SDBP_ON
);
456 MmioWrite32 (MMCHS_IE
, (BADA_EN
| CERR_EN
| DEB_EN
| DCRC_EN
| DTO_EN
| CIE_EN
|
457 CEB_EN
| CCRC_EN
| CTO_EN
| BRR_EN
| BWR_EN
| TC_EN
| CC_EN
));
459 //Controller INIT procedure start.
460 MmioOr32 (MMCHS_CON
, INIT
);
461 MmioWrite32 (MMCHS_CMD
, 0x00000000);
462 while (!(MmioRead32 (MMCHS_STAT
) & CC
));
467 //Set CC bit to 0x1 to clear the flag
468 MmioOr32 (MMCHS_STAT
, CC
);
470 //Retry INIT procedure.
471 MmioWrite32 (MMCHS_CMD
, 0x00000000);
472 while (!(MmioRead32 (MMCHS_STAT
) & CC
));
474 //End initialization sequence
475 MmioAnd32 (MMCHS_CON
, ~INIT
);
477 MmioOr32 (MMCHS_HCTL
, (SDVS_3_0_V
| DTW_1_BIT
| SDBP_ON
));
479 //Change clock frequency to 400KHz to fit protocol
480 UpdateMMCHSClkFrequency(CLKD_400KHZ
);
482 MmioOr32 (MMCHS_CON
, OD
);
488 case MmcIdentificationState
:
490 case MmcStandByState
:
491 CalculateCardCLKD(&freqSel
);
492 UpdateMMCHSClkFrequency(freqSel
);
494 case MmcTransferState
:
496 Status
= MMCSendCommand (CMD55
, Rca
<< 16);
497 if (!EFI_ERROR (Status
)) {
498 // set device into 4-bit data bus mode
499 Status
= MMCSendCommand (ACMD6
, 0x2);
500 if (!EFI_ERROR (Status
)) {
501 // Set host controler into 4-bit mode
502 MmioOr32 (MMCHS_HCTL
, DTW_4_BIT
);
503 DEBUG ((EFI_D_INFO
, "SD Memory Card set to 4-bit mode\n"));
509 case MmcSendingDataState
:
511 case MmcReceiveDataState
:
513 case MmcProgrammingState
:
515 case MmcDisconnectState
:
524 IN MMC_RESPONSE_TYPE Type
,
528 //DEBUG((EFI_D_ERROR, "MMCReceiveResponse()\n"));
529 if (Buffer
== NULL
) {
530 DEBUG((EFI_D_ERROR
, "Buffer was NULL\n"));
531 return EFI_INVALID_PARAMETER
;
534 if (Type
== MMC_RESPONSE_TYPE_R2
) {
535 Buffer
[0] = MmioRead32 (MMCHS_RSP10
);
536 Buffer
[1] = MmioRead32 (MMCHS_RSP32
);
537 Buffer
[2] = MmioRead32 (MMCHS_RSP54
);
538 Buffer
[3] = MmioRead32 (MMCHS_RSP76
);
540 Buffer
[0] = MmioRead32 (MMCHS_RSP10
);
543 if (Type
== MMC_RESPONSE_TYPE_CSD
) {
544 MaxDataTransferRate
= Buffer
[3] & 0xFF;
545 } else if (Type
== MMC_RESPONSE_TYPE_RCA
) {
546 Rca
= Buffer
[0] >> 16;
559 //DEBUG((EFI_D_ERROR, "MMCReadBlockData(LBA: 0x%x, ", Lba));
560 //DEBUG((EFI_D_ERROR, "Length: 0x%x, ", Length));
561 //DEBUG((EFI_D_ERROR, "Buffer: 0x%x)\n", Buffer));
564 UINTN RetryCount
= 0;
566 //Check controller status to make sure there is no error.
567 while (RetryCount
< MAX_RETRY_COUNT
) {
570 MmcStatus
= MmioRead32 (MMCHS_STAT
);
571 } while(MmcStatus
== 0);
573 //Check if Buffer read ready (BRR) bit is set?
574 if (MmcStatus
& BRR
) {
577 MmioOr32 (MMCHS_STAT
, BRR
);
579 for (Count
= 0; Count
< Length
/ 4; Count
++) {
580 *Buffer
++ = MmioRead32(MMCHS_DATA
);
587 if (RetryCount
== MAX_RETRY_COUNT
) {
603 UINTN RetryCount
= 0;
605 //Check controller status to make sure there is no error.
606 while (RetryCount
< MAX_RETRY_COUNT
) {
609 MmcStatus
= MmioRead32 (MMCHS_STAT
);
610 } while(MmcStatus
== 0);
612 //Check if Buffer write ready (BWR) bit is set?
613 if (MmcStatus
& BWR
) {
616 MmioOr32 (MMCHS_STAT
, BWR
);
618 //Write block worth of data.
619 for (Count
= 0; Count
< Length
/ 4; Count
++) {
620 MmioWrite32 (MMCHS_DATA
, *Buffer
++);
628 if (RetryCount
== MAX_RETRY_COUNT
) {
635 EFI_MMC_HOST_PROTOCOL gMMCHost
= {
648 IN EFI_HANDLE ImageHandle
,
649 IN EFI_SYSTEM_TABLE
*SystemTable
652 DEBUG((EFI_D_ERROR
, "MMCInitialize()\n"));
654 EFI_HANDLE Handle
= NULL
;
656 Status
= gBS
->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid
, NULL
, (VOID
**)&gTPS65950
);
657 ASSERT_EFI_ERROR(Status
);
659 Status
= gBS
->InstallMultipleProtocolInterfaces (
661 &gEfiMmcHostProtocolGuid
, &gMMCHost
,
664 ASSERT_EFI_ERROR (Status
);