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1 /** @file
2 Contains root level name space objects for the platform
3
4 Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) {
16 //
17 // System Sleep States
18 //
19 Name (\_S0, Package () {5, 0, 0, 0})
20 Name (\_S4, Package () {1, 0, 0, 0})
21 Name (\_S5, Package () {0, 0, 0, 0})
22
23 //
24 // System Bus
25 //
26 Scope (\_SB) {
27 //
28 // PCI Root Bridge
29 //
30 Device (PCI0) {
31 Name (_HID, EISAID ("PNP0A03"))
32 Name (_ADR, 0x00000000)
33 Name (_BBN, 0x00)
34 Name (_UID, 0x00)
35
36 //
37 // BUS, I/O, and MMIO resources
38 //
39 Name (CRES, ResourceTemplate () {
40 WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses
41 ResourceProducer, // bit 0 of general flags is 1
42 MinFixed, // Range is fixed
43 MaxFixed, // Range is fixed
44 PosDecode, // PosDecode
45 0x0000, // Granularity
46 0x0000, // Min
47 0x00FF, // Max
48 0x0000, // Translation
49 0x0100 // Range Length = Max-Min+1
50 )
51
52 IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)
53
54 WORDIO ( // Consumed-and-produced resource (all I/O below CF8)
55 ResourceProducer, // bit 0 of general flags is 0
56 MinFixed, // Range is fixed
57 MaxFixed, // Range is fixed
58 PosDecode,
59 EntireRange,
60 0x0000, // Granularity
61 0x0000, // Min
62 0x0CF7, // Max
63 0x0000, // Translation
64 0x0CF8 // Range Length
65 )
66
67 WORDIO ( // Consumed-and-produced resource (all I/O above CFF)
68 ResourceProducer, // bit 0 of general flags is 0
69 MinFixed, // Range is fixed
70 MaxFixed, // Range is fixed
71 PosDecode,
72 EntireRange,
73 0x0000, // Granularity
74 0x0D00, // Min
75 0xFFFF, // Max
76 0x0000, // Translation
77 0xF300 // Range Length
78 )
79
80 DWORDMEMORY ( // Descriptor for legacy VGA video RAM
81 ResourceProducer, // bit 0 of general flags is 0
82 PosDecode,
83 MinFixed, // Range is fixed
84 MaxFixed, // Range is Fixed
85 Cacheable,
86 ReadWrite,
87 0x00000000, // Granularity
88 0x000A0000, // Min
89 0x000BFFFF, // Max
90 0x00000000, // Translation
91 0x00020000 // Range Length
92 )
93
94 DWORDMEMORY ( // Descriptor for 32-bit MMIO
95 ResourceProducer, // bit 0 of general flags is 0
96 PosDecode,
97 MinFixed, // Range is fixed
98 MaxFixed, // Range is Fixed
99 NonCacheable,
100 ReadWrite,
101 0x00000000, // Granularity
102 0xF8000000, // Min
103 0xFFFBFFFF, // Max
104 0x00000000, // Translation
105 0x07FC0000, // Range Length
106 , // ResourceSourceIndex
107 , // ResourceSource
108 PW32 // DescriptorName
109 )
110 })
111
112 Name (CR64, ResourceTemplate () {
113 QWordMemory ( // Descriptor for 64-bit MMIO
114 ResourceProducer, // bit 0 of general flags is 0
115 PosDecode,
116 MinFixed, // Range is fixed
117 MaxFixed, // Range is Fixed
118 Cacheable,
119 ReadWrite,
120 0x00000000, // Granularity
121 0x8000000000, // Min
122 0xFFFFFFFFFF, // Max
123 0x00000000, // Translation
124 0x8000000000, // Range Length
125 , // ResourceSourceIndex
126 , // ResourceSource
127 PW64 // DescriptorName
128 )
129 })
130
131 Method (_CRS, 0) {
132 //
133 // see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"
134 //
135 External (FWDT, OpRegionObj)
136 Field(FWDT, QWordAcc, NoLock, Preserve) {
137 P0S, 64, // PciWindow32.Base
138 P0E, 64, // PciWindow32.End
139 P0L, 64, // PciWindow32.Length
140 P1S, 64, // PciWindow64.Base
141 P1E, 64, // PciWindow64.End
142 P1L, 64 // PciWindow64.Length
143 }
144 Field(FWDT, DWordAcc, NoLock, Preserve) {
145 P0SL, 32, // PciWindow32.Base, low 32 bits
146 P0SH, 32, // PciWindow32.Base, high 32 bits
147 P0EL, 32, // PciWindow32.End, low 32 bits
148 P0EH, 32, // PciWindow32.End, high 32 bits
149 P0LL, 32, // PciWindow32.Length, low 32 bits
150 P0LH, 32, // PciWindow32.Length, high 32 bits
151 P1SL, 32, // PciWindow64.Base, low 32 bits
152 P1SH, 32, // PciWindow64.Base, high 32 bits
153 P1EL, 32, // PciWindow64.End, low 32 bits
154 P1EH, 32, // PciWindow64.End, high 32 bits
155 P1LL, 32, // PciWindow64.Length, low 32 bits
156 P1LH, 32 // PciWindow64.Length, high 32 bits
157 }
158
159 //
160 // fixup 32-bit PCI IO window
161 //
162 CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)
163 CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)
164 CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)
165 Store (P0SL, PS32)
166 Store (P0EL, PE32)
167 Store (P0LL, PL32)
168
169 If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {
170 Return (CRES)
171 } Else {
172 //
173 // fixup 64-bit PCI IO window
174 //
175 CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)
176 CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)
177 CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)
178 Store (P1S, PS64)
179 Store (P1E, PE64)
180 Store (P1L, PL64)
181
182 //
183 // add window and return result
184 //
185 ConcatenateResTemplate (CRES, CR64, Local0)
186 Return (Local0)
187 }
188 }
189
190 //
191 // PCI Interrupt Routing Table - PIC Mode Only
192 //
193 Method (_PRT, 0, NotSerialized) {
194 Return (
195 Package () {
196 //
197 // Bus 0, Device 1
198 //
199 Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
200 Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
201 Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
202 Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
203 //
204 // Bus 0, Device 3
205 //
206 Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
207 Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
208 Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
209 Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
210 }
211 )
212 }
213
214 //
215 // PCI to ISA Bridge (Bus 0, Device 1, Function 0)
216 // "Low Pin Count"
217 //
218 Device (LPC) {
219 Name (_ADR, 0x00010000)
220
221 //
222 // PCI Interrupt Routing Configuration Registers, PIRQRC[A:D]
223 //
224 OperationRegion (PRR0, PCI_Config, 0x60, 0x04)
225 Field (PRR0, ANYACC, NOLOCK, PRESERVE) {
226 PIRA, 8,
227 PIRB, 8,
228 PIRC, 8,
229 PIRD, 8
230 }
231
232 //
233 // _STA method for LNKA, LNKB, LNKC, LNKD
234 // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
235 //
236 Method (PSTA, 1, NotSerialized) {
237 If (And (Arg0, 0x80)) { // disable-bit set?
238 Return (0x9) // "device present" | "functioning properly"
239 } Else {
240 Return (0xB) // same | "enabled and decoding resources"
241 }
242 }
243
244 //
245 // _CRS method for LNKA, LNKB, LNKC, LNKD
246 // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
247 //
248 Method (PCRS, 1, NotSerialized) {
249 //
250 // create temporary buffer with an Extended Interrupt Descriptor
251 // whose single vector defaults to zero
252 //
253 Name (BUF0, ResourceTemplate () {
254 Interrupt (ResourceConsumer, Level, ActiveHigh, Shared){0}
255 }
256 )
257
258 //
259 // define reference to first interrupt vector in buffer
260 //
261 CreateDWordField (BUF0, 0x05, IRQW)
262
263 //
264 // If the disable-bit is clear, overwrite the default zero vector
265 // with the value in Arg0 (ie. PIRQRC[A:D]). Reserved bits are read
266 // as 0.
267 //
268 If (LNot (And (Arg0, 0x80))) {
269 Store (Arg0, IRQW)
270 }
271 Return (BUF0)
272 }
273
274 //
275 // _PRS resource for LNKA, LNKB, LNKC, LNKD
276 //
277 Name (PPRS, ResourceTemplate () {
278 Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) {
279 3, 4, 5, 7, 9, 10, 11, 12, 14, 15
280 }
281 })
282
283 //
284 // PCI IRQ Link A
285 //
286 Device (LNKA) {
287 Name (_HID, EISAID("PNP0C0F"))
288 Name (_UID, 1)
289
290 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) }
291 Method (_DIS, 0, NotSerialized) {
292 Or (PIRA, 0x80, PIRA) // set disable-bit
293 }
294 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) }
295 Method (_PRS, 0, NotSerialized) { Return (PPRS) }
296 Method (_SRS, 1, NotSerialized) {
297 CreateDWordField (Arg0, 0x05, IRQW)
298 Store (IRQW, PIRA)
299 }
300 }
301
302 //
303 // PCI IRQ Link B
304 //
305 Device (LNKB) {
306 Name (_HID, EISAID("PNP0C0F"))
307 Name (_UID, 2)
308
309 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) }
310 Method (_DIS, 0, NotSerialized) {
311 Or (PIRB, 0x80, PIRB) // set disable-bit
312 }
313 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) }
314 Method (_PRS, 0, NotSerialized) { Return (PPRS) }
315 Method (_SRS, 1, NotSerialized) {
316 CreateDWordField (Arg0, 0x05, IRQW)
317 Store (IRQW, PIRB)
318 }
319 }
320
321 //
322 // PCI IRQ Link C
323 //
324 Device (LNKC) {
325 Name (_HID, EISAID("PNP0C0F"))
326 Name (_UID, 3)
327
328 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) }
329 Method (_DIS, 0, NotSerialized) {
330 Or (PIRC, 0x80, PIRC) // set disable-bit
331 }
332 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) }
333 Method (_PRS, 0, NotSerialized) { Return (PPRS) }
334 Method (_SRS, 1, NotSerialized) {
335 CreateDWordField (Arg0, 0x05, IRQW)
336 Store (IRQW, PIRC)
337 }
338 }
339
340 //
341 // PCI IRQ Link D
342 //
343 Device (LNKD) {
344 Name (_HID, EISAID("PNP0C0F"))
345 Name (_UID, 4)
346
347 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) }
348 Method (_DIS, 0, NotSerialized) {
349 Or (PIRD, 0x80, PIRD) // set disable-bit
350 }
351 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) }
352 Method (_PRS, 0, NotSerialized) { Return (PPRS) }
353 Method (_SRS, 1, NotSerialized) {
354 CreateDWordField (Arg0, 0x05, IRQW)
355 Store (IRQW, PIRD)
356 }
357 }
358
359 //
360 // Programmable Interrupt Controller (PIC)
361 //
362 Device(PIC) {
363 Name (_HID, EISAID ("PNP0000"))
364 Name (_CRS, ResourceTemplate () {
365 IO (Decode16, 0x020, 0x020, 0x00, 0x02)
366 IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02)
367 IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02)
368 IRQNoFlags () {2}
369 })
370 }
371
372 //
373 // ISA DMA
374 //
375 Device (DMAC) {
376 Name (_HID, EISAID ("PNP0200"))
377 Name (_CRS, ResourceTemplate () {
378 IO (Decode16, 0x00, 0x00, 0, 0x10)
379 IO (Decode16, 0x81, 0x81, 0, 0x03)
380 IO (Decode16, 0x87, 0x87, 0, 0x01)
381 IO (Decode16, 0x89, 0x89, 0, 0x03)
382 IO (Decode16, 0x8f, 0x8f, 0, 0x01)
383 IO (Decode16, 0xc0, 0xc0, 0, 0x20)
384 DMA (Compatibility, NotBusMaster, Transfer8) {4}
385 })
386 }
387
388 //
389 // 8254 Timer
390 //
391 Device(TMR) {
392 Name(_HID,EISAID("PNP0100"))
393 Name(_CRS, ResourceTemplate () {
394 IO (Decode16, 0x40, 0x40, 0x00, 0x04)
395 IRQNoFlags () {0}
396 })
397 }
398
399 //
400 // Real Time Clock
401 //
402 Device (RTC) {
403 Name (_HID, EISAID ("PNP0B00"))
404 Name (_CRS, ResourceTemplate () {
405 IO (Decode16, 0x70, 0x70, 0x00, 0x02)
406 IRQNoFlags () {8}
407 })
408 }
409
410 //
411 // PCAT Speaker
412 //
413 Device(SPKR) {
414 Name (_HID, EISAID("PNP0800"))
415 Name (_CRS, ResourceTemplate () {
416 IO (Decode16, 0x61, 0x61, 0x01, 0x01)
417 })
418 }
419
420 //
421 // Floating Point Coprocessor
422 //
423 Device(FPU) {
424 Name (_HID, EISAID("PNP0C04"))
425 Name (_CRS, ResourceTemplate () {
426 IO (Decode16, 0xF0, 0xF0, 0x00, 0x10)
427 IRQNoFlags () {13}
428 })
429 }
430
431 //
432 // Generic motherboard devices and pieces that don't fit anywhere else
433 //
434 Device(XTRA) {
435 Name (_HID, EISAID ("PNP0C02"))
436 Name (_UID, 0x01)
437 Name (_CRS, ResourceTemplate () {
438 IO (Decode16, 0x010, 0x010, 0x00, 0x10)
439 IO (Decode16, 0x022, 0x022, 0x00, 0x1E)
440 IO (Decode16, 0x044, 0x044, 0x00, 0x1C)
441 IO (Decode16, 0x062, 0x062, 0x00, 0x02)
442 IO (Decode16, 0x065, 0x065, 0x00, 0x0B)
443 IO (Decode16, 0x072, 0x072, 0x00, 0x0E)
444 IO (Decode16, 0x080, 0x080, 0x00, 0x01)
445 IO (Decode16, 0x084, 0x084, 0x00, 0x03)
446 IO (Decode16, 0x088, 0x088, 0x00, 0x01)
447 IO (Decode16, 0x08c, 0x08c, 0x00, 0x03)
448 IO (Decode16, 0x090, 0x090, 0x00, 0x10)
449 IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E)
450 IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10)
451 IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10)
452 IO (Decode16, 0x160, 0x160, 0x00, 0x10)
453 IO (Decode16, 0x278, 0x278, 0x00, 0x08)
454 IO (Decode16, 0x370, 0x370, 0x00, 0x02)
455 IO (Decode16, 0x378, 0x378, 0x00, 0x08)
456 IO (Decode16, 0x402, 0x402, 0x00, 0x01) // QEMU debug console, should use FixedPcdGet16 (PcdDebugIoPort)
457 IO (Decode16, 0x440, 0x440, 0x00, 0x10)
458 IO (Decode16, 0x678, 0x678, 0x00, 0x08)
459 IO (Decode16, 0x778, 0x778, 0x00, 0x08)
460 IO (Decode16, 0xafe0, 0xafe0, 0x00, 0x04) // QEMU GPE0 BLK
461 IO (Decode16, 0xb000, 0xb000, 0x00, 0x40) // PMBLK1
462 Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC
463 Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000) // LAPIC
464 })
465 }
466
467 //
468 // PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102
469 //
470 Device (PS2K) {
471 Name (_HID, EISAID ("PNP0303"))
472 Name (_CID, EISAID ("PNP030B"))
473 Name(_CRS,ResourceTemplate() {
474 IO (Decode16, 0x60, 0x60, 0x00, 0x01)
475 IO (Decode16, 0x64, 0x64, 0x00, 0x01)
476 IRQNoFlags () {1}
477 })
478 }
479
480 //
481 // PS/2 Mouse and Microsoft Mouse
482 //
483 Device (PS2M) { // PS/2 stype mouse port
484 Name (_HID, EISAID ("PNP0F03"))
485 Name (_CID, EISAID ("PNP0F13"))
486 Name (_CRS, ResourceTemplate() {
487 IRQNoFlags () {12}
488 })
489 }
490
491 //
492 // UART Serial Port - COM1
493 //
494 Device (UAR1) {
495 Name (_HID, EISAID ("PNP0501"))
496 Name (_DDN, "COM1")
497 Name (_UID, 0x01)
498 Name(_CRS,ResourceTemplate() {
499 IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08)
500 IRQ (Edge, ActiveHigh, Exclusive, ) {4}
501 })
502 }
503
504 //
505 // UART Serial Port - COM2
506 //
507 Device (UAR2) {
508 Name (_HID, EISAID ("PNP0501"))
509 Name (_DDN, "COM2")
510 Name (_UID, 0x02)
511 Name(_CRS,ResourceTemplate() {
512 IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08)
513 IRQ (Edge, ActiveHigh, Exclusive, ) {3}
514 })
515 }
516
517 //
518 // Floppy Disk Controller
519 //
520 Device (FDC) {
521 Name (_HID, EISAID ("PNP0700"))
522 Name (_CRS,ResourceTemplate() {
523 IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06)
524 IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01)
525 IRQNoFlags () {6}
526 DMA (Compatibility, NotBusMaster, Transfer8) {2}
527 })
528 }
529
530 //
531 // parallel port -- no DMA for now
532 //
533 Device (PAR1) {
534 Name (_HID, EISAID ("PNP0400"))
535 Name (_DDN, "LPT1")
536 Name (_UID, 0x01)
537 Name(_CRS, ResourceTemplate() {
538 IO (Decode16, 0x0378, 0x0378, 0x00, 0x08)
539 IRQNoFlags () {7}
540 })
541 }
542 }
543 }
544 }
545 }
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