OvmfPkg/Include/IndustryStandard/QemuFwCfg.h

   1 /** @file
   2   Macro and type definitions corresponding to the QEMU fw_cfg interface.
   3
   4   Refer to "docs/specs/fw_cfg.txt" in the QEMU source directory.
   5
   6   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
   7   Copyright (C) 2013 - 2017, Red Hat, Inc.
   8
   9   This program and the accompanying materials are licensed and made available
  10   under the terms and conditions of the BSD License which accompanies this
  11   distribution. The full text of the license may be found at
  12   http://opensource.org/licenses/bsd-license.php
  13
  14   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
  15   WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  16 **/
  17
  18 #ifndef __FW_CFG_H__
  19 #define __FW_CFG_H__
  20
  21 #include <Base.h>
  22
  23 //
  24 // The size, in bytes, of names of firmware configuration files, including at
  25 // least one terminating NUL byte.
  26 //
  27 #define QEMU_FW_CFG_FNAME_SIZE 56
  28
  29 //
  30 // If the following bit is set in the UINT32 fw_cfg revision / feature bitmap
  31 // -- read from key 0x0001 with the basic IO Port or MMIO method --, then the
  32 // DMA interface is available.
  33 //
  34 #define FW_CFG_F_DMA BIT1
  35
  36 //
  37 // Macros for the FW_CFG_DMA_ACCESS.Control bitmap (in native encoding).
  38 //
  39 #define FW_CFG_DMA_CTL_ERROR  BIT0
  40 #define FW_CFG_DMA_CTL_READ   BIT1
  41 #define FW_CFG_DMA_CTL_SKIP   BIT2
  42 #define FW_CFG_DMA_CTL_SELECT BIT3
  43 #define FW_CFG_DMA_CTL_WRITE  BIT4
  44
  45 //
  46 // The fw_cfg registers can be found at these IO Ports, on the IO-mapped
  47 // platforms (Ia32 and X64).
  48 //
  49 #define FW_CFG_IO_SELECTOR    0x510
  50 #define FW_CFG_IO_DATA        0x511
  51 #define FW_CFG_IO_DMA_ADDRESS 0x514
  52
  53 //
  54 // Numerically defined keys.
  55 //
  56 typedef enum {
  57   QemuFwCfgItemSignature            = 0x0000,
  58   QemuFwCfgItemInterfaceVersion     = 0x0001,
  59   QemuFwCfgItemSystemUuid           = 0x0002,
  60   QemuFwCfgItemRamSize              = 0x0003,
  61   QemuFwCfgItemGraphicsEnabled      = 0x0004,
  62   QemuFwCfgItemSmpCpuCount          = 0x0005,
  63   QemuFwCfgItemMachineId            = 0x0006,
  64   QemuFwCfgItemKernelAddress        = 0x0007,
  65   QemuFwCfgItemKernelSize           = 0x0008,
  66   QemuFwCfgItemKernelCommandLine    = 0x0009,
  67   QemuFwCfgItemInitrdAddress        = 0x000a,
  68   QemuFwCfgItemInitrdSize           = 0x000b,
  69   QemuFwCfgItemBootDevice           = 0x000c,
  70   QemuFwCfgItemNumaData             = 0x000d,
  71   QemuFwCfgItemBootMenu             = 0x000e,
  72   QemuFwCfgItemMaximumCpuCount      = 0x000f,
  73   QemuFwCfgItemKernelEntry          = 0x0010,
  74   QemuFwCfgItemKernelData           = 0x0011,
  75   QemuFwCfgItemInitrdData           = 0x0012,
  76   QemuFwCfgItemCommandLineAddress   = 0x0013,
  77   QemuFwCfgItemCommandLineSize      = 0x0014,
  78   QemuFwCfgItemCommandLineData      = 0x0015,
  79   QemuFwCfgItemKernelSetupAddress   = 0x0016,
  80   QemuFwCfgItemKernelSetupSize      = 0x0017,
  81   QemuFwCfgItemKernelSetupData      = 0x0018,
  82   QemuFwCfgItemFileDir              = 0x0019,
  83
  84   QemuFwCfgItemX86AcpiTables        = 0x8000,
  85   QemuFwCfgItemX86SmbiosTables      = 0x8001,
  86   QemuFwCfgItemX86Irq0Override      = 0x8002,
  87   QemuFwCfgItemX86E820Table         = 0x8003,
  88   QemuFwCfgItemX86HpetData          = 0x8004,
  89
  90 } FIRMWARE_CONFIG_ITEM;
  91
  92 //
  93 // Communication structure for the DMA access method. All fields are encoded in
  94 // big endian.
  95 //
  96 #pragma pack (1)
  97 typedef struct {
  98   UINT32 Control;
  99   UINT32 Length;
 100   UINT64 Address;
 101 } FW_CFG_DMA_ACCESS;
 102 #pragma pack ()
 103
 104 #endif