2 PlatformInitLib header file.
4 Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
9 #ifndef PLATFORM_INIT_LIB_H_
10 #define PLATFORM_INIT_LIB_H_
16 EFI_HOB_GUID_TYPE GuidHeader
;
17 UINT16 HostBridgeDevId
;
19 UINT64 PcdConfidentialComputingGuestAttr
;
20 BOOLEAN SevEsIsEnabled
;
25 BOOLEAN SmmSmramRequire
;
26 BOOLEAN Q35SmramAtDefaultSmbase
;
29 UINT64 FirstNonAddress
;
30 UINT8 PhysMemAddressWidth
;
34 BOOLEAN PcdSetNxForStack
;
35 UINT64 PcdTdxSharedBitMask
;
37 UINT64 PcdPciMmio64Base
;
38 UINT64 PcdPciMmio64Size
;
39 UINT32 PcdPciMmio32Base
;
40 UINT32 PcdPciMmio32Size
;
44 UINT64 PcdEmuVariableNvStoreReserved
;
45 UINT32 PcdCpuBootLogicalProcessorNumber
;
46 UINT32 PcdCpuMaxLogicalProcessorNumber
;
47 UINT32 DefaultMaxCpuNumber
;
49 UINT32 S3AcpiReservedMemoryBase
;
50 UINT32 S3AcpiReservedMemorySize
;
51 } EFI_HOB_PLATFORM_INFO
;
55 Reads 8-bits of CMOS data.
57 Reads the 8-bits of CMOS data at the location specified by Index.
58 The 8-bit read value is returned.
60 @param Index The CMOS location to read.
62 @return The value read.
72 Writes 8-bits of CMOS data.
74 Writes 8-bits of CMOS data to the location specified by Index
75 with the value specified by Value and returns Value.
77 @param Index The CMOS location to write.
78 @param Value The value to write to CMOS.
80 @return The value written to CMOS.
95 PlatformDebugDumpCmos (
101 PlatformAddIoMemoryBaseSizeHob (
102 IN EFI_PHYSICAL_ADDRESS MemoryBase
,
108 PlatformAddIoMemoryRangeHob (
109 IN EFI_PHYSICAL_ADDRESS MemoryBase
,
110 IN EFI_PHYSICAL_ADDRESS MemoryLimit
115 PlatformAddMemoryBaseSizeHob (
116 IN EFI_PHYSICAL_ADDRESS MemoryBase
,
122 PlatformAddMemoryRangeHob (
123 IN EFI_PHYSICAL_ADDRESS MemoryBase
,
124 IN EFI_PHYSICAL_ADDRESS MemoryLimit
129 PlatformAddReservedMemoryBaseSizeHob (
130 IN EFI_PHYSICAL_ADDRESS MemoryBase
,
131 IN UINT64 MemorySize
,
137 PlatformQemuUc32BaseInitialization (
138 IN OUT EFI_HOB_PLATFORM_INFO
*PlatformInfoHob
143 PlatformGetSystemMemorySizeBelow4gb (
144 IN EFI_HOB_PLATFORM_INFO
*PlatformInfoHob
148 Initialize the PhysMemAddressWidth field in PlatformInfoHob based on guest RAM size.
152 PlatformAddressWidthInitialization (
153 IN OUT EFI_HOB_PLATFORM_INFO
*PlatformInfoHob
157 Peform Memory Detection for QEMU / KVM
162 PlatformQemuInitializeRam (
163 IN EFI_HOB_PLATFORM_INFO
*PlatformInfoHob
168 PlatformQemuInitializeRamForS3 (
169 IN EFI_HOB_PLATFORM_INFO
*PlatformInfoHob
174 PlatformMemMapInitialization (
175 IN OUT EFI_HOB_PLATFORM_INFO
*PlatformInfoHob
179 * Fetch "opt/ovmf/PcdSetNxForStack" from QEMU
181 * @param Setting The pointer to the setting of "/opt/ovmf/PcdSetNxForStack".
182 * @return EFI_SUCCESS Successfully fetch the settings.
186 PlatformNoexecDxeInitialization (
187 IN OUT EFI_HOB_PLATFORM_INFO
*PlatformInfoHob
192 PlatformMiscInitialization (
193 IN EFI_HOB_PLATFORM_INFO
*PlatformInfoHob
197 Fetch the boot CPU count and the possible CPU count from QEMU, and expose
198 them to UefiCpuPkg modules.
202 PlatformMaxCpuCountInitialization (
203 IN OUT EFI_HOB_PLATFORM_INFO
*PlatformInfoHob
207 In Tdx guest, some information need to be passed from host VMM to guest
208 firmware. For example, the memory resource, etc. These information are
209 prepared by host VMM and put in HobList which is described in TdxMetadata.
211 Information in HobList is treated as external input. From the security
212 perspective before it is consumed, it should be validated.
214 @retval EFI_SUCCESS Successfully process the hoblist
215 @retval Others Other error as indicated
224 In Tdx guest, the system memory is passed in TdHob by host VMM. So
225 the major task of PlatformTdxPublishRamRegions is to walk thru the
226 TdHob list and transfer the ResourceDescriptorHob and MemoryAllocationHob
227 to the hobs in DXE phase.
229 MemoryAllocationHob should also be created for Mailbox and Ovmf work area.
233 PlatformTdxPublishRamRegions (
237 #endif // PLATFORM_INIT_LIB_H_