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1 /** @file
2 A simple DXE_DRIVER that causes the PCI Bus UEFI_DRIVER to allocate 64-bit
3 MMIO BARs above 4 GB, regardless of option ROM availability (as long as a CSM
4 is not present), conserving 32-bit MMIO aperture for 32-bit BARs.
5
6 Copyright (C) 2016, Red Hat, Inc.
7 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
8
9 SPDX-License-Identifier: BSD-2-Clause-Patent
10 **/
11
12 #include <IndustryStandard/Acpi10.h>
13 #include <IndustryStandard/Pci22.h>
14
15 #include <Library/DebugLib.h>
16 #include <Library/MemoryAllocationLib.h>
17 #include <Library/PcdLib.h>
18 #include <Library/UefiBootServicesTableLib.h>
19
20 #include <Protocol/IncompatiblePciDeviceSupport.h>
21 #include <Protocol/LegacyBios.h>
22
23 //
24 // The Legacy BIOS protocol has been located.
25 //
26 STATIC BOOLEAN mLegacyBiosInstalled;
27
28 //
29 // The protocol interface this driver produces.
30 //
31 STATIC EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
32 mIncompatiblePciDeviceSupport;
33
34 //
35 // Configuration template for the CheckDevice() protocol member function.
36 //
37 // Refer to Table 20 "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage" in
38 // the Platform Init 1.4a Spec, Volume 5.
39 //
40 // This structure is interpreted by the UpdatePciInfo() function in the edk2
41 // PCI Bus UEFI_DRIVER.
42 //
43 #pragma pack (1)
44 typedef struct {
45 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR AddressSpaceDesc;
46 EFI_ACPI_END_TAG_DESCRIPTOR EndDesc;
47 } MMIO64_PREFERENCE;
48 #pragma pack ()
49
50 STATIC CONST MMIO64_PREFERENCE mConfiguration = {
51 //
52 // AddressSpaceDesc
53 //
54 {
55 ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc
56 (UINT16)( // Len
57 sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
58 OFFSET_OF (
59 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
60 ResType
61 )
62 ),
63 ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType
64 0, // GenFlag
65 0, // SpecificFlag
66 64, // AddrSpaceGranularity:
67 // aperture selection hint
68 // for BAR allocation
69 0, // AddrRangeMin
70 0, // AddrRangeMax:
71 // no special alignment
72 // for affected BARs
73 MAX_UINT64, // AddrTranslationOffset:
74 // hint covers all
75 // eligible BARs
76 0 // AddrLen:
77 // use probed BAR size
78 },
79 //
80 // EndDesc
81 //
82 {
83 ACPI_END_TAG_DESCRIPTOR, // Desc
84 0 // Checksum: to be ignored
85 }
86 };
87
88 //
89 // The CheckDevice() member function has been called.
90 //
91 STATIC BOOLEAN mCheckDeviceCalled;
92
93 /**
94 Notification callback for Legacy BIOS protocol installation.
95
96 @param[in] Event Event whose notification function is being invoked.
97
98 @param[in] Context The pointer to the notification function's context, which
99 is implementation-dependent.
100 **/
101 STATIC
102 VOID
103 EFIAPI
104 LegacyBiosInstalled (
105 IN EFI_EVENT Event,
106 IN VOID *Context
107 )
108 {
109 EFI_STATUS Status;
110 EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
111
112 ASSERT (!mCheckDeviceCalled);
113
114 Status = gBS->LocateProtocol (
115 &gEfiLegacyBiosProtocolGuid,
116 NULL /* Registration */,
117 (VOID **)&LegacyBios
118 );
119 if (EFI_ERROR (Status)) {
120 return;
121 }
122
123 mLegacyBiosInstalled = TRUE;
124
125 //
126 // Close the event and deregister this callback.
127 //
128 Status = gBS->CloseEvent (Event);
129 ASSERT_EFI_ERROR (Status);
130 }
131
132 /**
133 Returns a list of ACPI resource descriptors that detail the special resource
134 configuration requirements for an incompatible PCI device.
135
136 Prior to bus enumeration, the PCI bus driver will look for the presence of
137 the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL. Only one instance of this
138 protocol can be present in the system. For each PCI device that the PCI bus
139 driver discovers, the PCI bus driver calls this function with the device's
140 vendor ID, device ID, revision ID, subsystem vendor ID, and subsystem device
141 ID. If the VendorId, DeviceId, RevisionId, SubsystemVendorId, or
142 SubsystemDeviceId value is set to (UINTN)-1, that field will be ignored. The
143 ID values that are not (UINTN)-1 will be used to identify the current device.
144
145 This function will only return EFI_SUCCESS. However, if the device is an
146 incompatible PCI device, a list of ACPI resource descriptors will be returned
147 in Configuration. Otherwise, NULL will be returned in Configuration instead.
148 The PCI bus driver does not need to allocate memory for Configuration.
149 However, it is the PCI bus driver's responsibility to free it. The PCI bus
150 driver then can configure this device with the information that is derived
151 from this list of resource nodes, rather than the result of BAR probing.
152
153 Only the following two resource descriptor types from the ACPI Specification
154 may be used to describe the incompatible PCI device resource requirements:
155 - QWORD Address Space Descriptor (ACPI 2.0, section 6.4.3.5.1; also ACPI 3.0)
156 - End Tag (ACPI 2.0, section 6.4.2.8; also ACPI 3.0)
157
158 The QWORD Address Space Descriptor can describe memory, I/O, and bus number
159 ranges for dynamic or fixed resources. The configuration of a PCI root bridge
160 is described with one or more QWORD Address Space Descriptors, followed by an
161 End Tag. See the ACPI Specification for details on the field values.
162
163 @param[in] This Pointer to the
164 EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
165 instance.
166
167 @param[in] VendorId A unique ID to identify the manufacturer of
168 the PCI device. See the Conventional PCI
169 Specification 3.0 for details.
170
171 @param[in] DeviceId A unique ID to identify the particular PCI
172 device. See the Conventional PCI
173 Specification 3.0 for details.
174
175 @param[in] RevisionId A PCI device-specific revision identifier.
176 See the Conventional PCI Specification 3.0
177 for details.
178
179 @param[in] SubsystemVendorId Specifies the subsystem vendor ID. See the
180 Conventional PCI Specification 3.0 for
181 details.
182
183 @param[in] SubsystemDeviceId Specifies the subsystem device ID. See the
184 Conventional PCI Specification 3.0 for
185 details.
186
187 @param[out] Configuration A list of ACPI resource descriptors that
188 detail the configuration requirement.
189
190 @retval EFI_SUCCESS The function always returns EFI_SUCCESS.
191 **/
192 STATIC
193 EFI_STATUS
194 EFIAPI
195 CheckDevice (
196 IN EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *This,
197 IN UINTN VendorId,
198 IN UINTN DeviceId,
199 IN UINTN RevisionId,
200 IN UINTN SubsystemVendorId,
201 IN UINTN SubsystemDeviceId,
202 OUT VOID **Configuration
203 )
204 {
205 mCheckDeviceCalled = TRUE;
206
207 //
208 // Unlike the general description of this protocol member suggests, there is
209 // nothing incompatible about the PCI devices that we'll match here. We'll
210 // match all PCI devices, and generate exactly one QWORD Address Space
211 // Descriptor for each. That descriptor will instruct the PCI Bus UEFI_DRIVER
212 // not to degrade 64-bit MMIO BARs for the device, even if a PCI option ROM
213 // BAR is present on the device.
214 //
215 // The concern captured in the PCI Bus UEFI_DRIVER is that a legacy BIOS boot
216 // (via a CSM) could dispatch a legacy option ROM on the device, which might
217 // have trouble with MMIO BARs that have been allocated outside of the 32-bit
218 // address space. But, if we don't support legacy option ROMs at all, then
219 // this problem cannot arise.
220 //
221 if (mLegacyBiosInstalled) {
222 //
223 // Don't interfere with resource degradation.
224 //
225 *Configuration = NULL;
226 return EFI_SUCCESS;
227 }
228
229 //
230 // This member function is mis-specified actually: it is supposed to allocate
231 // memory, but as specified, it could not return an error status. Thankfully,
232 // the edk2 PCI Bus UEFI_DRIVER actually handles error codes; see the
233 // UpdatePciInfo() function.
234 //
235 *Configuration = AllocateCopyPool (sizeof mConfiguration, &mConfiguration);
236 if (*Configuration == NULL) {
237 DEBUG ((
238 DEBUG_WARN,
239 "%a: 64-bit MMIO BARs may be degraded for PCI 0x%04x:0x%04x (rev %d)\n",
240 __FUNCTION__,
241 (UINT32)VendorId,
242 (UINT32)DeviceId,
243 (UINT8)RevisionId
244 ));
245 return EFI_OUT_OF_RESOURCES;
246 }
247
248 return EFI_SUCCESS;
249 }
250
251 /**
252 Entry point for this driver.
253
254 @param[in] ImageHandle Image handle of this driver.
255 @param[in] SystemTable Pointer to SystemTable.
256
257 @retval EFI_SUCESS Driver has loaded successfully.
258 @retval EFI_UNSUPPORTED PCI resource allocation has been disabled.
259 @retval EFI_UNSUPPORTED There is no 64-bit PCI MMIO aperture.
260 @return Error codes from lower level functions.
261
262 **/
263 EFI_STATUS
264 EFIAPI
265 DriverInitialize (
266 IN EFI_HANDLE ImageHandle,
267 IN EFI_SYSTEM_TABLE *SystemTable
268 )
269 {
270 EFI_STATUS Status;
271 EFI_EVENT Event;
272 VOID *Registration;
273
274 //
275 // If there is no 64-bit PCI MMIO aperture, then 64-bit MMIO BARs have to be
276 // allocated under 4 GB unconditionally.
277 //
278 if (PcdGet64 (PcdPciMmio64Size) == 0) {
279 return EFI_UNSUPPORTED;
280 }
281
282 //
283 // Otherwise, create a protocol notify to see if a CSM is present. (With the
284 // CSM absent, the PCI Bus driver won't have to worry about allocating 64-bit
285 // MMIO BARs in the 32-bit MMIO aperture, for the sake of a legacy BIOS.)
286 //
287 // If the Legacy BIOS Protocol is present at the time of this driver starting
288 // up, we can mark immediately that the PCI Bus driver should perform the
289 // usual 64-bit MMIO BAR degradation.
290 //
291 // Otherwise, if the Legacy BIOS Protocol is absent at startup, it may be
292 // installed later. However, if it doesn't show up until the first
293 // EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL.CheckDevice() call from the
294 // PCI Bus driver, then it never will:
295 //
296 // 1. The following drivers are dispatched in some unspecified order:
297 // - PCI Host Bridge DXE_DRIVER,
298 // - PCI Bus UEFI_DRIVER,
299 // - this DXE_DRIVER,
300 // - Legacy BIOS DXE_DRIVER.
301 //
302 // 2. The DXE_CORE enters BDS.
303 //
304 // 3. The platform BDS connects the PCI Root Bridge IO instances (produced by
305 // the PCI Host Bridge DXE_DRIVER).
306 //
307 // 4. The PCI Bus UEFI_DRIVER enumerates resources and calls into this
308 // DXE_DRIVER (CheckDevice()).
309 //
310 // 5. This driver remembers if EFI_LEGACY_BIOS_PROTOCOL has been installed
311 // sometime during step 1 (produced by the Legacy BIOS DXE_DRIVER).
312 //
313 // For breaking this order, the Legacy BIOS DXE_DRIVER would have to install
314 // its protocol after the firmware enters BDS, which cannot happen.
315 //
316 Status = gBS->CreateEvent (
317 EVT_NOTIFY_SIGNAL,
318 TPL_CALLBACK,
319 LegacyBiosInstalled,
320 NULL /* Context */,
321 &Event
322 );
323 if (EFI_ERROR (Status)) {
324 return Status;
325 }
326
327 Status = gBS->RegisterProtocolNotify (
328 &gEfiLegacyBiosProtocolGuid,
329 Event,
330 &Registration
331 );
332 if (EFI_ERROR (Status)) {
333 goto CloseEvent;
334 }
335
336 Status = gBS->SignalEvent (Event);
337 ASSERT_EFI_ERROR (Status);
338
339 mIncompatiblePciDeviceSupport.CheckDevice = CheckDevice;
340 Status = gBS->InstallMultipleProtocolInterfaces (
341 &ImageHandle,
342 &gEfiIncompatiblePciDeviceSupportProtocolGuid,
343 &mIncompatiblePciDeviceSupport,
344 NULL
345 );
346 if (EFI_ERROR (Status)) {
347 goto CloseEvent;
348 }
349
350 return EFI_SUCCESS;
351
352 CloseEvent:
353 if (!mLegacyBiosInstalled) {
354 EFI_STATUS CloseStatus;
355
356 CloseStatus = gBS->CloseEvent (Event);
357 ASSERT_EFI_ERROR (CloseStatus);
358 }
359
360 return Status;
361 }