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1 /** @file
2 ACPI Timer implements one instance of Timer Library.
3
4 Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
6
7 This program and the accompanying materials are
8 licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #include <Base.h>
18 #include <Library/TimerLib.h>
19 #include <Library/BaseLib.h>
20 #include <Library/IoLib.h>
21 #include <Library/PciLib.h>
22 #include <Library/DebugLib.h>
23 #include <Library/PcdLib.h>
24 #include <IndustryStandard/Pci22.h>
25 #include <IndustryStandard/Acpi.h>
26
27 //
28 // PCI Location of PIIX4 Power Management PCI Configuration Registers
29 //
30 #define PIIX4_POWER_MANAGEMENT_BUS 0x00
31 #define PIIX4_POWER_MANAGEMENT_DEVICE 0x01
32 #define PIIX4_POWER_MANAGEMENT_FUNCTION 0x03
33
34 //
35 // Macro to access PIIX4 Power Management PCI Configuration Registers
36 //
37 #define PIIX4_PCI_POWER_MANAGEMENT_REGISTER(Register) \
38 PCI_LIB_ADDRESS ( \
39 PIIX4_POWER_MANAGEMENT_BUS, \
40 PIIX4_POWER_MANAGEMENT_DEVICE, \
41 PIIX4_POWER_MANAGEMENT_FUNCTION, \
42 Register \
43 )
44
45 //
46 // PIIX4 Power Management PCI Configuration Registers
47 //
48 #define PMBA PIIX4_PCI_POWER_MANAGEMENT_REGISTER (0x40)
49 #define PMBA_RTE BIT0
50 #define PMREGMISC PIIX4_PCI_POWER_MANAGEMENT_REGISTER (0x80)
51 #define PMIOSE BIT0
52
53 //
54 // The ACPI Time in the PIIX4 is a 24-bit counter
55 //
56 #define ACPI_TIMER_COUNT_SIZE BIT24
57
58 //
59 // Offset in the PIIX4 Power Management Base Address to the ACPI Timer
60 //
61 #define ACPI_TIMER_OFFSET 0x8
62
63 /**
64 The constructor function enables ACPI IO space.
65
66 If ACPI I/O space not enabled, this function will enable it.
67 It will always return RETURN_SUCCESS.
68
69 @retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
70
71 **/
72 RETURN_STATUS
73 EFIAPI
74 AcpiTimerLibConstructor (
75 VOID
76 )
77 {
78 //
79 // Check to see if the PIIX4 Power Management Base Address is already enabled
80 //
81 if ((PciRead8 (PMREGMISC) & PMIOSE) == 0) {
82 //
83 // If the PIIX4 Power Management Base Address is not programmed,
84 // then program the PIIX4 Power Management Base Address from a PCD.
85 //
86 PciAndThenOr32 (PMBA, (UINT32)(~0x0000FFC0), PcdGet16 (PcdAcpiPmBaseAddress));
87
88 //
89 // Enable PMBA I/O port decodes in PMREGMISC
90 //
91 PciOr8 (PMREGMISC, PMIOSE);
92 }
93
94 return RETURN_SUCCESS;
95 }
96
97 /**
98 Internal function to read the current tick counter of ACPI.
99
100 Internal function to read the current tick counter of ACPI.
101
102 @return The tick counter read.
103
104 **/
105 UINT32
106 InternalAcpiGetTimerTick (
107 VOID
108 )
109 {
110 //
111 // Read PMBA to read and return the current ACPI timer value.
112 //
113 return IoRead32 ((PciRead32 (PMBA) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);
114 }
115
116 /**
117 Stalls the CPU for at least the given number of ticks.
118
119 Stalls the CPU for at least the given number of ticks. It's invoked by
120 MicroSecondDelay() and NanoSecondDelay().
121
122 @param Delay A period of time to delay in ticks.
123
124 **/
125 VOID
126 InternalAcpiDelay (
127 IN UINT32 Delay
128 )
129 {
130 UINT32 Ticks;
131 UINT32 Times;
132
133 Times = Delay >> 22;
134 Delay &= BIT22 - 1;
135 do {
136 //
137 // The target timer count is calculated here
138 //
139 Ticks = InternalAcpiGetTimerTick () + Delay;
140 Delay = BIT22;
141 //
142 // Wait until time out
143 // Delay >= 2^23 could not be handled by this function
144 // Timer wrap-arounds are handled correctly by this function
145 //
146 while (((Ticks - InternalAcpiGetTimerTick ()) & BIT23) == 0) {
147 CpuPause ();
148 }
149 } while (Times-- > 0);
150 }
151
152 /**
153 Stalls the CPU for at least the given number of microseconds.
154
155 Stalls the CPU for the number of microseconds specified by MicroSeconds.
156
157 @param MicroSeconds The minimum number of microseconds to delay.
158
159 @return MicroSeconds
160
161 **/
162 UINTN
163 EFIAPI
164 MicroSecondDelay (
165 IN UINTN MicroSeconds
166 )
167 {
168 InternalAcpiDelay (
169 (UINT32)DivU64x32 (
170 MultU64x32 (
171 MicroSeconds,
172 ACPI_TIMER_FREQUENCY
173 ),
174 1000000u
175 )
176 );
177 return MicroSeconds;
178 }
179
180 /**
181 Stalls the CPU for at least the given number of nanoseconds.
182
183 Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
184
185 @param NanoSeconds The minimum number of nanoseconds to delay.
186
187 @return NanoSeconds
188
189 **/
190 UINTN
191 EFIAPI
192 NanoSecondDelay (
193 IN UINTN NanoSeconds
194 )
195 {
196 InternalAcpiDelay (
197 (UINT32)DivU64x32 (
198 MultU64x32 (
199 NanoSeconds,
200 ACPI_TIMER_FREQUENCY
201 ),
202 1000000000u
203 )
204 );
205 return NanoSeconds;
206 }
207
208 /**
209 Retrieves the current value of a 64-bit free running performance counter.
210
211 Retrieves the current value of a 64-bit free running performance counter. The
212 counter can either count up by 1 or count down by 1. If the physical
213 performance counter counts by a larger increment, then the counter values
214 must be translated. The properties of the counter can be retrieved from
215 GetPerformanceCounterProperties().
216
217 @return The current value of the free running performance counter.
218
219 **/
220 UINT64
221 EFIAPI
222 GetPerformanceCounter (
223 VOID
224 )
225 {
226 return (UINT64)InternalAcpiGetTimerTick ();
227 }
228
229 /**
230 Retrieves the 64-bit frequency in Hz and the range of performance counter
231 values.
232
233 If StartValue is not NULL, then the value that the performance counter starts
234 with immediately after is it rolls over is returned in StartValue. If
235 EndValue is not NULL, then the value that the performance counter end with
236 immediately before it rolls over is returned in EndValue. The 64-bit
237 frequency of the performance counter in Hz is always returned. If StartValue
238 is less than EndValue, then the performance counter counts up. If StartValue
239 is greater than EndValue, then the performance counter counts down. For
240 example, a 64-bit free running counter that counts up would have a StartValue
241 of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
242 that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
243
244 @param StartValue The value the performance counter starts with when it
245 rolls over.
246 @param EndValue The value that the performance counter ends with before
247 it rolls over.
248
249 @return The frequency in Hz.
250
251 **/
252 UINT64
253 EFIAPI
254 GetPerformanceCounterProperties (
255 OUT UINT64 *StartValue, OPTIONAL
256 OUT UINT64 *EndValue OPTIONAL
257 )
258 {
259 if (StartValue != NULL) {
260 *StartValue = 0;
261 }
262
263 if (EndValue != NULL) {
264 *EndValue = ACPI_TIMER_COUNT_SIZE - 1;
265 }
266
267 return ACPI_TIMER_FREQUENCY;
268 }
269
270 /**
271 Converts elapsed ticks of performance counter to time in nanoseconds.
272
273 This function converts the elapsed ticks of running performance counter to
274 time value in unit of nanoseconds.
275
276 @param Ticks The number of elapsed ticks of running performance counter.
277
278 @return The elapsed time in nanoseconds.
279
280 **/
281 UINT64
282 EFIAPI
283 GetTimeInNanoSecond (
284 IN UINT64 Ticks
285 )
286 {
287 UINT64 NanoSeconds;
288 UINT32 Remainder;
289
290 //
291 // Ticks
292 // Time = --------- x 1,000,000,000
293 // Frequency
294 //
295 NanoSeconds = MultU64x32 (DivU64x32Remainder (Ticks, ACPI_TIMER_FREQUENCY, &Remainder), 1000000000u);
296
297 //
298 // Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000)
299 // will not overflow 64-bit.
300 //
301 NanoSeconds += DivU64x32 (MultU64x32 ((UINT64) Remainder, 1000000000u), ACPI_TIMER_FREQUENCY);
302
303 return NanoSeconds;
304 }