OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c

   1 /** @file
   2   Provide constructor and GetTick for BaseRom instance of ACPI Timer Library
   3
   4   Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
   5   Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
   6
   7   This program and the accompanying materials are licensed and made
   8   available under the terms and conditions of the BSD License which
   9   accompanies this distribution.   The full text of the license may
  10   be found at http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14 **/
  15
  16 #include <Library/DebugLib.h>
  17 #include <Library/IoLib.h>
  18 #include <Library/PciLib.h>
  19 #include <Library/PcdLib.h>
  20 #include <OvmfPlatforms.h>
  21
  22 //
  23 // Power Management PCI Configuration Register fields
  24 //
  25 #define PMBA_RTE  BIT0
  26 #define PMIOSE    BIT0
  27
  28 //
  29 // Offset in the Power Management Base Address to the ACPI Timer
  30 //
  31 #define ACPI_TIMER_OFFSET      0x8
  32
  33 /**
  34   The constructor function enables ACPI IO space.
  35
  36   If ACPI I/O space not enabled, this function will enable it.
  37   It will always return RETURN_SUCCESS.
  38
  39   @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.
  40
  41 **/
  42 RETURN_STATUS
  43 EFIAPI
  44 AcpiTimerLibConstructor (
  45   VOID
  46   )
  47 {
  48   UINT16 HostBridgeDevId;
  49   UINTN Pmba;
  50   UINTN PmRegMisc;
  51
  52   //
  53   // Query Host Bridge DID to determine platform type
  54   //
  55   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
  56   switch (HostBridgeDevId) {
  57     case INTEL_82441_DEVICE_ID:
  58       Pmba      = POWER_MGMT_REGISTER_PIIX4 (0x40);
  59       PmRegMisc = POWER_MGMT_REGISTER_PIIX4 (0x80);
  60       break;
  61     case INTEL_Q35_MCH_DEVICE_ID:
  62       Pmba      = POWER_MGMT_REGISTER_Q35 (0x40);
  63       PmRegMisc = POWER_MGMT_REGISTER_Q35 (0x80);
  64       break;
  65     default:
  66       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
  67         __FUNCTION__, HostBridgeDevId));
  68       ASSERT (FALSE);
  69       return RETURN_UNSUPPORTED;
  70   }
  71
  72   //
  73   // Check to see if the Power Management Base Address is already enabled
  74   //
  75   if ((PciRead8 (PmRegMisc) & PMIOSE) == 0) {
  76     //
  77     // If the Power Management Base Address is not programmed,
  78     // then program the Power Management Base Address from a PCD.
  79     //
  80     PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
  81
  82     //
  83     // Enable PMBA I/O port decodes in PMREGMISC
  84     //
  85     PciOr8 (PmRegMisc, PMIOSE);
  86   }
  87
  88   return RETURN_SUCCESS;
  89 }
  90
  91 /**
  92   Internal function to read the current tick counter of ACPI.
  93
  94   Dynamically compute the address of the ACPI tick counter based on the
  95   properties of the underlying platform, to avoid relying on global variables.
  96
  97   @return The tick counter read.
  98
  99 **/
 100 UINT32
 101 InternalAcpiGetTimerTick (
 102   VOID
 103   )
 104 {
 105   UINT16 HostBridgeDevId;
 106   UINTN Pmba;
 107
 108   //
 109   // Query Host Bridge DID to determine platform type
 110   //
 111   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
 112   switch (HostBridgeDevId) {
 113     case INTEL_82441_DEVICE_ID:
 114       Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
 115       break;
 116     case INTEL_Q35_MCH_DEVICE_ID:
 117       Pmba = POWER_MGMT_REGISTER_Q35 (0x40);
 118       break;
 119     default:
 120       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
 121         __FUNCTION__, HostBridgeDevId));
 122       ASSERT (FALSE);
 123       return 0;
 124   }
 125
 126   //
 127   //   Read PMBA to read and return the current ACPI timer value.
 128   //
 129   return IoRead32 ((PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);
 130 }