OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c

   1 /** @file
   2   Provide constructor and GetTick for BaseRom instance of ACPI Timer Library
   3
   4   Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
   5   Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
   6
   7   This program and the accompanying materials are licensed and made
   8   available under the terms and conditions of the BSD License which
   9   accompanies this distribution.   The full text of the license may
  10   be found at http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14 **/
  15
  16 #include <Library/DebugLib.h>
  17 #include <Library/IoLib.h>
  18 #include <Library/PciLib.h>
  19 #include <Library/PcdLib.h>
  20 #include <OvmfPlatforms.h>
  21
  22 //
  23 // Power Management PCI Configuration Register fields
  24 //
  25 #define PMBA_RTE      BIT0
  26 #define PIIX4_PMIOSE  BIT0
  27
  28 //
  29 // Offset in the Power Management Base Address to the ACPI Timer
  30 //
  31 #define ACPI_TIMER_OFFSET      0x8
  32
  33 /**
  34   The constructor function enables ACPI IO space.
  35
  36   If ACPI I/O space not enabled, this function will enable it.
  37   It will always return RETURN_SUCCESS.
  38
  39   @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.
  40
  41 **/
  42 RETURN_STATUS
  43 EFIAPI
  44 AcpiTimerLibConstructor (
  45   VOID
  46   )
  47 {
  48   UINT16 HostBridgeDevId;
  49   UINTN Pmba;
  50   UINTN AcpiCtlReg;
  51   UINT8 AcpiEnBit;
  52
  53   //
  54   // Query Host Bridge DID to determine platform type
  55   //
  56   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
  57   switch (HostBridgeDevId) {
  58     case INTEL_82441_DEVICE_ID:
  59       Pmba       = POWER_MGMT_REGISTER_PIIX4 (0x40);
  60       AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (0x80); // PMREGMISC
  61       AcpiEnBit  = PIIX4_PMIOSE;
  62       break;
  63     case INTEL_Q35_MCH_DEVICE_ID:
  64       Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
  65       AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
  66       AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;
  67       break;
  68     default:
  69       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
  70         __FUNCTION__, HostBridgeDevId));
  71       ASSERT (FALSE);
  72       return RETURN_UNSUPPORTED;
  73   }
  74
  75   //
  76   // Check to see if the Power Management Base Address is already enabled
  77   //
  78   if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
  79     //
  80     // If the Power Management Base Address is not programmed,
  81     // then program the Power Management Base Address from a PCD.
  82     //
  83     PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
  84
  85     //
  86     // Enable PMBA I/O port decodes
  87     //
  88     PciOr8 (AcpiCtlReg, AcpiEnBit);
  89   }
  90
  91   return RETURN_SUCCESS;
  92 }
  93
  94 /**
  95   Internal function to read the current tick counter of ACPI.
  96
  97   Dynamically compute the address of the ACPI tick counter based on the
  98   properties of the underlying platform, to avoid relying on global variables.
  99
 100   @return The tick counter read.
 101
 102 **/
 103 UINT32
 104 InternalAcpiGetTimerTick (
 105   VOID
 106   )
 107 {
 108   UINT16 HostBridgeDevId;
 109   UINTN Pmba;
 110
 111   //
 112   // Query Host Bridge DID to determine platform type
 113   //
 114   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
 115   switch (HostBridgeDevId) {
 116     case INTEL_82441_DEVICE_ID:
 117       Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
 118       break;
 119     case INTEL_Q35_MCH_DEVICE_ID:
 120       Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
 121       break;
 122     default:
 123       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
 124         __FUNCTION__, HostBridgeDevId));
 125       ASSERT (FALSE);
 126       return 0;
 127   }
 128
 129   //
 130   //   Read PMBA to read and return the current ACPI timer value.
 131   //
 132   return IoRead32 ((PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);
 133 }