OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c

   1 /** @file
   2   Provide constructor and GetTick for BaseRom instance of ACPI Timer Library
   3
   4   Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
   5   Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
   6
   7   This program and the accompanying materials are licensed and made
   8   available under the terms and conditions of the BSD License which
   9   accompanies this distribution.   The full text of the license may
  10   be found at http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14 **/
  15
  16 #include <Library/DebugLib.h>
  17 #include <Library/IoLib.h>
  18 #include <Library/PciLib.h>
  19 #include <OvmfPlatforms.h>
  20
  21 /**
  22   The constructor function enables ACPI IO space.
  23
  24   If ACPI I/O space not enabled, this function will enable it.
  25   It will always return RETURN_SUCCESS.
  26
  27   @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.
  28
  29 **/
  30 RETURN_STATUS
  31 EFIAPI
  32 AcpiTimerLibConstructor (
  33   VOID
  34   )
  35 {
  36   UINT16 HostBridgeDevId;
  37   UINTN Pmba;
  38   UINT32 PmbaAndVal;
  39   UINT32 PmbaOrVal;
  40   UINTN AcpiCtlReg;
  41   UINT8 AcpiEnBit;
  42
  43   //
  44   // Query Host Bridge DID to determine platform type
  45   //
  46   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
  47   switch (HostBridgeDevId) {
  48     case INTEL_82441_DEVICE_ID:
  49       Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
  50       PmbaAndVal = ~(UINT32)PIIX4_PMBA_MASK;
  51       PmbaOrVal  = PIIX4_PMBA_VALUE;
  52       AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
  53       AcpiEnBit  = PIIX4_PMREGMISC_PMIOSE;
  54       break;
  55     case INTEL_Q35_MCH_DEVICE_ID:
  56       Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
  57       PmbaAndVal = ~(UINT32)ICH9_PMBASE_MASK;
  58       PmbaOrVal  = ICH9_PMBASE_VALUE;
  59       AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
  60       AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;
  61       break;
  62     default:
  63       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
  64         __FUNCTION__, HostBridgeDevId));
  65       ASSERT (FALSE);
  66       return RETURN_UNSUPPORTED;
  67   }
  68
  69   //
  70   // Check to see if the Power Management Base Address is already enabled
  71   //
  72   if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
  73     //
  74     // If the Power Management Base Address is not programmed,
  75     // then program it now.
  76     //
  77     PciAndThenOr32 (Pmba, PmbaAndVal, PmbaOrVal);
  78
  79     //
  80     // Enable PMBA I/O port decodes
  81     //
  82     PciOr8 (AcpiCtlReg, AcpiEnBit);
  83   }
  84
  85   return RETURN_SUCCESS;
  86 }
  87
  88 /**
  89   Internal function to read the current tick counter of ACPI.
  90
  91   Dynamically compute the address of the ACPI tick counter based on the
  92   properties of the underlying platform, to avoid relying on global variables.
  93
  94   @return The tick counter read.
  95
  96 **/
  97 UINT32
  98 InternalAcpiGetTimerTick (
  99   VOID
 100   )
 101 {
 102   UINT16 HostBridgeDevId;
 103   UINTN Pmba;
 104
 105   //
 106   // Query Host Bridge DID to determine platform type
 107   //
 108   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
 109   switch (HostBridgeDevId) {
 110     case INTEL_82441_DEVICE_ID:
 111       Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
 112       break;
 113     case INTEL_Q35_MCH_DEVICE_ID:
 114       Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
 115       break;
 116     default:
 117       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
 118         __FUNCTION__, HostBridgeDevId));
 119       ASSERT (FALSE);
 120       return 0;
 121   }
 122
 123   //
 124   //   Read PMBA to read and return the current ACPI timer value.
 125   //
 126   return IoRead32 ((PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);
 127 }