OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c

   1 /** @file
   2   OVMF's instance of the PCI Host Bridge Library.
   3
   4   Copyright (C) 2016, Red Hat, Inc.
   5   Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
   6
   7   SPDX-License-Identifier: BSD-2-Clause-Patent
   8
   9 **/
  10 #include <IndustryStandard/Pci.h>                     // PCI_MAX_BUS
  11 #include <IndustryStandard/Q35MchIch9.h>              // INTEL_Q35_MCH_DEVIC...
  12 #include <Library/BaseMemoryLib.h>                    // ZeroMem()
  13 #include <Library/PcdLib.h>                           // PcdGet64()
  14 #include <Library/PciHostBridgeLib.h>                 // PCI_ROOT_BRIDGE_APE...
  15 #include <Library/PciHostBridgeUtilityLib.h>          // PciHostBridgeUtilit...
  16 #include <Protocol/PciHostBridgeResourceAllocation.h> // EFI_PCI_HOST_BRIDGE...
  17 #include <Protocol/PciRootBridgeIo.h>                 // EFI_PCI_ATTRIBUTE_I...
  18
  19 #include "PciHostBridge.h"
  20
  21 STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };
  22
  23
  24 /**
  25   Return all the root bridge instances in an array.
  26
  27   @param Count  Return the count of root bridge instances.
  28
  29   @return All the root bridge instances in an array.
  30           The array should be passed into PciHostBridgeFreeRootBridges()
  31           when it's not used.
  32 **/
  33 PCI_ROOT_BRIDGE *
  34 EFIAPI
  35 PciHostBridgeGetRootBridges (
  36   UINTN *Count
  37   )
  38 {
  39   UINT64               Attributes;
  40   UINT64               AllocationAttributes;
  41   PCI_ROOT_BRIDGE_APERTURE Io;
  42   PCI_ROOT_BRIDGE_APERTURE Mem;
  43   PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
  44
  45   if (PcdGetBool (PcdPciDisableBusEnumeration)) {
  46     return ScanForRootBridges (Count);
  47   }
  48
  49   ZeroMem (&Io, sizeof (Io));
  50   ZeroMem (&Mem, sizeof (Mem));
  51   ZeroMem (&MemAbove4G, sizeof (MemAbove4G));
  52
  53   Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
  54     EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
  55     EFI_PCI_ATTRIBUTE_ISA_IO_16 |
  56     EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
  57     EFI_PCI_ATTRIBUTE_VGA_MEMORY |
  58     EFI_PCI_ATTRIBUTE_VGA_IO_16 |
  59     EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
  60
  61   AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
  62   if (PcdGet64 (PcdPciMmio64Size) > 0) {
  63     AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
  64     MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
  65     MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +
  66                        PcdGet64 (PcdPciMmio64Size) - 1;
  67   } else {
  68     CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));
  69   }
  70
  71   Io.Base = PcdGet64 (PcdPciIoBase);
  72   Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
  73   Mem.Base = PcdGet64 (PcdPciMmio32Base);
  74   Mem.Limit = PcdGet64 (PcdPciMmio32Base) + (PcdGet64 (PcdPciMmio32Size) - 1);
  75
  76   return PciHostBridgeUtilityGetRootBridges (
  77     Count,
  78     Attributes,
  79     AllocationAttributes,
  80     FALSE,
  81     PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,
  82     0,
  83     PCI_MAX_BUS,
  84     &Io,
  85     &Mem,
  86     &MemAbove4G,
  87     &mNonExistAperture,
  88     &mNonExistAperture
  89     );
  90 }
  91
  92
  93 /**
  94   Free the root bridge instances array returned from
  95   PciHostBridgeGetRootBridges().
  96
  97   @param  The root bridge instances array.
  98   @param  The count of the array.
  99 **/
 100 VOID
 101 EFIAPI
 102 PciHostBridgeFreeRootBridges (
 103   PCI_ROOT_BRIDGE *Bridges,
 104   UINTN           Count
 105   )
 106 {
 107   PciHostBridgeUtilityFreeRootBridges (Bridges, Count);
 108 }
 109
 110
 111 /**
 112   Inform the platform that the resource conflict happens.
 113
 114   @param HostBridgeHandle Handle of the Host Bridge.
 115   @param Configuration    Pointer to PCI I/O and PCI memory resource
 116                           descriptors. The Configuration contains the resources
 117                           for all the root bridges. The resource for each root
 118                           bridge is terminated with END descriptor and an
 119                           additional END is appended indicating the end of the
 120                           entire resources. The resource descriptor field
 121                           values follow the description in
 122                           EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 123                           .SubmitResources().
 124 **/
 125 VOID
 126 EFIAPI
 127 PciHostBridgeResourceConflict (
 128   EFI_HANDLE                        HostBridgeHandle,
 129   VOID                              *Configuration
 130   )
 131 {
 132   PciHostBridgeUtilityResourceConflict (Configuration);
 133 }