OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPei.c

   1 /** @file
   2
   3   Stateful and implicitly initialized fw_cfg library implementation.
   4
   5   Copyright (C) 2013, Red Hat, Inc.
   6   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
   7   Copyright (c) 2017, Advanced Micro Devices. All rights reserved.<BR>
   8
   9   SPDX-License-Identifier: BSD-2-Clause-Patent
  10 **/
  11
  12 #include <Library/BaseLib.h>
  13 #include <Library/IoLib.h>
  14 #include <Library/DebugLib.h>
  15 #include <Library/QemuFwCfgLib.h>
  16 #include <Library/MemEncryptSevLib.h>
  17 #include <WorkArea.h>
  18
  19 #include "QemuFwCfgLibInternal.h"
  20
  21 STATIC BOOLEAN  mQemuFwCfgSupported = FALSE;
  22 STATIC BOOLEAN  mQemuFwCfgDmaSupported;
  23
  24 /**
  25   Check if it is Tdx guest
  26
  27   @retval    TRUE   It is Tdx guest
  28   @retval    FALSE  It is not Tdx guest
  29 **/
  30 BOOLEAN
  31 QemuFwCfgIsTdxGuest (
  32   VOID
  33   )
  34 {
  35   CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER  *CcWorkAreaHeader;
  36
  37   CcWorkAreaHeader = (CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER *)FixedPcdGet32 (PcdOvmfWorkAreaBase);
  38   return (CcWorkAreaHeader != NULL && CcWorkAreaHeader->GuestType == CcGuestTypeIntelTdx);
  39 }
  40
  41 /**
  42   Returns a boolean indicating if the firmware configuration interface
  43   is available or not.
  44
  45   This function may change fw_cfg state.
  46
  47   @retval    TRUE   The interface is available
  48   @retval    FALSE  The interface is not available
  49
  50 **/
  51 BOOLEAN
  52 EFIAPI
  53 QemuFwCfgIsAvailable (
  54   VOID
  55   )
  56 {
  57   return InternalQemuFwCfgIsAvailable ();
  58 }
  59
  60 RETURN_STATUS
  61 EFIAPI
  62 QemuFwCfgInitialize (
  63   VOID
  64   )
  65 {
  66   UINT32  Signature;
  67   UINT32  Revision;
  68
  69   //
  70   // Enable the access routines while probing to see if it is supported.
  71   // For probing we always use the IO Port (IoReadFifo8()) access method.
  72   //
  73   mQemuFwCfgSupported    = TRUE;
  74   mQemuFwCfgDmaSupported = FALSE;
  75
  76   QemuFwCfgSelectItem (QemuFwCfgItemSignature);
  77   Signature = QemuFwCfgRead32 ();
  78   DEBUG ((DEBUG_INFO, "FW CFG Signature: 0x%x\n", Signature));
  79   QemuFwCfgSelectItem (QemuFwCfgItemInterfaceVersion);
  80   Revision = QemuFwCfgRead32 ();
  81   DEBUG ((DEBUG_INFO, "FW CFG Revision: 0x%x\n", Revision));
  82   if ((Signature != SIGNATURE_32 ('Q', 'E', 'M', 'U')) ||
  83       (Revision < 1)
  84       )
  85   {
  86     DEBUG ((DEBUG_INFO, "QemuFwCfg interface not supported.\n"));
  87     mQemuFwCfgSupported = FALSE;
  88     return RETURN_SUCCESS;
  89   }
  90
  91   if ((Revision & FW_CFG_F_DMA) == 0) {
  92     DEBUG ((DEBUG_INFO, "QemuFwCfg interface (IO Port) is supported.\n"));
  93   } else {
  94     //
  95     // If SEV is enabled then we do not support DMA operations in PEI phase.
  96     // This is mainly because DMA in SEV guest requires using bounce buffer
  97     // (which need to allocate dynamic memory and allocating a PAGE size'd
  98     // buffer can be challenge in PEI phase)
  99     //
 100     if (MemEncryptSevIsEnabled ()) {
 101       DEBUG ((DEBUG_INFO, "SEV: QemuFwCfg fallback to IO Port interface.\n"));
 102     } else if (QemuFwCfgIsTdxGuest ()) {
 103       //
 104       // If TDX is enabled then we do not support DMA operations in PEI phase.
 105       // This is mainly because DMA in TDX guest requires using bounce buffer
 106       // (which need to allocate dynamic memory and allocating a PAGE size'd
 107       // buffer can be challenge in PEI phase)
 108       //
 109       DEBUG ((DEBUG_INFO, "TDX: QemuFwCfg fallback to IO Port interface.\n"));
 110     } else {
 111       mQemuFwCfgDmaSupported = TRUE;
 112       DEBUG ((DEBUG_INFO, "QemuFwCfg interface (DMA) is supported.\n"));
 113     }
 114   }
 115
 116   return RETURN_SUCCESS;
 117 }
 118
 119 /**
 120   Returns a boolean indicating if the firmware configuration interface is
 121   available for library-internal purposes.
 122
 123   This function never changes fw_cfg state.
 124
 125   @retval    TRUE   The interface is available internally.
 126   @retval    FALSE  The interface is not available internally.
 127 **/
 128 BOOLEAN
 129 InternalQemuFwCfgIsAvailable (
 130   VOID
 131   )
 132 {
 133   return mQemuFwCfgSupported;
 134 }
 135
 136 /**
 137   Returns a boolean indicating whether QEMU provides the DMA-like access method
 138   for fw_cfg.
 139
 140   @retval    TRUE   The DMA-like access method is available.
 141   @retval    FALSE  The DMA-like access method is unavailable.
 142 **/
 143 BOOLEAN
 144 InternalQemuFwCfgDmaIsAvailable (
 145   VOID
 146   )
 147 {
 148   return mQemuFwCfgDmaSupported;
 149 }
 150
 151 /**
 152   Transfer an array of bytes, or skip a number of bytes, using the DMA
 153   interface.
 154
 155   @param[in]     Size     Size in bytes to transfer or skip.
 156
 157   @param[in,out] Buffer   Buffer to read data into or write data from. Ignored,
 158                           and may be NULL, if Size is zero, or Control is
 159                           FW_CFG_DMA_CTL_SKIP.
 160
 161   @param[in]     Control  One of the following:
 162                           FW_CFG_DMA_CTL_WRITE - write to fw_cfg from Buffer.
 163                           FW_CFG_DMA_CTL_READ  - read from fw_cfg into Buffer.
 164                           FW_CFG_DMA_CTL_SKIP  - skip bytes in fw_cfg.
 165 **/
 166 VOID
 167 InternalQemuFwCfgDmaBytes (
 168   IN     UINT32  Size,
 169   IN OUT VOID    *Buffer OPTIONAL,
 170   IN     UINT32  Control
 171   )
 172 {
 173   volatile FW_CFG_DMA_ACCESS  Access;
 174   UINT32                      AccessHigh, AccessLow;
 175   UINT32                      Status;
 176
 177   ASSERT (
 178     Control == FW_CFG_DMA_CTL_WRITE || Control == FW_CFG_DMA_CTL_READ ||
 179     Control == FW_CFG_DMA_CTL_SKIP
 180     );
 181
 182   if (Size == 0) {
 183     return;
 184   }
 185
 186   //
 187   // SEV does not support DMA operations in PEI stage, we should
 188   // not have reached here.
 189   //
 190   ASSERT (!MemEncryptSevIsEnabled ());
 191
 192   //
 193   // TDX does not support DMA operations in PEI stage, we should
 194   // not have reached here.
 195   //
 196   ASSERT (!QemuFwCfgIsTdxGuest ());
 197
 198   Access.Control = SwapBytes32 (Control);
 199   Access.Length  = SwapBytes32 (Size);
 200   Access.Address = SwapBytes64 ((UINTN)Buffer);
 201
 202   //
 203   // Delimit the transfer from (a) modifications to Access, (b) in case of a
 204   // write, from writes to Buffer by the caller.
 205   //
 206   MemoryFence ();
 207
 208   //
 209   // Start the transfer.
 210   //
 211   AccessHigh = (UINT32)RShiftU64 ((UINTN)&Access, 32);
 212   AccessLow  = (UINT32)(UINTN)&Access;
 213   IoWrite32 (FW_CFG_IO_DMA_ADDRESS, SwapBytes32 (AccessHigh));
 214   IoWrite32 (FW_CFG_IO_DMA_ADDRESS + 4, SwapBytes32 (AccessLow));
 215
 216   //
 217   // Don't look at Access.Control before starting the transfer.
 218   //
 219   MemoryFence ();
 220
 221   //
 222   // Wait for the transfer to complete.
 223   //
 224   do {
 225     Status = SwapBytes32 (Access.Control);
 226     ASSERT ((Status & FW_CFG_DMA_CTL_ERROR) == 0);
 227   } while (Status != 0);
 228
 229   //
 230   // After a read, the caller will want to use Buffer.
 231   //
 232   MemoryFence ();
 233 }