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1 ## @file
2 # EFI/Framework Open Virtual Machine Firmware (OVMF) platform
3 #
4 # Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
5 #
6 # SPDX-License-Identifier: BSD-2-Clause-Patent
7 #
8 ##
9
10 [Defines]
11 DEC_SPECIFICATION = 0x00010005
12 PACKAGE_NAME = OvmfPkg
13 PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
14 PACKAGE_VERSION = 0.1
15
16 [Includes]
17 Include
18
19 [LibraryClasses]
20 ## @libraryclass Loads and boots a Linux kernel image
21 #
22 LoadLinuxLib|Include/Library/LoadLinuxLib.h
23
24 ## @libraryclass Save and restore variables using a file
25 #
26 NvVarsFileLib|Include/Library/NvVarsFileLib.h
27
28 ## @libraryclass Provides services to work with PCI capabilities in PCI
29 # config space.
30 PciCapLib|Include/Library/PciCapLib.h
31
32 ## @libraryclass Layered on top of PciCapLib, allows clients to plug an
33 # EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
34 # space access.
35 PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
36
37 ## @libraryclass Layered on top of PciCapLib, allows clients to plug a
38 # PciSegmentLib backend into PciCapLib, for config space
39 # access.
40 PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
41
42 ## @libraryclass Register a status code handler for printing the Boot
43 # Manager's LoadImage() and StartImage() preparations, and
44 # return codes, to the UEFI console.
45 PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
46
47 ## @libraryclass Access QEMU's firmware configuration interface
48 #
49 QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
50
51 ## @libraryclass S3 support for QEMU fw_cfg
52 #
53 QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
54
55 ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"
56 # fw_cfg file.
57 #
58 QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
59
60 ## @libraryclass Serialize (and deserialize) variables
61 #
62 SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
63
64 ## @libraryclass Invoke Xen hypercalls
65 #
66 XenHypercallLib|Include/Library/XenHypercallLib.h
67
68 ## @libraryclass Manage XenBus device path and I/O handles
69 #
70 XenIoMmioLib|Include/Library/XenIoMmioLib.h
71
72 [Guids]
73 gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
74 gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
75 gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
76 gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
77 gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}
78 gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
79 gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
80
81 [Protocols]
82 gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
83 gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
84 gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
85 gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
86
87 [PcdsFixedAtBuild]
88 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
89 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
90 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
91 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
92
93 ## This flag is used to control the destination port for PlatformDebugLibIoPort
94 gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
95
96 ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
97 # LUNs are retrieved from the host during virtio-scsi setup.
98 # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
99 # possible devices. This can take extremely long, for example with
100 # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
101 # MaxTarget and MaxLun, independently, should the host report higher values,
102 # so that scanning the number of devices given by their product is still
103 # acceptably fast.
104 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
105 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
106
107 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
108 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
109 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
110 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
111 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
112 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
113 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
114 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
115 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
116 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
117 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
118 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
119 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
120 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
121 gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
122 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
123
124 [PcdsDynamic, PcdsDynamicEx]
125 gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
126 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
127 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
128 gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
129
130 ## The IO port aperture shared by all PCI root bridges.
131 #
132 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
133 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
134
135 ## The 32-bit MMIO aperture shared by all PCI root bridges.
136 #
137 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
138 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
139
140 ## The 64-bit MMIO aperture shared by all PCI root bridges.
141 #
142 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
143 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
144
145 ## The following setting controls how many megabytes we configure as TSEG on
146 # Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
147 # cause undefined behavior. During boot, the PCD is updated by PlatformPei
148 # to reflect the extended TSEG size, if one is advertized by QEMU.
149 #
150 # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
151 gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
152
153 [PcdsFeatureFlag]
154 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
155 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
156
157 ## This feature flag enables SMM/SMRAM support. Note that it also requires
158 # such support from the underlying QEMU instance; if that support is not
159 # present, the firmware will reject continuing after a certain point.
160 #
161 # The flag also acts as a general "security switch"; when TRUE, many
162 # components will change behavior, with the goal of preventing a malicious
163 # runtime OS from tampering with firmware structures (special memory ranges
164 # used by OVMF, the varstore pflash chip, LockBox etc).
165 gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e