OvmfPkg/OvmfPkg.dec

   1 ## @file
   2 #  EFI/Framework Open Virtual Machine Firmware (OVMF) platform
   3 #
   4 #  Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>
   5 #  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
   6 #  Copyright (c) 2014, Pluribus Networks, Inc.
   7 #
   8 #  SPDX-License-Identifier: BSD-2-Clause-Patent
   9 #
  10 ##
  11
  12 [Defines]
  13   DEC_SPECIFICATION              = 0x00010005
  14   PACKAGE_NAME                   = OvmfPkg
  15   PACKAGE_GUID                   = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
  16   PACKAGE_VERSION                = 0.1
  17
  18 [Includes]
  19   Include
  20   Csm/Include
  21
  22 [LibraryClasses]
  23   ##  @libraryclass  Access bhyve's firmware control interface.
  24   BhyveFwCtlLib|Include/Library/BhyveFwCtlLib.h
  25
  26   ##  @libraryclass  Verify blobs read from the VMM
  27   BlobVerifierLib|Include/Library/BlobVerifierLib.h
  28
  29   ##  @libraryclass  Loads and boots a Linux kernel image
  30   #
  31   LoadLinuxLib|Include/Library/LoadLinuxLib.h
  32
  33   ##  @libraryclass  Declares helper functions for Secure Encrypted
  34   #                  Virtualization (SEV) guests.
  35   MemEncryptSevLib|Include/Library/MemEncryptSevLib.h
  36
  37   ##  @libraryclass  Save and restore variables using a file
  38   #
  39   NvVarsFileLib|Include/Library/NvVarsFileLib.h
  40
  41   ##  @libraryclass  Provides services to work with PCI capabilities in PCI
  42   #                  config space.
  43   PciCapLib|Include/Library/PciCapLib.h
  44
  45   ##  @libraryclass  Layered on top of PciCapLib, allows clients to plug an
  46   #                  EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
  47   #                  space access.
  48   PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
  49
  50   ##  @libraryclass  Layered on top of PciCapLib, allows clients to plug a
  51   #                  PciSegmentLib backend into PciCapLib, for config space
  52   #                  access.
  53   PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
  54
  55   ##  @libraryclass  Provide common utility functions to PciHostBridgeLib
  56   #                  instances in ArmVirtPkg and OvmfPkg.
  57   PciHostBridgeUtilityLib|Include/Library/PciHostBridgeUtilityLib.h
  58
  59   ##  @libraryclass  Register a status code handler for printing the Boot
  60   #                  Manager's LoadImage() and StartImage() preparations, and
  61   #                  return codes, to the UEFI console.
  62   PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
  63
  64   ##  @libraryclass  Customize FVB2 protocol member functions for a platform.
  65   PlatformFvbLib|Include/Library/PlatformFvbLib.h
  66
  67   ##  @libraryclass  Access QEMU's firmware configuration interface
  68   #
  69   QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
  70
  71   ##  @libraryclass  S3 support for QEMU fw_cfg
  72   #
  73   QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
  74
  75   ##  @libraryclass  Parse the contents of named fw_cfg files as simple
  76   #                  (scalar) data types.
  77   QemuFwCfgSimpleParserLib|Include/Library/QemuFwCfgSimpleParserLib.h
  78
  79   ##  @libraryclass  Rewrite the BootOrder NvVar based on QEMU's "bootorder"
  80   #                  fw_cfg file.
  81   #
  82   QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
  83
  84   ##  @libraryclass  Load a kernel image and command line passed to QEMU via
  85   #                  the command line
  86   #
  87   QemuLoadImageLib|Include/Library/QemuLoadImageLib.h
  88
  89   ##  @libraryclass  Serialize (and deserialize) variables
  90   #
  91   SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
  92
  93   ##  @libraryclass  Declares utility functions for virtio device drivers.
  94   VirtioLib|Include/Library/VirtioLib.h
  95
  96   ##  @libraryclass  Install Virtio Device Protocol instances on virtio-mmio
  97   #                  transports.
  98   VirtioMmioDeviceLib|Include/Library/VirtioMmioDeviceLib.h
  99
 100   ##  @libraryclass  Invoke Xen hypercalls
 101   #
 102   XenHypercallLib|Include/Library/XenHypercallLib.h
 103
 104   ##  @libraryclass  Manage XenBus device path and I/O handles
 105   #
 106   XenIoMmioLib|Include/Library/XenIoMmioLib.h
 107
 108   ##  @libraryclass  Get information about Xen
 109   #
 110   XenPlatformLib|Include/Library/XenPlatformLib.h
 111
 112 [Guids]
 113   gUefiOvmfPkgTokenSpaceGuid            = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
 114   gEfiXenInfoGuid                       = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
 115   gOvmfPkKek1AppPrefixGuid              = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}
 116   gOvmfPlatformConfigGuid               = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
 117   gVirtioMmioTransportGuid              = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
 118   gQemuRamfbGuid                        = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}
 119   gXenBusRootDeviceGuid                 = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
 120   gRootBridgesConnectedEventGroupGuid   = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
 121   gMicrosoftVendorGuid                  = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}
 122   gEfiLegacyBiosGuid                    = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}
 123   gEfiLegacyDevOrderVariableGuid        = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}
 124   gQemuKernelLoaderFsMediaGuid          = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}
 125   gGrubFileGuid                         = {0xb5ae312c, 0xbc8a, 0x43b1, {0x9c, 0x62, 0xeb, 0xb8, 0x26, 0xdd, 0x5d, 0x07}}
 126   gConfidentialComputingSecretGuid      = {0xadf956ad, 0xe98c, 0x484c, {0xae, 0x11, 0xb5, 0x1c, 0x7d, 0x33, 0x64, 0x47}}
 127
 128 [Ppis]
 129   # PPI whose presence in the PPI database signals that the TPM base address
 130   # has been discovered and recorded
 131   gOvmfTpmDiscoveredPpiGuid             = {0xb9a61ad0, 0x2802, 0x41f3, {0xb5, 0x13, 0x96, 0x51, 0xce, 0x6b, 0xd5, 0x75}}
 132
 133   # This PPI signals that accessing the MMIO range of the TPM is possible in
 134   # the PEI phase, regardless of memory encryption
 135   gOvmfTpmMmioAccessiblePpiGuid         = {0x35c84ff2, 0x7bfe, 0x453d, {0x84, 0x5f, 0x68, 0x3a, 0x49, 0x2c, 0xf7, 0xb7}}
 136
 137 [Protocols]
 138   gVirtioDeviceProtocolGuid             = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
 139   gXenBusProtocolGuid                   = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
 140   gXenIoProtocolGuid                    = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
 141   gIoMmuAbsentProtocolGuid              = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
 142   gEfiLegacy8259ProtocolGuid            = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}
 143   gEfiFirmwareVolumeProtocolGuid        = {0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8}}
 144   gEfiIsaAcpiProtocolGuid               = {0x64a892dc, 0x5561, 0x4536, {0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55}}
 145   gEfiIsaIoProtocolGuid                 = {0x7ee2bd44, 0x3da0, 0x11d4, {0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
 146   gEfiLegacyBiosProtocolGuid            = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}
 147   gEfiLegacyBiosPlatformProtocolGuid    = {0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4}}
 148   gEfiLegacyInterruptProtocolGuid       = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}
 149   gEfiVgaMiniPortProtocolGuid           = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}
 150   gOvmfLoadedX86LinuxKernelProtocolGuid = {0xa3edc05d, 0xb618, 0x4ff6, {0x95, 0x52, 0x76, 0xd7, 0x88, 0x63, 0x43, 0xc8}}
 151
 152 [PcdsFixedAtBuild]
 153   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
 154   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
 155   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
 156   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
 157
 158   ## This flag is used to control the destination port for PlatformDebugLibIoPort
 159   gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
 160
 161   ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
 162   #  LUNs are retrieved from the host during virtio-scsi setup.
 163   #  MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
 164   #  possible devices. This can take extremely long, for example with
 165   #  MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
 166   #  MaxTarget and MaxLun, independently, should the host report higher values,
 167   #  so that scanning the number of devices given by their product is still
 168   #  acceptably fast.
 169   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
 170   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
 171
 172   ## Sets the *inclusive* number of targets and LUNs that PvScsi exposes for
 173   #  scan by ScsiBusDxe.
 174   #  As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * MaxLun
 175   #  possible devices, which can take extremely long. Thus, the below constants
 176   #  are used so that scanning the number of devices given by their product
 177   #  is still acceptably fast.
 178   gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x36
 179   gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x37
 180
 181   ## After PvScsiDxe sends a SCSI request to the device, it waits for
 182   #  the request completion in a polling loop.
 183   #  This constant defines how many micro-seconds to wait between each
 184   #  polling loop iteration.
 185   gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs|5|UINT32|0x38
 186
 187   ## Set the *inclusive* number of targets that MptScsi exposes for scan
 188   #  by ScsiBusDxe.
 189   gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiMaxTargetLimit|7|UINT8|0x39
 190
 191   ## Microseconds to stall between polling for MptScsi request result
 192   gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiStallPerPollUsec|5|UINT32|0x3a
 193
 194   ## Set the *inclusive* number of targets and LUNs that LsiScsi exposes for
 195   #  scan by ScsiBusDxe.
 196   gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxTargetLimit|7|UINT8|0x3b
 197   gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxLunLimit|0|UINT8|0x3c
 198
 199   ## Microseconds to stall between polling for LsiScsi request result
 200   gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiStallPerPollUsec|5|UINT32|0x3d
 201
 202   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
 203   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
 204   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
 205   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
 206   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
 207   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
 208   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
 209   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
 210   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
 211   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
 212   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
 213   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
 214   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
 215   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
 216   gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
 217   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
 218
 219   ## Pcd8259LegacyModeMask defines the default mask value for platform. This
 220   #  value is determined.
 221   #  1) If platform only support pure UEFI, value should be set to 0xFFFF or
 222   #     0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
 223   #     UEFI platform.
 224   #  2) If platform install CSM and use thunk module:
 225   #     a) If thunk call provided by CSM binary requires some legacy interrupt
 226   #        support, the corresponding bit should be opened as 0.
 227   #        For example, if keyboard interfaces provided CSM binary use legacy
 228   #        keyboard interrupt in 8259 bit 1, then the value should be set to
 229   #        0xFFFC.
 230   #     b) If all thunk call provied by CSM binary do not require legacy
 231   #        interrupt support, value should be set to 0xFFFF or 0xFFFE.
 232   #
 233   #  The default value of legacy mode mask could be changed by
 234   #  EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
 235   #  except some special cases such as when initializing the CSM binary, it
 236   #  should be set to 0xFFFF to mask all legacy interrupt. Please restore the
 237   #  original legacy mask value if changing is made for these special case.
 238   gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
 239
 240   ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
 241   #  mode's interrrupt controller.
 242   #  For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
 243   gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
 244
 245   ## Indicates if BiosVideo driver will switch to 80x25 Text VGA Mode when
 246   #  exiting boot service.
 247   #   TRUE  - Switch to Text VGA Mode.
 248   #   FALSE - Does not switch to Text VGA Mode.
 249   gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoSetTextVgaModeEnable|FALSE|BOOLEAN|0x28
 250
 251   ## Indicates if BiosVideo driver will check for VESA BIOS Extension service
 252   #  support.
 253   #   TRUE  - Check for VESA BIOS Extension service.
 254   #   FALSE - Does not check for VESA BIOS Extension service.
 255   gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE|BOOLEAN|0x29
 256
 257   ## Indicates if BiosVideo driver will check for VGA service support.
 258   #  NOTE: If both PcdBiosVideoCheckVbeEnable and PcdBiosVideoCheckVgaEnable
 259   #  are set to FALSE, that means Graphics Output protocol will not be
 260   #  installed, the VGA miniport protocol will be installed instead.
 261   #   TRUE  - Check for VGA service.<BR>
 262   #   FALSE - Does not check for VGA service.<BR>
 263   gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE|BOOLEAN|0x2a
 264
 265   ## Indicates if memory space for legacy region will be set as cacheable.
 266   #   TRUE  - Set cachebility for legacy region.
 267   #   FALSE - Does not set cachebility for legacy region.
 268   gUefiOvmfPkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|TRUE|BOOLEAN|0x2b
 269
 270   ## Specify memory size with bytes to reserve EBDA below 640K for OPROM.
 271   #  The value should be a multiple of 4KB.
 272   gUefiOvmfPkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x2c
 273
 274   ## Specify memory base address for OPROM to find free memory.
 275   #  Some OPROMs do not use EBDA or PMM to allocate memory for its usage,
 276   #  instead they find the memory filled with zero from 0x20000.
 277   #  The value should be a multiple of 4KB.
 278   #  The range should be below the EBDA reserved range from
 279   #  (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
 280   #  CONVENTIONAL_MEMORY_TOP.
 281   gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x2d
 282
 283   ## Specify memory size with bytes for OPROM to find free memory.
 284   #  The value should be a multiple of 4KB. And the range should be below the
 285   #  EBDA reserved range from
 286   #  (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
 287   #  CONVENTIONAL_MEMORY_TOP.
 288   gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x2e
 289
 290   ## Specify the end of address below 1MB for the OPROM.
 291   #  The last shadowed OpROM should not exceed this address.
 292   gUefiOvmfPkgTokenSpaceGuid.PcdEndOpromShadowAddress|0xdffff|UINT32|0x2f
 293
 294   ## Specify the low PMM (Post Memory Manager) size with bytes below 1MB.
 295   #  The value should be a multiple of 4KB.
 296   # @Prompt Low PMM (Post Memory Manager) Size
 297   gUefiOvmfPkgTokenSpaceGuid.PcdLowPmmMemorySize|0x10000|UINT32|0x30
 298
 299   ## Specify the high PMM (Post Memory Manager) size with bytes above 1MB.
 300   #  The value should be a multiple of 4KB.
 301   gUefiOvmfPkgTokenSpaceGuid.PcdHighPmmMemorySize|0x400000|UINT32|0x31
 302
 303   gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|0x0|UINT32|0x17
 304   gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize|0x0|UINT32|0x32
 305
 306   ## Number of page frames to use for storing grant table entries.
 307   gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT32|0x33
 308
 309   ## Specify the extra page table needed to mark the GHCB as unencrypted.
 310   #  The value should be a multiple of 4KB for each.
 311   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|0x0|UINT32|0x3e
 312   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize|0x0|UINT32|0x3f
 313
 314   ## The base address of the SEC GHCB page used by SEV-ES.
 315   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|0|UINT32|0x40
 316   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize|0|UINT32|0x41
 317   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|0|UINT32|0x44
 318   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize|0|UINT32|0x45
 319
 320   ## The base address and size of the SEV Launch Secret Area provisioned
 321   #  after remote attestation.  If this is set in the .fdf, the platform
 322   #  is responsible for protecting the area from DXE phase overwrites.
 323   gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|0x0|UINT32|0x42
 324   gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize|0x0|UINT32|0x43
 325
 326   ## The base address and size of a hash table confirming allowed
 327   #  parameters to be passed in via the Qemu firmware configuration
 328   #  device
 329   gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|0x0|UINT32|0x47
 330   gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize|0x0|UINT32|0x48
 331
 332 [PcdsDynamic, PcdsDynamicEx]
 333   gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
 334   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
 335   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
 336   gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
 337
 338   ## The IO port aperture shared by all PCI root bridges.
 339   #
 340   gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
 341   gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
 342
 343   ## The 32-bit MMIO aperture shared by all PCI root bridges.
 344   #
 345   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
 346   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
 347
 348   ## The 64-bit MMIO aperture shared by all PCI root bridges.
 349   #
 350   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
 351   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
 352
 353   ## The following setting controls how many megabytes we configure as TSEG on
 354   #  Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
 355   #  cause undefined behavior. During boot, the PCD is updated by PlatformPei
 356   #  to reflect the extended TSEG size, if one is advertized by QEMU.
 357   #
 358   #  This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
 359   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
 360
 361   ## Set to TRUE by PlatformPei if the Q35 board supports the "SMRAM at default
 362   #  SMBASE" feature.
 363   #
 364   #  This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
 365   gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE|BOOLEAN|0x34
 366
 367   ## This PCD adds a communication channel between OVMF's SmmCpuFeaturesLib
 368   #  instance in PiSmmCpuDxeSmm, and CpuHotplugSmm.
 369   gUefiOvmfPkgTokenSpaceGuid.PcdCpuHotEjectDataAddress|0|UINT64|0x46
 370
 371 [PcdsFeatureFlag]
 372   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
 373   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
 374
 375   ## This feature flag enables SMM/SMRAM support. Note that it also requires
 376   #  such support from the underlying QEMU instance; if that support is not
 377   #  present, the firmware will reject continuing after a certain point.
 378   #
 379   #  The flag also acts as a general "security switch"; when TRUE, many
 380   #  components will change behavior, with the goal of preventing a malicious
 381   #  runtime OS from tampering with firmware structures (special memory ranges
 382   #  used by OVMF, the varstore pflash chip, LockBox etc).
 383   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e
 384
 385   ## Informs modules (including pre-DXE-phase modules) whether the platform
 386   #  firmware contains a CSM (Compatibility Support Module).
 387   #
 388   gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|FALSE|BOOLEAN|0x35