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OvmfPkg: fix DEC spec violation introduced by Bhyve addition
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1 ## @file
2 # EFI/Framework Open Virtual Machine Firmware (OVMF) platform
3 #
4 # Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>
5 # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
6 # Copyright (c) 2014, Pluribus Networks, Inc.
7 #
8 # SPDX-License-Identifier: BSD-2-Clause-Patent
9 #
10 ##
11
12 [Defines]
13 DEC_SPECIFICATION = 0x00010005
14 PACKAGE_NAME = OvmfPkg
15 PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
16 PACKAGE_VERSION = 0.1
17
18 [Includes]
19 Include
20 Csm/Include
21
22 [LibraryClasses]
23 ## @libraryclass Access bhyve's firmware control interface.
24 BhyveFwCtlLib|Include/Library/BhyveFwCtlLib.h
25
26 ## @libraryclass Loads and boots a Linux kernel image
27 #
28 LoadLinuxLib|Include/Library/LoadLinuxLib.h
29
30 ## @libraryclass Declares helper functions for Secure Encrypted
31 # Virtualization (SEV) guests.
32 MemEncryptSevLib|Include/Library/MemEncryptSevLib.h
33
34 ## @libraryclass Save and restore variables using a file
35 #
36 NvVarsFileLib|Include/Library/NvVarsFileLib.h
37
38 ## @libraryclass Provides services to work with PCI capabilities in PCI
39 # config space.
40 PciCapLib|Include/Library/PciCapLib.h
41
42 ## @libraryclass Layered on top of PciCapLib, allows clients to plug an
43 # EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
44 # space access.
45 PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
46
47 ## @libraryclass Layered on top of PciCapLib, allows clients to plug a
48 # PciSegmentLib backend into PciCapLib, for config space
49 # access.
50 PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
51
52 ## @libraryclass Register a status code handler for printing the Boot
53 # Manager's LoadImage() and StartImage() preparations, and
54 # return codes, to the UEFI console.
55 PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
56
57 ## @libraryclass Customize FVB2 protocol member functions for a platform.
58 PlatformFvbLib|Include/Library/PlatformFvbLib.h
59
60 ## @libraryclass Access QEMU's firmware configuration interface
61 #
62 QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
63
64 ## @libraryclass S3 support for QEMU fw_cfg
65 #
66 QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
67
68 ## @libraryclass Parse the contents of named fw_cfg files as simple
69 # (scalar) data types.
70 QemuFwCfgSimpleParserLib|Include/Library/QemuFwCfgSimpleParserLib.h
71
72 ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"
73 # fw_cfg file.
74 #
75 QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
76
77 ## @libraryclass Load a kernel image and command line passed to QEMU via
78 # the command line
79 #
80 QemuLoadImageLib|Include/Library/QemuLoadImageLib.h
81
82 ## @libraryclass Serialize (and deserialize) variables
83 #
84 SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
85
86 ## @libraryclass Declares utility functions for virtio device drivers.
87 VirtioLib|Include/Library/VirtioLib.h
88
89 ## @libraryclass Install Virtio Device Protocol instances on virtio-mmio
90 # transports.
91 VirtioMmioDeviceLib|Include/Library/VirtioMmioDeviceLib.h
92
93 ## @libraryclass Invoke Xen hypercalls
94 #
95 XenHypercallLib|Include/Library/XenHypercallLib.h
96
97 ## @libraryclass Manage XenBus device path and I/O handles
98 #
99 XenIoMmioLib|Include/Library/XenIoMmioLib.h
100
101 ## @libraryclass Get information about Xen
102 #
103 XenPlatformLib|Include/Library/XenPlatformLib.h
104
105 [Guids]
106 gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
107 gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
108 gOvmfPkKek1AppPrefixGuid = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}
109 gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
110 gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
111 gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}
112 gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
113 gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
114 gMicrosoftVendorGuid = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}
115 gEfiLegacyBiosGuid = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}
116 gEfiLegacyDevOrderVariableGuid = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}
117 gLinuxEfiInitrdMediaGuid = {0x5568e427, 0x68fc, 0x4f3d, {0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68}}
118 gQemuKernelLoaderFsMediaGuid = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}
119
120 [Ppis]
121 # PPI whose presence in the PPI database signals that the TPM base address
122 # has been discovered and recorded
123 gOvmfTpmDiscoveredPpiGuid = {0xb9a61ad0, 0x2802, 0x41f3, {0xb5, 0x13, 0x96, 0x51, 0xce, 0x6b, 0xd5, 0x75}}
124
125 [Protocols]
126 gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
127 gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
128 gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
129 gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
130 gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}
131 gEfiFirmwareVolumeProtocolGuid = {0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8}}
132 gEfiIsaAcpiProtocolGuid = {0x64a892dc, 0x5561, 0x4536, {0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55}}
133 gEfiIsaIoProtocolGuid = {0x7ee2bd44, 0x3da0, 0x11d4, {0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
134 gEfiLegacyBiosProtocolGuid = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}
135 gEfiLegacyBiosPlatformProtocolGuid = {0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4}}
136 gEfiLegacyInterruptProtocolGuid = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}
137 gEfiVgaMiniPortProtocolGuid = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}
138 gOvmfLoadedX86LinuxKernelProtocolGuid = {0xa3edc05d, 0xb618, 0x4ff6, {0x95, 0x52, 0x76, 0xd7, 0x88, 0x63, 0x43, 0xc8}}
139
140 [PcdsFixedAtBuild]
141 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
142 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
143 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
144 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
145
146 ## This flag is used to control the destination port for PlatformDebugLibIoPort
147 gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
148
149 ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
150 # LUNs are retrieved from the host during virtio-scsi setup.
151 # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
152 # possible devices. This can take extremely long, for example with
153 # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
154 # MaxTarget and MaxLun, independently, should the host report higher values,
155 # so that scanning the number of devices given by their product is still
156 # acceptably fast.
157 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
158 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
159
160 ## Sets the *inclusive* number of targets and LUNs that PvScsi exposes for
161 # scan by ScsiBusDxe.
162 # As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * MaxLun
163 # possible devices, which can take extremely long. Thus, the below constants
164 # are used so that scanning the number of devices given by their product
165 # is still acceptably fast.
166 gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x36
167 gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x37
168
169 ## After PvScsiDxe sends a SCSI request to the device, it waits for
170 # the request completion in a polling loop.
171 # This constant defines how many micro-seconds to wait between each
172 # polling loop iteration.
173 gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs|5|UINT32|0x38
174
175 ## Set the *inclusive* number of targets that MptScsi exposes for scan
176 # by ScsiBusDxe.
177 gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiMaxTargetLimit|7|UINT8|0x39
178
179 ## Microseconds to stall between polling for MptScsi request result
180 gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiStallPerPollUsec|5|UINT32|0x3a
181
182 ## Set the *inclusive* number of targets and LUNs that LsiScsi exposes for
183 # scan by ScsiBusDxe.
184 gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxTargetLimit|7|UINT8|0x3b
185 gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxLunLimit|0|UINT8|0x3c
186
187 ## Microseconds to stall between polling for LsiScsi request result
188 gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiStallPerPollUsec|5|UINT32|0x3d
189
190 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
191 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
192 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
193 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
194 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
195 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
196 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
197 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
198 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
199 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
200 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
201 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
202 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
203 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
204 gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
205 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
206
207 ## Pcd8259LegacyModeMask defines the default mask value for platform. This
208 # value is determined.
209 # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
210 # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
211 # UEFI platform.
212 # 2) If platform install CSM and use thunk module:
213 # a) If thunk call provided by CSM binary requires some legacy interrupt
214 # support, the corresponding bit should be opened as 0.
215 # For example, if keyboard interfaces provided CSM binary use legacy
216 # keyboard interrupt in 8259 bit 1, then the value should be set to
217 # 0xFFFC.
218 # b) If all thunk call provied by CSM binary do not require legacy
219 # interrupt support, value should be set to 0xFFFF or 0xFFFE.
220 #
221 # The default value of legacy mode mask could be changed by
222 # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
223 # except some special cases such as when initializing the CSM binary, it
224 # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
225 # original legacy mask value if changing is made for these special case.
226 gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
227
228 ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
229 # mode's interrrupt controller.
230 # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
231 gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
232
233 ## Indicates if BiosVideo driver will switch to 80x25 Text VGA Mode when
234 # exiting boot service.
235 # TRUE - Switch to Text VGA Mode.
236 # FALSE - Does not switch to Text VGA Mode.
237 gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoSetTextVgaModeEnable|FALSE|BOOLEAN|0x28
238
239 ## Indicates if BiosVideo driver will check for VESA BIOS Extension service
240 # support.
241 # TRUE - Check for VESA BIOS Extension service.
242 # FALSE - Does not check for VESA BIOS Extension service.
243 gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE|BOOLEAN|0x29
244
245 ## Indicates if BiosVideo driver will check for VGA service support.
246 # NOTE: If both PcdBiosVideoCheckVbeEnable and PcdBiosVideoCheckVgaEnable
247 # are set to FALSE, that means Graphics Output protocol will not be
248 # installed, the VGA miniport protocol will be installed instead.
249 # TRUE - Check for VGA service.<BR>
250 # FALSE - Does not check for VGA service.<BR>
251 gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE|BOOLEAN|0x2a
252
253 ## Indicates if memory space for legacy region will be set as cacheable.
254 # TRUE - Set cachebility for legacy region.
255 # FALSE - Does not set cachebility for legacy region.
256 gUefiOvmfPkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|TRUE|BOOLEAN|0x2b
257
258 ## Specify memory size with bytes to reserve EBDA below 640K for OPROM.
259 # The value should be a multiple of 4KB.
260 gUefiOvmfPkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x2c
261
262 ## Specify memory base address for OPROM to find free memory.
263 # Some OPROMs do not use EBDA or PMM to allocate memory for its usage,
264 # instead they find the memory filled with zero from 0x20000.
265 # The value should be a multiple of 4KB.
266 # The range should be below the EBDA reserved range from
267 # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
268 # CONVENTIONAL_MEMORY_TOP.
269 gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x2d
270
271 ## Specify memory size with bytes for OPROM to find free memory.
272 # The value should be a multiple of 4KB. And the range should be below the
273 # EBDA reserved range from
274 # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
275 # CONVENTIONAL_MEMORY_TOP.
276 gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x2e
277
278 ## Specify the end of address below 1MB for the OPROM.
279 # The last shadowed OpROM should not exceed this address.
280 gUefiOvmfPkgTokenSpaceGuid.PcdEndOpromShadowAddress|0xdffff|UINT32|0x2f
281
282 ## Specify the low PMM (Post Memory Manager) size with bytes below 1MB.
283 # The value should be a multiple of 4KB.
284 # @Prompt Low PMM (Post Memory Manager) Size
285 gUefiOvmfPkgTokenSpaceGuid.PcdLowPmmMemorySize|0x10000|UINT32|0x30
286
287 ## Specify the high PMM (Post Memory Manager) size with bytes above 1MB.
288 # The value should be a multiple of 4KB.
289 gUefiOvmfPkgTokenSpaceGuid.PcdHighPmmMemorySize|0x400000|UINT32|0x31
290
291 gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|0x0|UINT32|0x17
292 gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize|0x0|UINT32|0x32
293
294 ## Number of page frames to use for storing grant table entries.
295 gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT32|0x33
296
297 [PcdsDynamic, PcdsDynamicEx]
298 gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
299 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
300 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
301 gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
302
303 ## The IO port aperture shared by all PCI root bridges.
304 #
305 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
306 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
307
308 ## The 32-bit MMIO aperture shared by all PCI root bridges.
309 #
310 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
311 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
312
313 ## The 64-bit MMIO aperture shared by all PCI root bridges.
314 #
315 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
316 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
317
318 ## The following setting controls how many megabytes we configure as TSEG on
319 # Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
320 # cause undefined behavior. During boot, the PCD is updated by PlatformPei
321 # to reflect the extended TSEG size, if one is advertized by QEMU.
322 #
323 # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
324 gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
325
326 ## Set to TRUE by PlatformPei if the Q35 board supports the "SMRAM at default
327 # SMBASE" feature.
328 #
329 # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
330 gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE|BOOLEAN|0x34
331
332 [PcdsFeatureFlag]
333 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
334 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
335
336 ## This feature flag enables SMM/SMRAM support. Note that it also requires
337 # such support from the underlying QEMU instance; if that support is not
338 # present, the firmware will reject continuing after a certain point.
339 #
340 # The flag also acts as a general "security switch"; when TRUE, many
341 # components will change behavior, with the goal of preventing a malicious
342 # runtime OS from tampering with firmware structures (special memory ranges
343 # used by OVMF, the varstore pflash chip, LockBox etc).
344 gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e
345
346 ## Informs modules (including pre-DXE-phase modules) whether the platform
347 # firmware contains a CSM (Compatibility Support Module).
348 #
349 gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|FALSE|BOOLEAN|0x35