OvmfPkg/OvmfPkg.fdf

   1 ## @file
   2 #  Open Virtual Machine Firmware: FDF
   3 #
   4 #  Copyright (c) 2006 - 2010, Intel Corporation
   5 #
   6 #  All rights reserved. This program and the accompanying materials
   7 #  are licensed and made available under the terms and conditions of the BSD License
   8 #  which accompanies this distribution. The full text of the license may be found at
   9 #  http://opensource.org/licenses/bsd-license.php
  10 #
  11 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 #
  14 ##
  15
  16 ################################################################################
  17 [FD.SEC]
  18 BaseAddress   = 0xFFFEE000
  19 Size          = 0x00012000
  20 ErasePolarity = 1
  21 BlockSize     = 0x1000
  22 NumBlocks     = 0x12
  23
  24 0x0|0x12000
  25 FV = SECFV
  26
  27 ################################################################################
  28
  29 [FD.MEMFD]
  30 BaseAddress   = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase
  31 Size          = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize
  32 ErasePolarity = 1
  33 BlockSize     = 0x10000
  34 NumBlocks     = 0x40
  35
  36 0x0|0x400000
  37 FV = MAINFV
  38
  39 ################################################################################
  40
  41 [FV.SECFV]
  42 BlockSize          = 0x1000
  43 FvAlignment        = 16
  44 ERASE_POLARITY     = 1
  45 MEMORY_MAPPED      = TRUE
  46 STICKY_WRITE       = TRUE
  47 LOCK_CAP           = TRUE
  48 LOCK_STATUS        = TRUE
  49 WRITE_DISABLED_CAP = TRUE
  50 WRITE_ENABLED_CAP  = TRUE
  51 WRITE_STATUS       = TRUE
  52 WRITE_LOCK_CAP     = TRUE
  53 WRITE_LOCK_STATUS  = TRUE
  54 READ_DISABLED_CAP  = TRUE
  55 READ_ENABLED_CAP   = TRUE
  56 READ_STATUS        = TRUE
  57 READ_LOCK_CAP      = TRUE
  58 READ_LOCK_STATUS   = TRUE
  59
  60 #
  61 # SEC Phase modules
  62 #
  63 # The code in this FV handles the initial firmware startup, and
  64 # decompresses the MAINFV which handles the majority of the boot sequence.
  65 #
  66 INF  OvmfPkg/Sec/SecMain.inf
  67
  68 INF  RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
  69
  70 ################################################################################
  71 [FV.MAINFV]
  72 BlockSize          = 0x10000
  73 FvAlignment        = 16
  74 ERASE_POLARITY     = 1
  75 MEMORY_MAPPED      = TRUE
  76 STICKY_WRITE       = TRUE
  77 LOCK_CAP           = TRUE
  78 LOCK_STATUS        = TRUE
  79 WRITE_DISABLED_CAP = TRUE
  80 WRITE_ENABLED_CAP  = TRUE
  81 WRITE_STATUS       = TRUE
  82 WRITE_LOCK_CAP     = TRUE
  83 WRITE_LOCK_STATUS  = TRUE
  84 READ_DISABLED_CAP  = TRUE
  85 READ_ENABLED_CAP   = TRUE
  86 READ_STATUS        = TRUE
  87 READ_LOCK_CAP      = TRUE
  88 READ_LOCK_STATUS   = TRUE
  89
  90 #
  91 # Files to be placed in MAIN FV
  92 #
  93 # This firmware volume will have files placed in it uncompressed,
  94 # and then then entire firmware volume will be compressed in a
  95 # single compression operation in order to achieve better
  96 # overall compression.
  97 #
  98
  99 APRIORI PEI {
 100   INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 101 }
 102
 103 #
 104 #  PEI Phase modules
 105 #
 106 INF  MdeModulePkg/Core/Pei/PeiMain.inf
 107 INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 108 INF  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
 109 INF  OvmfPkg/PlatformPei/PlatformPei.inf
 110 INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 111
 112 FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {
 113   SECTION COMPRESS PI_NONE {
 114     SECTION FV_IMAGE = DXEFV
 115   }
 116 }
 117
 118 ################################################################################
 119
 120 [FV.DXEFV]
 121 BlockSize          = 0x10000
 122 FvAlignment        = 16
 123 ERASE_POLARITY     = 1
 124 MEMORY_MAPPED      = TRUE
 125 STICKY_WRITE       = TRUE
 126 LOCK_CAP           = TRUE
 127 LOCK_STATUS        = TRUE
 128 WRITE_DISABLED_CAP = TRUE
 129 WRITE_ENABLED_CAP  = TRUE
 130 WRITE_STATUS       = TRUE
 131 WRITE_LOCK_CAP     = TRUE
 132 WRITE_LOCK_STATUS  = TRUE
 133 READ_DISABLED_CAP  = TRUE
 134 READ_ENABLED_CAP   = TRUE
 135 READ_STATUS        = TRUE
 136 READ_LOCK_CAP      = TRUE
 137 READ_LOCK_STATUS   = TRUE
 138
 139 APRIORI DXE {
 140   INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 141   INF  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
 142 }
 143
 144 #
 145 # DXE Phase modules
 146 #
 147 INF  MdeModulePkg/Core/Dxe/DxeMain.inf
 148
 149 INF  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
 150 INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 151
 152 INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 153 INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 154 INF  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
 155 INF  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
 156 INF  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 157 INF  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
 158 INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
 159 INF  UefiCpuPkg/CpuDxe/CpuDxe.inf
 160 INF  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
 161 INF  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
 162 INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 163 INF  PcAtChipsetPkg/KbcResetDxe/Reset.inf
 164 INF  MdeModulePkg/Universal/Metronome/Metronome.inf
 165 INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
 166
 167 INF  OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf
 168 INF  OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf
 169 INF  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
 170 INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
 171 INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 172 INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 173 INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
 174 INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
 175 INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
 176 INF  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
 177 INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 178 INF  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
 179 INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 180 INF  MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
 181 INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
 182 INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
 183 INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 184 INF  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
 185 INF  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
 186 INF  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
 187 INF  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf
 188 INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 189 INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 190
 191 INF  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
 192 INF  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
 193 INF  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
 194 INF  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
 195 INF  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf
 196
 197 INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
 198 INF  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
 199 INF  RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf
 200
 201 INF  RuleOverride=BINARY FatBinPkg/EnhancedFatDxe/Fat.inf
 202
 203 INF  RuleOverride=BINARY EdkShellBinPkg/FullShell/FullShell.inf
 204
 205 FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
 206     SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress
 207       SECTION RAW = MdeModulePkg/Logo/Logo.bmp
 208     }
 209   }
 210
 211 ################################################################################
 212
 213 [FV.OVMF]
 214 BlockSize          = 0x10000
 215 FvAlignment        = 16
 216 ERASE_POLARITY     = 1
 217 MEMORY_MAPPED      = TRUE
 218 STICKY_WRITE       = TRUE
 219 LOCK_CAP           = TRUE
 220 LOCK_STATUS        = TRUE
 221 WRITE_DISABLED_CAP = TRUE
 222 WRITE_ENABLED_CAP  = TRUE
 223 WRITE_STATUS       = TRUE
 224 WRITE_LOCK_CAP     = TRUE
 225 WRITE_LOCK_STATUS  = TRUE
 226 READ_DISABLED_CAP  = TRUE
 227 READ_ENABLED_CAP   = TRUE
 228 READ_STATUS        = TRUE
 229 READ_LOCK_CAP      = TRUE
 230 READ_LOCK_STATUS   = TRUE
 231
 232 #
 233 # This file contains the compressed MAINFV, which is compressed
 234 # in a single compression operation in order to achieve better
 235 # overall compression.
 236 #
 237 FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 {
 238    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress
 239       SECTION FV_IMAGE = MAINFV
 240    }
 241  }
 242
 243 #
 244 # This file contains the uncompressed SECFV, which contains the initial
 245 # boot code.  The code in this FV decompresses the MAINFV.
 246 #
 247 # It uses the Volume Top File (VTF) GUID so it will be placed at the
 248 # end of the FV.
 249 #
 250 FILE FREEFORM = 1BA0062E-C779-4582-8566-336AE8F78F09 {
 251   SECTION Align=16 FV_IMAGE = SECFV
 252 }
 253
 254 ################################################################################
 255
 256 [Rule.Common.PEI_CORE]
 257   FILE PEI_CORE = $(NAMED_GUID) {
 258     PE32     PE32   Align=32    $(INF_OUTPUT)/$(MODULE_NAME).efi
 259     UI       STRING ="$(MODULE_NAME)" Optional
 260     VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 261   }
 262
 263 [Rule.Common.SEC]
 264   FILE SEC = $(NAMED_GUID) {
 265     PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 266     UI       STRING ="$(MODULE_NAME)" Optional
 267     VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 268   }
 269
 270 [Rule.Common.PEIM.NORELOC]
 271   FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED  {
 272      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 273      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
 274      UI        STRING="$(MODULE_NAME)" Optional
 275      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 276   }
 277
 278 [Rule.Common.PEIM]
 279   FILE PEIM = $(NAMED_GUID) {
 280      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 281      PE32      PE32   Align=32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 282      UI       STRING="$(MODULE_NAME)" Optional
 283      VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 284   }
 285
 286 [Rule.Common.PEIM.TIANOCOMPRESSED]
 287   FILE PEIM = $(NAMED_GUID) {
 288     PEI_DEPEX PEI_DEPEX Optional         $(INF_OUTPUT)/$(MODULE_NAME).depex
 289     GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
 290       PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 291       UI        STRING="$(MODULE_NAME)" Optional
 292       VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 293     }
 294   }
 295
 296 [Rule.Common.DXE_CORE]
 297   FILE DXE_CORE = $(NAMED_GUID) {
 298     PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 299     UI       STRING="$(MODULE_NAME)" Optional
 300     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 301   }
 302
 303 [Rule.Common.UEFI_DRIVER]
 304   FILE DRIVER = $(NAMED_GUID) {
 305     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 306     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 307     UI       STRING="$(MODULE_NAME)" Optional
 308     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 309   }
 310
 311 [Rule.Common.DXE_DRIVER]
 312   FILE DRIVER = $(NAMED_GUID) {
 313     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 314     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 315     UI       STRING="$(MODULE_NAME)" Optional
 316     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 317   }
 318
 319 [Rule.Common.DXE_RUNTIME_DRIVER]
 320   FILE DRIVER = $(NAMED_GUID) {
 321     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 322     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 323     UI       STRING="$(MODULE_NAME)" Optional
 324     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 325   }
 326
 327 [Rule.Common.UEFI_APPLICATION]
 328   FILE APPLICATION = $(NAMED_GUID) {
 329     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 330     UI       STRING="$(MODULE_NAME)" Optional
 331     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 332   }
 333
 334 [Rule.Common.UEFI_DRIVER.BINARY]
 335   FILE DRIVER = $(NAMED_GUID) {
 336     DXE_DEPEX    DXE_DEPEX Optional      |.depex
 337     PE32     PE32                        |.efi
 338     UI       STRING="$(MODULE_NAME)" Optional
 339     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 340   }
 341
 342 [Rule.Common.UEFI_APPLICATION.BINARY]
 343   FILE APPLICATION = $(NAMED_GUID) {
 344     PE32     PE32                    |.efi
 345     UI       STRING="$(MODULE_NAME)" Optional
 346     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 347   }
 348
 349 [Rule.Common.USER_DEFINED.ACPITABLE]
 350   FILE FREEFORM = $(NAMED_GUID) {
 351     RAW ACPI               |.acpi
 352     RAW ASL                |.aml
 353   }
 354
 355 [Rule.Common.SEC.RESET_VECTOR]
 356   FILE RAW = $(NAMED_GUID) {
 357     RAW RAW                |.raw
 358   }
 359
 360 [OptionRom.CirrusLogic5446]
 361 INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {
 362     PCI_DEVICE_ID  = 0x00B8
 363   }
 364