OvmfPkg/OvmfPkgIa32.fdf

   1 ## @file
   2 #  Open Virtual Machine Firmware: FDF
   3 #
   4 #  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
   5 #
   6 #  This program and the accompanying materials
   7 #  are licensed and made available under the terms and conditions of the BSD License
   8 #  which accompanies this distribution. The full text of the license may be found at
   9 #  http://opensource.org/licenses/bsd-license.php
  10 #
  11 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 #
  14 ##
  15
  16 ################################################################################
  17 [FD.OVMF]
  18 BaseAddress   = 0xFFF00000
  19 Size          = 0x00100000
  20 ErasePolarity = 1
  21 BlockSize     = 0x1000
  22 NumBlocks     = 0x100
  23
  24 0x00000000|0x000EE000
  25 FV = FVMAIN_COMPACT
  26
  27 0x000EE000|0x12000
  28 FV = SECFV
  29
  30 ################################################################################
  31
  32 [FD.MEMFD]
  33 BaseAddress   = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase
  34 Size          = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize
  35 ErasePolarity = 1
  36 BlockSize     = 0x10000
  37 NumBlocks     = 0x40
  38
  39 0x0|0x400000
  40 FV = MAINFV
  41
  42 ################################################################################
  43
  44 [FV.SECFV]
  45 BlockSize          = 0x1000
  46 FvAlignment        = 16
  47 ERASE_POLARITY     = 1
  48 MEMORY_MAPPED      = TRUE
  49 STICKY_WRITE       = TRUE
  50 LOCK_CAP           = TRUE
  51 LOCK_STATUS        = TRUE
  52 WRITE_DISABLED_CAP = TRUE
  53 WRITE_ENABLED_CAP  = TRUE
  54 WRITE_STATUS       = TRUE
  55 WRITE_LOCK_CAP     = TRUE
  56 WRITE_LOCK_STATUS  = TRUE
  57 READ_DISABLED_CAP  = TRUE
  58 READ_ENABLED_CAP   = TRUE
  59 READ_STATUS        = TRUE
  60 READ_LOCK_CAP      = TRUE
  61 READ_LOCK_STATUS   = TRUE
  62
  63 #
  64 # SEC Phase modules
  65 #
  66 # The code in this FV handles the initial firmware startup, and
  67 # decompresses the MAINFV which handles the majority of the boot sequence.
  68 #
  69 INF  OvmfPkg/Sec/SecMain.inf
  70
  71 INF  RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
  72
  73 ################################################################################
  74 [FV.MAINFV]
  75 BlockSize          = 0x10000
  76 FvAlignment        = 16
  77 ERASE_POLARITY     = 1
  78 MEMORY_MAPPED      = TRUE
  79 STICKY_WRITE       = TRUE
  80 LOCK_CAP           = TRUE
  81 LOCK_STATUS        = TRUE
  82 WRITE_DISABLED_CAP = TRUE
  83 WRITE_ENABLED_CAP  = TRUE
  84 WRITE_STATUS       = TRUE
  85 WRITE_LOCK_CAP     = TRUE
  86 WRITE_LOCK_STATUS  = TRUE
  87 READ_DISABLED_CAP  = TRUE
  88 READ_ENABLED_CAP   = TRUE
  89 READ_STATUS        = TRUE
  90 READ_LOCK_CAP      = TRUE
  91 READ_LOCK_STATUS   = TRUE
  92
  93 #
  94 # Files to be placed in MAIN FV
  95 #
  96 # This firmware volume will have files placed in it uncompressed,
  97 # and then then entire firmware volume will be compressed in a
  98 # single compression operation in order to achieve better
  99 # overall compression.
 100 #
 101
 102 APRIORI PEI {
 103   INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 104 }
 105
 106 #
 107 #  PEI Phase modules
 108 #
 109 INF  MdeModulePkg/Core/Pei/PeiMain.inf
 110 INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 111 INF  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
 112 INF  OvmfPkg/PlatformPei/PlatformPei.inf
 113 INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 114
 115 FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {
 116   SECTION FV_IMAGE = DXEFV
 117 }
 118
 119 ################################################################################
 120
 121 [FV.DXEFV]
 122 BlockSize          = 0x10000
 123 FvAlignment        = 16
 124 ERASE_POLARITY     = 1
 125 MEMORY_MAPPED      = TRUE
 126 STICKY_WRITE       = TRUE
 127 LOCK_CAP           = TRUE
 128 LOCK_STATUS        = TRUE
 129 WRITE_DISABLED_CAP = TRUE
 130 WRITE_ENABLED_CAP  = TRUE
 131 WRITE_STATUS       = TRUE
 132 WRITE_LOCK_CAP     = TRUE
 133 WRITE_LOCK_STATUS  = TRUE
 134 READ_DISABLED_CAP  = TRUE
 135 READ_ENABLED_CAP   = TRUE
 136 READ_STATUS        = TRUE
 137 READ_LOCK_CAP      = TRUE
 138 READ_LOCK_STATUS   = TRUE
 139
 140 APRIORI DXE {
 141   INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 142 }
 143
 144 #
 145 # DXE Phase modules
 146 #
 147 INF  MdeModulePkg/Core/Dxe/DxeMain.inf
 148
 149 INF  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
 150 INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 151
 152 INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 153 INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 154 INF  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
 155 INF  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 156 INF  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
 157 INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
 158 INF  UefiCpuPkg/CpuDxe/CpuDxe.inf
 159 INF  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
 160 INF  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
 161 INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 162 INF  PcAtChipsetPkg/KbcResetDxe/Reset.inf
 163 INF  MdeModulePkg/Universal/Metronome/Metronome.inf
 164 INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
 165
 166 INF  OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf
 167 INF  OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf
 168 INF  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
 169 INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
 170 INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 171 INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 172 INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
 173 INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
 174 INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
 175 INF  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
 176 INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 177 INF  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
 178 INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 179 INF  MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
 180 INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
 181 INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
 182 INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 183 INF  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
 184 INF  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
 185 INF  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
 186 INF  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf
 187 INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 188 INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 189
 190 INF  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
 191 INF  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
 192 INF  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
 193 INF  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
 194 INF  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf
 195
 196 INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
 197 INF  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
 198 INF  RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf
 199 INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf
 200
 201 INF  RuleOverride = BINARY FatBinPkg/EnhancedFatDxe/Fat.inf
 202 INF  RuleOverride = BINARY EdkShellBinPkg/FullShell/FullShell.inf
 203
 204 FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
 205   SECTION RAW = MdeModulePkg/Logo/Logo.bmp
 206 }
 207
 208 #
 209 # Network modules
 210 #
 211 !if $(NETWORK_ENABLE)
 212   FILE DRIVER = 5D695E11-9B3F-4b83-B25F-4A8D5D69BE07 {
 213     SECTION PE32 = Intel3.5/EFI32/E3507E2.EFI
 214   }
 215   INF  MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
 216   INF  MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
 217   INF  MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
 218   INF  MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
 219   INF  MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
 220   INF  MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
 221   INF  MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
 222   INF  MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
 223   INF  MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
 224   INF  MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
 225   INF  MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
 226   INF  MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
 227   INF  MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
 228 !endif
 229
 230 ################################################################################
 231
 232 [FV.FVMAIN_COMPACT]
 233 FvAlignment        = 16
 234 ERASE_POLARITY     = 1
 235 MEMORY_MAPPED      = TRUE
 236 STICKY_WRITE       = TRUE
 237 LOCK_CAP           = TRUE
 238 LOCK_STATUS        = TRUE
 239 WRITE_DISABLED_CAP = TRUE
 240 WRITE_ENABLED_CAP  = TRUE
 241 WRITE_STATUS       = TRUE
 242 WRITE_LOCK_CAP     = TRUE
 243 WRITE_LOCK_STATUS  = TRUE
 244 READ_DISABLED_CAP  = TRUE
 245 READ_ENABLED_CAP   = TRUE
 246 READ_STATUS        = TRUE
 247 READ_LOCK_CAP      = TRUE
 248 READ_LOCK_STATUS   = TRUE
 249
 250 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
 251    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
 252      SECTION FV_IMAGE = MAINFV
 253    }
 254  }
 255
 256 ################################################################################
 257
 258 [Rule.Common.SEC]
 259   FILE SEC = $(NAMED_GUID) {
 260     PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 261     UI       STRING ="$(MODULE_NAME)" Optional
 262     VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 263   }
 264
 265 [Rule.Common.PEI_CORE]
 266   FILE PEI_CORE = $(NAMED_GUID) {
 267     PE32     PE32   Align=32    $(INF_OUTPUT)/$(MODULE_NAME).efi
 268     UI       STRING ="$(MODULE_NAME)" Optional
 269     VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 270   }
 271
 272 [Rule.Common.PEIM]
 273   FILE PEIM = $(NAMED_GUID) {
 274      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 275      PE32      PE32   Align=32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 276      UI       STRING="$(MODULE_NAME)" Optional
 277      VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 278   }
 279
 280 [Rule.Common.DXE_CORE]
 281   FILE DXE_CORE = $(NAMED_GUID) {
 282     PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi
 283     UI       STRING="$(MODULE_NAME)" Optional
 284     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 285   }
 286
 287 [Rule.Common.DXE_DRIVER]
 288   FILE DRIVER = $(NAMED_GUID) {
 289     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 290     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 291     UI       STRING="$(MODULE_NAME)" Optional
 292     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 293   }
 294
 295 [Rule.Common.DXE_RUNTIME_DRIVER]
 296   FILE DRIVER = $(NAMED_GUID) {
 297     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 298     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 299     UI       STRING="$(MODULE_NAME)" Optional
 300     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 301   }
 302
 303 [Rule.Common.UEFI_DRIVER]
 304   FILE DRIVER = $(NAMED_GUID) {
 305     DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex
 306     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 307     UI       STRING="$(MODULE_NAME)" Optional
 308     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 309   }
 310
 311 [Rule.Common.UEFI_DRIVER.BINARY]
 312   FILE DRIVER = $(NAMED_GUID) {
 313     DXE_DEPEX DXE_DEPEX Optional      |.depex
 314     PE32      PE32                    |.efi
 315     UI        STRING="$(MODULE_NAME)" Optional
 316     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 317   }
 318
 319 [Rule.Common.UEFI_APPLICATION]
 320   FILE APPLICATION = $(NAMED_GUID) {
 321     PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
 322     UI       STRING="$(MODULE_NAME)" Optional
 323     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 324   }
 325
 326 [Rule.Common.UEFI_APPLICATION.BINARY]
 327   FILE APPLICATION = $(NAMED_GUID) {
 328     PE32      PE32                    |.efi
 329     UI        STRING="$(MODULE_NAME)" Optional
 330     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 331   }
 332
 333 [Rule.Common.USER_DEFINED.ACPITABLE]
 334   FILE FREEFORM = $(NAMED_GUID) {
 335     RAW ACPI               |.acpi
 336     RAW ASL                |.aml
 337   }
 338
 339 [Rule.Common.SEC.RESET_VECTOR]
 340   FILE RAW = $(NAMED_GUID) {
 341     RAW RAW                |.raw
 342   }
 343
 344 [OptionRom.CirrusLogic5446]
 345 INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {
 346     PCI_DEVICE_ID  = 0x00B8
 347   }