OvmfPkg/PciHostBridgeDxe/PciHostBridge.h

   1 /** @file
   2   The Header file of the Pci Host Bridge Driver
   3
   4   Copyright (C) 2015, Red Hat, Inc.
   5   Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
   6
   7   This program and the accompanying materials are licensed and made available
   8   under the terms and conditions of the BSD License which accompanies this
   9   distribution.  The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14 **/
  15
  16 #ifndef _PCI_HOST_BRIDGE_H_
  17 #define _PCI_HOST_BRIDGE_H_
  18
  19 #include <PiDxe.h>
  20
  21 #include <IndustryStandard/Pci.h>
  22 #include <IndustryStandard/Acpi.h>
  23
  24 #include <Protocol/PciHostBridgeResourceAllocation.h>
  25 #include <Protocol/PciRootBridgeIo.h>
  26 #include <Protocol/Metronome.h>
  27 #include <Protocol/DevicePath.h>
  28
  29
  30 #include <Library/BaseLib.h>
  31 #include <Library/DebugLib.h>
  32 #include <Library/BaseMemoryLib.h>
  33 #include <Library/MemoryAllocationLib.h>
  34 #include <Library/UefiLib.h>
  35 #include <Library/UefiBootServicesTableLib.h>
  36 #include <Library/DxeServicesTableLib.h>
  37 #include <Library/DevicePathLib.h>
  38 #include <Library/IoLib.h>
  39 #include <Library/PciLib.h>
  40
  41 #define MAX_PCI_DEVICE_NUMBER      31
  42 #define MAX_PCI_FUNCTION_NUMBER    7
  43 #define MAX_PCI_REG_ADDRESS        0xFF
  44
  45 typedef enum {
  46   IoOperation,
  47   MemOperation,
  48   PciOperation
  49 } OPERATION_TYPE;
  50
  51 #define PCI_HOST_BRIDGE_SIGNATURE  SIGNATURE_32('e', 'h', 's', 't')
  52 typedef struct {
  53   UINTN                                             Signature;
  54   EFI_HANDLE                                        HostBridgeHandle;
  55   UINTN                                             RootBridgeNumber;
  56   LIST_ENTRY                                        Head;
  57   BOOLEAN                                           ResourceSubmited;
  58   BOOLEAN                                           CanRestarted;
  59   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  ResAlloc;
  60 } PCI_HOST_BRIDGE_INSTANCE;
  61
  62 #define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
  63   CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
  64
  65 //
  66 //  HostBridge Resource Allocation interface
  67 //
  68
  69 /**
  70   These are the notifications from the PCI bus driver that it is about to enter
  71   a certain phase of the PCI enumeration process.
  72
  73   This member function can be used to notify the host bridge driver to perform
  74   specific actions, including any chipset-specific initialization, so that the
  75   chipset is ready to enter the next phase. Eight notification points are
  76   defined at this time. See belows:
  77
  78   EfiPciHostBridgeBeginEnumeration       Resets the host bridge PCI apertures
  79                                          and internal data structures. The PCI
  80                                          enumerator should issue this
  81                                          notification before starting a fresh
  82                                          enumeration process. Enumeration
  83                                          cannot be restarted after sending any
  84                                          other notification such as
  85                                          EfiPciHostBridgeBeginBusAllocation.
  86
  87   EfiPciHostBridgeBeginBusAllocation     The bus allocation phase is about to
  88                                          begin. No specific action is required
  89                                          here. This notification can be used to
  90                                          perform any chipset-specific
  91                                          programming.
  92
  93   EfiPciHostBridgeEndBusAllocation       The bus allocation and bus programming
  94                                          phase is complete. No specific action
  95                                          is required here. This notification
  96                                          can be used to perform any
  97                                          chipset-specific programming.
  98
  99   EfiPciHostBridgeBeginResourceAllocation
 100                                          The resource allocation phase is about
 101                                          to begin. No specific action is
 102                                          required here. This notification can
 103                                          be used to perform any
 104                                          chipset-specific programming.
 105
 106   EfiPciHostBridgeAllocateResources      Allocates resources per previously
 107                                          submitted requests for all the PCI
 108                                          root bridges. These resource settings
 109                                          are returned on the next call to
 110                                          GetProposedResources(). Before calling
 111                                          NotifyPhase() with a Phase of
 112                                          EfiPciHostBridgeAllocateResource, the
 113                                          PCI bus enumerator is responsible for
 114                                          gathering I/O and memory requests for
 115                                          all the PCI root bridges and
 116                                          submitting these requests using
 117                                          SubmitResources(). This function pads
 118                                          the resource amount to suit the root
 119                                          bridge hardware, takes care of
 120                                          dependencies between the PCI root
 121                                          bridges, and calls the Global
 122                                          Coherency Domain (GCD) with the
 123                                          allocation request. In the case of
 124                                          padding, the allocated range could be
 125                                          bigger than what was requested.
 126
 127   EfiPciHostBridgeSetResources           Programs the host bridge hardware to
 128                                          decode previously allocated resources
 129                                          (proposed resources) for all the PCI
 130                                          root bridges. After the hardware is
 131                                          programmed, reassigning resources will
 132                                          not be supported. The bus settings are
 133                                          not affected.
 134
 135   EfiPciHostBridgeFreeResources          Deallocates resources that were
 136                                          previously allocated for all the PCI
 137                                          root bridges and resets the I/O and
 138                                          memory apertures to their initial
 139                                          state. The bus settings are not
 140                                          affected. If the request to allocate
 141                                          resources fails, the PCI enumerator
 142                                          can use this notification to
 143                                          deallocate previous resources, adjust
 144                                          the requests, and retry allocation.
 145
 146   EfiPciHostBridgeEndResourceAllocation  The resource allocation phase is
 147                                          completed. No specific action is
 148                                          required here. This notification can
 149                                          be used to perform any chipsetspecific
 150                                          programming.
 151
 152   @param[in] This                The instance pointer of
 153                                EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 154
 155   @param[in] Phase               The phase during enumeration
 156
 157   @retval EFI_NOT_READY          This phase cannot be entered at this time. For
 158                                  example, this error is valid for a Phase of
 159                                  EfiPciHostBridgeAllocateResources if
 160                                  SubmitResources() has not been called for one
 161                                  or more PCI root bridges before this call
 162
 163   @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error.
 164                                  This error is valid for a Phase of
 165                                  EfiPciHostBridgeSetResources.
 166
 167   @retval EFI_INVALID_PARAMETER  Invalid phase parameter
 168
 169   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a
 170                                  lack of resources. This error is valid for a
 171                                  Phase of EfiPciHostBridgeAllocateResources if
 172                                  the previously submitted resource requests
 173                                  cannot be fulfilled or were only partially
 174                                  fulfilled.
 175
 176   @retval EFI_SUCCESS            The notification was accepted without any
 177                                  errors.
 178 **/
 179 EFI_STATUS
 180 EFIAPI
 181 NotifyPhase(
 182   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 183   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE    Phase
 184   );
 185
 186 /**
 187   Return the device handle of the next PCI root bridge that is associated with
 188   this Host Bridge.
 189
 190   This function is called multiple times to retrieve the device handles of all
 191   the PCI root bridges that are associated with this PCI host bridge. Each PCI
 192   host bridge is associated with one or more PCI root bridges. On each call,
 193   the handle that was returned by the previous call is passed into the
 194   interface, and on output the interface returns the device handle of the next
 195   PCI root bridge. The caller can use the handle to obtain the instance of the
 196   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL for that root bridge. When there are no more
 197   PCI root bridges to report, the interface returns EFI_NOT_FOUND. A PCI
 198   enumerator must enumerate the PCI root bridges in the order that they are
 199   returned by this function.
 200
 201   For D945 implementation, there is only one root bridge in PCI host bridge.
 202
 203   @param[in]       This              The instance pointer of
 204                                EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 205
 206   @param[in, out]  RootBridgeHandle  Returns the device handle of the next PCI
 207                                      root bridge.
 208
 209   @retval EFI_SUCCESS            If parameter RootBridgeHandle = NULL, then
 210                                  return the first Rootbridge handle of the
 211                                  specific Host bridge and return EFI_SUCCESS.
 212
 213   @retval EFI_NOT_FOUND          Can not find the any more root bridge in
 214                                  specific host bridge.
 215
 216   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not an EFI_HANDLE that was
 217                                  returned on a previous call to
 218                                  GetNextRootBridge().
 219 **/
 220 EFI_STATUS
 221 EFIAPI
 222 GetNextRootBridge(
 223   IN       EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 224   IN OUT   EFI_HANDLE                                       *RootBridgeHandle
 225   );
 226
 227 /**
 228   Returns the allocation attributes of a PCI root bridge.
 229
 230   The function returns the allocation attributes of a specific PCI root bridge.
 231   The attributes can vary from one PCI root bridge to another. These attributes
 232   are different from the decode-related attributes that are returned by the
 233   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
 234   RootBridgeHandle parameter is used to specify the instance of the PCI root
 235   bridge. The device handles of all the root bridges that are associated with
 236   this host bridge must be obtained by calling GetNextRootBridge(). The
 237   attributes are static in the sense that they do not change during or after
 238   the enumeration process. The hardware may provide mechanisms to change the
 239   attributes on the fly, but such changes must be completed before
 240   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is installed. The permitted
 241   values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
 242   "Related Definitions" below. The caller uses these attributes to combine
 243   multiple resource requests.
 244
 245   For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI
 246   bus enumerator needs to include requests for the prefetchable memory in the
 247   nonprefetchable memory pool and not request any prefetchable memory.
 248
 249   Attribute                             Description
 250   ------------------------------------  ---------------------------------------
 251   EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM  If this bit is set, then the PCI root
 252                                         bridge does not support separate
 253                                         windows for nonprefetchable and
 254                                         prefetchable memory. A PCI bus driver
 255                                         needs to include requests for
 256                                         prefetchable memory in the
 257                                         nonprefetchable memory pool.
 258
 259   EFI_PCI_HOST_BRIDGE_MEM64_DECODE      If this bit is set, then the PCI root
 260                                         bridge supports 64-bit memory windows.
 261                                         If this bit is not set, the PCI bus
 262                                         driver needs to include requests for a
 263                                         64-bit memory address in the
 264                                         corresponding 32-bit memory pool.
 265
 266   @param[in]   This               The instance pointer of
 267                                EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 268
 269   @param[in]   RootBridgeHandle   The device handle of the PCI root bridge in
 270                                   which the caller is interested. Type
 271                                   EFI_HANDLE is defined in
 272                                   InstallProtocolInterface() in the UEFI 2.0
 273                                   Specification.
 274
 275   @param[out]  Attributes         The pointer to attribte of root bridge, it is
 276                                   output parameter
 277
 278   @retval EFI_INVALID_PARAMETER   Attribute pointer is NULL
 279
 280   @retval EFI_INVALID_PARAMETER   RootBridgehandle is invalid.
 281
 282   @retval EFI_SUCCESS             Success to get attribute of interested root
 283                                   bridge.
 284 **/
 285 EFI_STATUS
 286 EFIAPI
 287 GetAttributes(
 288   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 289   IN  EFI_HANDLE                                       RootBridgeHandle,
 290   OUT UINT64                                           *Attributes
 291   );
 292
 293 /**
 294   Sets up the specified PCI root bridge for the bus enumeration process.
 295
 296   This member function sets up the root bridge for bus enumeration and returns
 297   the PCI bus range over which the search should be performed in ACPI 2.0
 298   resource descriptor format.
 299
 300   @param[in]   This              The
 301                                EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 302                                  instance.
 303
 304   @param[in]   RootBridgeHandle  The PCI Root Bridge to be set up.
 305
 306   @param[out]  Configuration     Pointer to the pointer to the PCI bus resource
 307                                  descriptor.
 308
 309   @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
 310
 311   @retval EFI_OUT_OF_RESOURCES  Fail to allocate ACPI resource descriptor tag.
 312
 313   @retval EFI_SUCCESS           Sucess to allocate ACPI resource descriptor.
 314 **/
 315 EFI_STATUS
 316 EFIAPI
 317 StartBusEnumeration(
 318   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 319   IN  EFI_HANDLE                                       RootBridgeHandle,
 320   OUT VOID                                             **Configuration
 321   );
 322
 323 /**
 324   Programs the PCI root bridge hardware so that it decodes the specified PCI
 325   bus range.
 326
 327   This member function programs the specified PCI root bridge to decode the bus
 328   range that is specified by the input parameter Configuration.
 329   The bus range information is specified in terms of the ACPI 2.0 resource
 330   descriptor format.
 331
 332   @param[in] This              The
 333                                EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 334                                instance
 335
 336   @param[in] RootBridgeHandle  The PCI Root Bridge whose bus range is to be
 337                                programmed
 338
 339   @param[in] Configuration     The pointer to the PCI bus resource descriptor
 340
 341   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge
 342                                  handle.
 343
 344   @retval EFI_INVALID_PARAMETER  Configuration is NULL.
 345
 346   @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI
 347                                  2.0 resource descriptor.
 348
 349   @retval EFI_INVALID_PARAMETER  Configuration does not include a valid ACPI
 350                                  2.0 bus resource descriptor.
 351
 352   @retval EFI_INVALID_PARAMETER  Configuration includes valid ACPI 2.0 resource
 353                                  descriptors other than bus descriptors.
 354
 355   @retval EFI_INVALID_PARAMETER  Configuration contains one or more invalid
 356                                  ACPI resource descriptors.
 357
 358   @retval EFI_INVALID_PARAMETER  "Address Range Minimum" is invalid for this
 359                                  root bridge.
 360
 361   @retval EFI_INVALID_PARAMETER  "Address Range Length" is invalid for this
 362                                  root bridge.
 363
 364   @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error.
 365
 366   @retval EFI_SUCCESS            The bus range for the PCI root bridge was
 367                                  programmed.
 368 **/
 369 EFI_STATUS
 370 EFIAPI
 371 SetBusNumbers(
 372   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 373   IN EFI_HANDLE                                       RootBridgeHandle,
 374   IN VOID                                             *Configuration
 375   );
 376
 377 /**
 378   Submits the I/O and memory resource requirements for the specified PCI root
 379   bridge.
 380
 381   This function is used to submit all the I/O and memory resources that are
 382   required by the specified PCI root bridge. The input parameter Configuration
 383   is used to specify the following:
 384   - The various types of resources that are required
 385   - The associated lengths in terms of ACPI 2.0 resource descriptor format
 386
 387   @param[in] This              Pointer to the
 388                                EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 389                                instance.
 390
 391   @param[in] RootBridgeHandle  The PCI root bridge whose I/O and memory
 392                                resource requirements are being submitted.
 393
 394   @param[in] Configuration     The pointer to the PCI I/O and PCI memory
 395                                resource descriptor.
 396
 397   @retval EFI_SUCCESS            The I/O and memory resource requests for a PCI
 398                                  root bridge were accepted.
 399
 400   @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge
 401                                  handle.
 402
 403   @retval EFI_INVALID_PARAMETER  Configuration is NULL.
 404
 405   @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI
 406                                  2.0 resource descriptor.
 407
 408   @retval EFI_INVALID_PARAMETER  Configuration includes requests for one or
 409                                  more resource types that are not supported by
 410                                  this PCI root bridge. This error will happen
 411                                  if the caller did not combine resources
 412                                  according to Attributes that were returned by
 413                                  GetAllocAttributes().
 414
 415   @retval EFI_INVALID_PARAMETER  Address Range Maximum" is invalid.
 416
 417   @retval EFI_INVALID_PARAMETER  "Address Range Length" is invalid for this PCI
 418                                  root bridge.
 419
 420   @retval EFI_INVALID_PARAMETER  "Address Space Granularity" is invalid for
 421                                  this PCI root bridge.
 422 **/
 423 EFI_STATUS
 424 EFIAPI
 425 SubmitResources(
 426   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 427   IN EFI_HANDLE                                       RootBridgeHandle,
 428   IN VOID                                             *Configuration
 429   );
 430
 431 /**
 432    Returns the proposed resource settings for the specified PCI root bridge.
 433
 434    This member function returns the proposed resource settings for the
 435    specified PCI root bridge. The proposed resource settings are prepared when
 436    NotifyPhase() is called with a Phase of EfiPciHostBridgeAllocateResources.
 437    The output parameter Configuration specifies the following:
 438    - The various types of resources, excluding bus resources, that are
 439      allocated
 440    - The associated lengths in terms of ACPI 2.0 resource descriptor format
 441
 442    @param[in]  This              Pointer to the
 443                                EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 444                                  instance.
 445
 446    @param[in]  RootBridgeHandle  The PCI root bridge handle. Type EFI_HANDLE is
 447                                  defined in InstallProtocolInterface() in the
 448                                  UEFI 2.0 Specification.
 449
 450    @param[out] Configuration     The pointer to the pointer to the PCI I/O and
 451                                  memory resource descriptor.
 452
 453    @retval EFI_SUCCESS            The requested parameters were returned.
 454
 455    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge
 456                                   handle.
 457
 458    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error.
 459
 460    @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a
 461                                   lack of resources.
 462 **/
 463 EFI_STATUS
 464 EFIAPI
 465 GetProposedResources(
 466   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 467   IN  EFI_HANDLE                                       RootBridgeHandle,
 468   OUT VOID                                             **Configuration
 469   );
 470
 471 /**
 472   Provides the hooks from the PCI bus driver to every PCI controller
 473   (device/function) at various stages of the PCI enumeration process that allow
 474   the host bridge driver to preinitialize individual PCI controllers before
 475   enumeration.
 476
 477   This function is called during the PCI enumeration process. No specific
 478   action is expected from this member function. It allows the host bridge
 479   driver to preinitialize individual PCI controllers before enumeration.
 480
 481   @param This              Pointer to the
 482                            EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 483                            instance.
 484
 485   @param RootBridgeHandle  The associated PCI root bridge handle. Type
 486                            EFI_HANDLE is defined in InstallProtocolInterface()
 487                            in the UEFI 2.0 Specification.
 488
 489   @param PciAddress        The address of the PCI device on the PCI bus. This
 490                            address can be passed to the
 491                            EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to
 492                            access the PCI configuration space of the device.
 493                            See Table 12-1 in the UEFI 2.0 Specification for the
 494                            definition of
 495                            EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
 496
 497   @param Phase             The phase of the PCI device enumeration.
 498
 499   @retval EFI_SUCCESS              The requested parameters were returned.
 500
 501   @retval EFI_INVALID_PARAMETER    RootBridgeHandle is not a valid root bridge
 502                                    handle.
 503
 504   @retval EFI_INVALID_PARAMETER    Phase is not a valid phase that is defined
 505                                    in
 506                                   EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
 507
 508   @retval EFI_DEVICE_ERROR         Programming failed due to a hardware error.
 509                                    The PCI enumerator should not enumerate this
 510                                    device, including its child devices if it is
 511                                    a PCI-to-PCI bridge.
 512 **/
 513 EFI_STATUS
 514 EFIAPI
 515 PreprocessController (
 516   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,
 517   IN  EFI_HANDLE                                        RootBridgeHandle,
 518   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS       PciAddress,
 519   IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE      Phase
 520   );
 521
 522
 523 //
 524 // Define resource status constant
 525 //
 526 #define EFI_RESOURCE_NONEXISTENT   0xFFFFFFFFFFFFFFFFULL
 527 #define EFI_RESOURCE_LESS          0xFFFFFFFFFFFFFFFEULL
 528
 529
 530 //
 531 // Driver Instance Data Prototypes
 532 //
 533
 534 typedef struct {
 535   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation;
 536   UINTN                                      NumberOfBytes;
 537   UINTN                                      NumberOfPages;
 538   EFI_PHYSICAL_ADDRESS                       HostAddress;
 539   EFI_PHYSICAL_ADDRESS                       MappedHostAddress;
 540 } MAP_INFO;
 541
 542 typedef struct {
 543   ACPI_HID_DEVICE_PATH              AcpiDevicePath;
 544   EFI_DEVICE_PATH_PROTOCOL          EndDevicePath;
 545 } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
 546
 547 typedef struct {
 548   UINT64          BusBase;
 549   UINT64          BusLimit;
 550
 551   UINT64          MemBase;
 552   UINT64          MemLimit;
 553
 554   UINT64          IoBase;
 555   UINT64          IoLimit;
 556 } PCI_ROOT_BRIDGE_RESOURCE_APERTURE;
 557
 558 typedef enum {
 559   TypeIo = 0,
 560   TypeMem32,
 561   TypePMem32,
 562   TypeMem64,
 563   TypePMem64,
 564   TypeBus,
 565   TypeMax
 566 } PCI_RESOURCE_TYPE;
 567
 568 typedef enum {
 569   ResNone = 0,
 570   ResSubmitted,
 571   ResRequested,
 572   ResAllocated,
 573   ResStatusMax
 574 } RES_STATUS;
 575
 576 typedef struct {
 577   PCI_RESOURCE_TYPE Type;
 578   UINT64            Base;
 579   UINT64            Length;
 580   UINT64            Alignment;
 581   RES_STATUS        Status;
 582 } PCI_RES_NODE;
 583
 584 #pragma pack(1)
 585 typedef struct {
 586   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR SpaceDesc[TypeMax];
 587   EFI_ACPI_END_TAG_DESCRIPTOR       EndDesc;
 588 } RESOURCE_CONFIGURATION;
 589 #pragma pack()
 590
 591 #define PCI_ROOT_BRIDGE_SIGNATURE  SIGNATURE_32('e', '2', 'p', 'b')
 592
 593 typedef struct {
 594   UINT32                 Signature;
 595   LIST_ENTRY             Link;
 596   EFI_HANDLE             Handle;
 597   UINT64                 RootBridgeAttrib;
 598   UINT64                 Attributes;
 599   UINT64                 Supports;
 600
 601   //
 602   // Specific for this memory controller: Bus, I/O, Mem
 603   //
 604   PCI_RES_NODE           ResAllocNode[6];
 605
 606   //
 607   // Addressing for Memory and I/O and Bus arrange
 608   //
 609   UINT64                 BusBase;
 610   UINT64                 MemBase;
 611   UINT64                 IoBase;
 612   UINT64                 BusLimit;
 613   UINT64                 MemLimit;
 614   UINT64                 IoLimit;
 615
 616   EFI_PCI_ROOT_BRIDGE_DEVICE_PATH         DevicePath;
 617   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL         Io;
 618
 619   RESOURCE_CONFIGURATION                  ConfigBuffer;
 620 } PCI_ROOT_BRIDGE_INSTANCE;
 621
 622
 623 //
 624 // Driver Instance Data Macros
 625 //
 626 #define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
 627   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
 628
 629
 630 #define DRIVER_INSTANCE_FROM_LIST_ENTRY(a) \
 631   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
 632
 633 /**
 634
 635   Construct the Pci Root Bridge Io protocol
 636
 637   @param Protocol         Point to protocol instance
 638   @param HostBridgeHandle Handle of host bridge
 639   @param Attri            Attribute of host bridge
 640   @param ResAperture      ResourceAperture for host bridge
 641
 642   @retval EFI_SUCCESS Success to initialize the Pci Root Bridge.
 643 **/
 644 EFI_STATUS
 645 RootBridgeConstructor (
 646   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL    *Protocol,
 647   IN EFI_HANDLE                         HostBridgeHandle,
 648   IN UINT64                             Attri,
 649   IN PCI_ROOT_BRIDGE_RESOURCE_APERTURE  *ResAperture
 650   );
 651
 652 #endif