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1 /**@file
2 Platform PEI driver
3
4 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 //
16 // The package level header files this module uses
17 //
18 #include <PiPei.h>
19
20 //
21 // The Library classes this module consumes
22 //
23 #include <Library/DebugLib.h>
24 #include <Library/HobLib.h>
25 #include <Library/IoLib.h>
26 #include <Library/MemoryAllocationLib.h>
27 #include <Library/PcdLib.h>
28 #include <Library/PciLib.h>
29 #include <Library/PeimEntryPoint.h>
30 #include <Library/PeiServicesLib.h>
31 #include <Library/ResourcePublicationLib.h>
32 #include <Guid/MemoryTypeInformation.h>
33 #include <Ppi/MasterBootMode.h>
34
35 #include "Platform.h"
36 #include "Cmos.h"
37
38 EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
39 { EfiACPIMemoryNVS, 0x004 },
40 { EfiACPIReclaimMemory, 0x008 },
41 { EfiReservedMemoryType, 0x004 },
42 { EfiRuntimeServicesData, 0x024 },
43 { EfiRuntimeServicesCode, 0x030 },
44 { EfiBootServicesCode, 0x180 },
45 { EfiBootServicesData, 0xF00 },
46 { EfiMaxMemoryType, 0x000 }
47 };
48
49
50 EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
51 {
52 EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
53 &gEfiPeiMasterBootModePpiGuid,
54 NULL
55 }
56 };
57
58
59 VOID
60 AddIoMemoryBaseSizeHob (
61 EFI_PHYSICAL_ADDRESS MemoryBase,
62 UINT64 MemorySize
63 )
64 {
65 BuildResourceDescriptorHob (
66 EFI_RESOURCE_MEMORY_MAPPED_IO,
67 EFI_RESOURCE_ATTRIBUTE_PRESENT |
68 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
69 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
70 EFI_RESOURCE_ATTRIBUTE_TESTED,
71 MemoryBase,
72 MemorySize
73 );
74 }
75
76
77 VOID
78 AddIoMemoryRangeHob (
79 EFI_PHYSICAL_ADDRESS MemoryBase,
80 EFI_PHYSICAL_ADDRESS MemoryLimit
81 )
82 {
83 AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
84 }
85
86
87 VOID
88 AddMemoryBaseSizeHob (
89 EFI_PHYSICAL_ADDRESS MemoryBase,
90 UINT64 MemorySize
91 )
92 {
93 BuildResourceDescriptorHob (
94 EFI_RESOURCE_SYSTEM_MEMORY,
95 EFI_RESOURCE_ATTRIBUTE_PRESENT |
96 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
97 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
98 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
99 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
100 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
101 EFI_RESOURCE_ATTRIBUTE_TESTED,
102 MemoryBase,
103 MemorySize
104 );
105 }
106
107
108 VOID
109 AddMemoryRangeHob (
110 EFI_PHYSICAL_ADDRESS MemoryBase,
111 EFI_PHYSICAL_ADDRESS MemoryLimit
112 )
113 {
114 AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
115 }
116
117
118 VOID
119 AddUntestedMemoryBaseSizeHob (
120 EFI_PHYSICAL_ADDRESS MemoryBase,
121 UINT64 MemorySize
122 )
123 {
124 BuildResourceDescriptorHob (
125 EFI_RESOURCE_SYSTEM_MEMORY,
126 EFI_RESOURCE_ATTRIBUTE_PRESENT |
127 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
128 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
129 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
130 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
131 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE,
132 MemoryBase,
133 MemorySize
134 );
135 }
136
137
138 VOID
139 AddUntestedMemoryRangeHob (
140 EFI_PHYSICAL_ADDRESS MemoryBase,
141 EFI_PHYSICAL_ADDRESS MemoryLimit
142 )
143 {
144 AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
145 }
146
147
148 VOID
149 MemMapInitialization (
150 EFI_PHYSICAL_ADDRESS TopOfMemory
151 )
152 {
153 //
154 // Create Memory Type Information HOB
155 //
156 BuildGuidDataHob (
157 &gEfiMemoryTypeInformationGuid,
158 mDefaultMemoryTypeInformation,
159 sizeof(mDefaultMemoryTypeInformation)
160 );
161
162 //
163 // Add PCI IO Port space available for PCI resource allocations.
164 //
165 BuildResourceDescriptorHob (
166 EFI_RESOURCE_IO,
167 EFI_RESOURCE_ATTRIBUTE_PRESENT |
168 EFI_RESOURCE_ATTRIBUTE_INITIALIZED,
169 0x1000,
170 0xF000
171 );
172
173 //
174 // Add PCI MMIO space available to PCI resource allocations
175 //
176 if (TopOfMemory < BASE_2GB) {
177 AddIoMemoryBaseSizeHob (BASE_2GB, 0xFEC00000 - BASE_2GB);
178 } else {
179 AddIoMemoryBaseSizeHob (TopOfMemory, 0xFEC00000 - TopOfMemory);
180 }
181
182 //
183 // Local APIC range
184 //
185 AddIoMemoryBaseSizeHob (0xFEC80000, SIZE_512KB);
186
187 //
188 // I/O APIC range
189 //
190 AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_512KB);
191
192 //
193 // Video memory + Legacy BIOS region
194 //
195 AddIoMemoryRangeHob (0x0A0000, BASE_1MB);
196 }
197
198
199 VOID
200 MiscInitialization (
201 )
202 {
203 //
204 // Disable A20 Mask
205 //
206 IoOr8 (0x92, BIT1);
207
208 //
209 // Build the CPU hob with 36-bit addressing and 16-bits of IO space.
210 //
211 BuildCpuHob (36, 16);
212
213 //
214 // Set the PM I/O base address to 0x400
215 //
216 PciAndThenOr32 (PCI_LIB_ADDRESS (0, 1, 3, 0x40), (UINT32) ~0xfc0, 0x400);
217 }
218
219
220 VOID
221 BootModeInitialization (
222 )
223 {
224 EFI_STATUS Status;
225
226 Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
227 ASSERT_EFI_ERROR (Status);
228
229 Status = PeiServicesInstallPpi (mPpiBootMode);
230 ASSERT_EFI_ERROR (Status);
231 }
232
233
234 VOID
235 ReserveEmuVariableNvStore (
236 )
237 {
238 EFI_PHYSICAL_ADDRESS VariableStore;
239
240 //
241 // Allocate storage for NV variables early on so it will be
242 // at a consistent address. Since VM memory is preserved
243 // across reboots, this allows the NV variable storage to survive
244 // a VM reboot.
245 //
246 VariableStore =
247 (EFI_PHYSICAL_ADDRESS)(UINTN)
248 AllocateRuntimePool (
249 2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)
250 );
251 DEBUG ((EFI_D_INFO,
252 "Reserved variable store memory: 0x%lX; size: %dkb\n",
253 VariableStore,
254 (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024
255 ));
256 PcdSet64 (PcdEmuVariableNvStoreReserved, VariableStore);
257 }
258
259
260 VOID
261 DebugDumpCmos (
262 VOID
263 )
264 {
265 UINTN Loop;
266
267 DEBUG ((EFI_D_INFO, "CMOS:\n"));
268
269 for (Loop = 0; Loop < 0x80; Loop++) {
270 if ((Loop % 0x10) == 0) {
271 DEBUG ((EFI_D_INFO, "%02x:", Loop));
272 }
273 DEBUG ((EFI_D_INFO, " %02x", CmosRead8 (Loop)));
274 if ((Loop % 0x10) == 0xf) {
275 DEBUG ((EFI_D_INFO, "\n"));
276 }
277 }
278 }
279
280
281 /**
282 Perform Platform PEI initialization.
283
284 @param FileHandle Handle of the file being invoked.
285 @param PeiServices Describes the list of possible PEI Services.
286
287 @return EFI_SUCCESS The PEIM initialized successfully.
288
289 **/
290 EFI_STATUS
291 EFIAPI
292 InitializePlatform (
293 IN EFI_PEI_FILE_HANDLE FileHandle,
294 IN CONST EFI_PEI_SERVICES **PeiServices
295 )
296 {
297 EFI_PHYSICAL_ADDRESS TopOfMemory;
298
299 DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n"));
300
301 DebugDumpCmos ();
302
303 TopOfMemory = MemDetect ();
304
305 ReserveEmuVariableNvStore ();
306
307 PeiFvInitialization ();
308
309 MemMapInitialization (TopOfMemory);
310
311 MiscInitialization ();
312
313 BootModeInitialization ();
314
315 return EFI_SUCCESS;
316 }