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1 ;------------------------------------------------------------------------------
2 ; @file
3 ; First code executed by processor after resetting.
4 ; Derived from UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
5 ;
6 ; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
7 ; SPDX-License-Identifier: BSD-2-Clause-Patent
8 ;
9 ;------------------------------------------------------------------------------
10
11 BITS 16
12
13 ALIGN 16
14
15 ;
16 ; Pad the image size to 4k when page tables are in VTF0
17 ;
18 ; If the VTF0 image has page tables built in, then we need to make
19 ; sure the end of VTF0 is 4k above where the page tables end.
20 ;
21 ; This is required so the page tables will be 4k aligned when VTF0 is
22 ; located just below 0x100000000 (4GB) in the firmware device.
23 ;
24 %ifdef ALIGN_TOP_TO_4K_FOR_PAGING
25 TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0
26 %endif
27
28 ;
29 ; Padding to ensure first guid starts at 0xffffffd0
30 ;
31 TIMES (15 - ((guidedStructureEnd - guidedStructureStart + 15) % 16)) DB 0
32
33 ; GUIDed structure. To traverse this you should first verify the
34 ; presence of the table footer guid
35 ; (96b582de-1fb2-45f7-baea-a366c55a082d) at 0xffffffd0. If that
36 ; is found, the two bytes at 0xffffffce are the entire table length.
37 ;
38 ; The table is composed of structures with the form:
39 ;
40 ; Data (arbitrary bytes identified by guid)
41 ; length from start of data to end of guid (2 bytes)
42 ; guid (16 bytes)
43 ;
44 ; so work back from the footer using the length to traverse until you
45 ; either find the guid you're looking for or run off the beginning of
46 ; the table.
47 ;
48 guidedStructureStart:
49
50 %ifdef ARCH_X64
51 ;
52 ; TDX Metadata offset block
53 ;
54 ; TdxMetadata.asm is included in ARCH_X64 because Inte TDX is only
55 ; available in ARCH_X64. Below block describes the offset of
56 ; TdxMetadata block in Ovmf image
57 ;
58 ; GUID : e47a6535-984a-4798-865e-4685a7bf8ec2
59 ;
60 tdxMetadataOffsetStart:
61 DD fourGigabytes - TdxMetadataGuid - 16
62 DW tdxMetadataOffsetEnd - tdxMetadataOffsetStart
63 DB 0x35, 0x65, 0x7a, 0xe4, 0x4a, 0x98, 0x98, 0x47
64 DB 0x86, 0x5e, 0x46, 0x85, 0xa7, 0xbf, 0x8e, 0xc2
65 tdxMetadataOffsetEnd:
66
67 %endif
68
69 ; SEV Hash Table Block
70 ;
71 ; This describes the guest ram area where the hypervisor should
72 ; install a table describing the hashes of certain firmware configuration
73 ; device files that would otherwise be passed in unchecked. The current
74 ; use is for the kernel, initrd and command line values, but others may be
75 ; added. The data format is:
76 ;
77 ; base physical address (32 bit word)
78 ; table length (32 bit word)
79 ;
80 ; GUID (SEV FW config hash block): 7255371f-3a3b-4b04-927b-1da6efa8d454
81 ;
82 sevFwHashBlockStart:
83 DD SEV_FW_HASH_BLOCK_BASE
84 DD SEV_FW_HASH_BLOCK_SIZE
85 DW sevFwHashBlockEnd - sevFwHashBlockStart
86 DB 0x1f, 0x37, 0x55, 0x72, 0x3b, 0x3a, 0x04, 0x4b
87 DB 0x92, 0x7b, 0x1d, 0xa6, 0xef, 0xa8, 0xd4, 0x54
88 sevFwHashBlockEnd:
89
90 ; SEV Secret block
91 ;
92 ; This describes the guest ram area where the hypervisor should
93 ; inject the secret. The data format is:
94 ;
95 ; base physical address (32 bit word)
96 ; table length (32 bit word)
97 ;
98 ; GUID (SEV secret block): 4c2eb361-7d9b-4cc3-8081-127c90d3d294
99 ;
100 sevSecretBlockStart:
101 DD SEV_LAUNCH_SECRET_BASE
102 DD SEV_LAUNCH_SECRET_SIZE
103 DW sevSecretBlockEnd - sevSecretBlockStart
104 DB 0x61, 0xB3, 0x2E, 0x4C, 0x9B, 0x7D, 0xC3, 0x4C
105 DB 0x80, 0x81, 0x12, 0x7C, 0x90, 0xD3, 0xD2, 0x94
106 sevSecretBlockEnd:
107
108 ;
109 ; SEV-ES Processor Reset support
110 ;
111 ; sevEsResetBlock:
112 ; For the initial boot of an AP under SEV-ES, the "reset" RIP must be
113 ; programmed to the RAM area defined by SEV_ES_AP_RESET_IP. The data
114 ; format is:
115 ;
116 ; IP value [0:15]
117 ; CS segment base [31:16]
118 ;
119 ; GUID (SEV-ES reset block): 00f771de-1a7e-4fcb-890e-68c77e2fb44e
120 ;
121 ; A hypervisor reads the CS segement base and IP value. The CS segment base
122 ; value represents the high order 16-bits of the CS segment base, so the
123 ; hypervisor must left shift the value of the CS segement base by 16 bits to
124 ; form the full CS segment base for the CS segment register. It would then
125 ; program the EIP register with the IP value as read.
126 ;
127
128 sevEsResetBlockStart:
129 DD SEV_ES_AP_RESET_IP
130 DW sevEsResetBlockEnd - sevEsResetBlockStart
131 DB 0xDE, 0x71, 0xF7, 0x00, 0x7E, 0x1A, 0xCB, 0x4F
132 DB 0x89, 0x0E, 0x68, 0xC7, 0x7E, 0x2F, 0xB4, 0x4E
133 sevEsResetBlockEnd:
134
135 ;
136 ; Table footer:
137 ;
138 ; length of whole table (16 bit word)
139 ; GUID (table footer): 96b582de-1fb2-45f7-baea-a366c55a082d
140 ;
141 DW guidedStructureEnd - guidedStructureStart
142 DB 0xDE, 0x82, 0xB5, 0x96, 0xB2, 0x1F, 0xF7, 0x45
143 DB 0xBA, 0xEA, 0xA3, 0x66, 0xC5, 0x5A, 0x08, 0x2D
144
145 guidedStructureEnd:
146
147 ALIGN 16
148
149 applicationProcessorEntryPoint:
150 ;
151 ; Application Processors entry point
152 ;
153 ; GenFv generates code aligned on a 4k boundary which will jump to this
154 ; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
155 ; used to wake up the application processors.
156 ;
157 jmp EarlyApInitReal16
158
159 ALIGN 8
160
161 DD 0
162
163 ;
164 ; The VTF signature
165 ;
166 ; VTF-0 means that the VTF (Volume Top File) code does not require
167 ; any fixups.
168 ;
169 vtfSignature:
170 DB 'V', 'T', 'F', 0
171
172 ALIGN 16
173
174 resetVector:
175 ;
176 ; Reset Vector
177 ;
178 ; This is where the processor will begin execution
179 ;
180 nop
181 nop
182 jmp EarlyBspInitReal16
183
184 ALIGN 16
185
186 fourGigabytes:
187