OvmfPkg/ResetVector/Ia32/PageTables64.asm

   1 ;------------------------------------------------------------------------------
   2 ; @file
   3 ; Sets the CR3 register for 64-bit paging
   4 ;
   5 ; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
   6 ; Copyright (c) 2017 - 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>
   7 ; SPDX-License-Identifier: BSD-2-Clause-Patent
   8 ;
   9 ;------------------------------------------------------------------------------
  10
  11 BITS    32
  12
  13 %define PAGE_PRESENT            0x01
  14 %define PAGE_READ_WRITE         0x02
  15 %define PAGE_USER_SUPERVISOR    0x04
  16 %define PAGE_WRITE_THROUGH      0x08
  17 %define PAGE_CACHE_DISABLE     0x010
  18 %define PAGE_ACCESSED          0x020
  19 %define PAGE_DIRTY             0x040
  20 %define PAGE_PAT               0x080
  21 %define PAGE_GLOBAL           0x0100
  22 %define PAGE_2M_MBO            0x080
  23 %define PAGE_2M_PAT          0x01000
  24
  25 %define PAGE_4K_PDE_ATTR (PAGE_ACCESSED + \
  26                           PAGE_DIRTY + \
  27                           PAGE_READ_WRITE + \
  28                           PAGE_PRESENT)
  29
  30 %define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
  31                           PAGE_ACCESSED + \
  32                           PAGE_DIRTY + \
  33                           PAGE_READ_WRITE + \
  34                           PAGE_PRESENT)
  35
  36 %define PAGE_PDP_ATTR (PAGE_ACCESSED + \
  37                        PAGE_READ_WRITE + \
  38                        PAGE_PRESENT)
  39
  40 ;
  41 ; Modified:  EAX, EBX, ECX, EDX
  42 ;
  43 SetCr3ForPageTables64:
  44
  45     OneTimeCall   CheckSevFeatures
  46     xor     edx, edx
  47     test    eax, eax
  48     jz      SevNotActive
  49
  50     ; If SEV is enabled, C-bit is always above 31
  51     sub     eax, 32
  52     bts     edx, eax
  53
  54 SevNotActive:
  55
  56     ;
  57     ; For OVMF, build some initial page tables at
  58     ; PcdOvmfSecPageTablesBase - (PcdOvmfSecPageTablesBase + 0x6000).
  59     ;
  60     ; This range should match with PcdOvmfSecPageTablesSize which is
  61     ; declared in the FDF files.
  62     ;
  63     ; At the end of PEI, the pages tables will be rebuilt into a
  64     ; more permanent location by DxeIpl.
  65     ;
  66
  67     mov     ecx, 6 * 0x1000 / 4
  68     xor     eax, eax
  69 clearPageTablesMemoryLoop:
  70     mov     dword[ecx * 4 + PT_ADDR (0) - 4], eax
  71     loop    clearPageTablesMemoryLoop
  72
  73     ;
  74     ; Top level Page Directory Pointers (1 * 512GB entry)
  75     ;
  76     mov     dword[PT_ADDR (0)], PT_ADDR (0x1000) + PAGE_PDP_ATTR
  77     mov     dword[PT_ADDR (4)], edx
  78
  79     ;
  80     ; Next level Page Directory Pointers (4 * 1GB entries => 4GB)
  81     ;
  82     mov     dword[PT_ADDR (0x1000)], PT_ADDR (0x2000) + PAGE_PDP_ATTR
  83     mov     dword[PT_ADDR (0x1004)], edx
  84     mov     dword[PT_ADDR (0x1008)], PT_ADDR (0x3000) + PAGE_PDP_ATTR
  85     mov     dword[PT_ADDR (0x100C)], edx
  86     mov     dword[PT_ADDR (0x1010)], PT_ADDR (0x4000) + PAGE_PDP_ATTR
  87     mov     dword[PT_ADDR (0x1014)], edx
  88     mov     dword[PT_ADDR (0x1018)], PT_ADDR (0x5000) + PAGE_PDP_ATTR
  89     mov     dword[PT_ADDR (0x101C)], edx
  90
  91     ;
  92     ; Page Table Entries (2048 * 2MB entries => 4GB)
  93     ;
  94     mov     ecx, 0x800
  95 pageTableEntriesLoop:
  96     mov     eax, ecx
  97     dec     eax
  98     shl     eax, 21
  99     add     eax, PAGE_2M_PDE_ATTR
 100     mov     [ecx * 8 + PT_ADDR (0x2000 - 8)], eax
 101     mov     [(ecx * 8 + PT_ADDR (0x2000 - 8)) + 4], edx
 102     loop    pageTableEntriesLoop
 103
 104     OneTimeCall   IsSevEsEnabled
 105     test    eax, eax
 106     jz      SetCr3
 107
 108     ;
 109     ; The initial GHCB will live at GHCB_BASE and needs to be un-encrypted.
 110     ; This requires the 2MB page for this range be broken down into 512 4KB
 111     ; pages.  All will be marked encrypted, except for the GHCB.
 112     ;
 113     mov     ecx, (GHCB_BASE >> 21)
 114     mov     eax, GHCB_PT_ADDR + PAGE_PDP_ATTR
 115     mov     [ecx * 8 + PT_ADDR (0x2000)], eax
 116
 117     ;
 118     ; Page Table Entries (512 * 4KB entries => 2MB)
 119     ;
 120     mov     ecx, 512
 121 pageTableEntries4kLoop:
 122     mov     eax, ecx
 123     dec     eax
 124     shl     eax, 12
 125     add     eax, GHCB_BASE & 0xFFE0_0000
 126     add     eax, PAGE_4K_PDE_ATTR
 127     mov     [ecx * 8 + GHCB_PT_ADDR - 8], eax
 128     mov     [(ecx * 8 + GHCB_PT_ADDR - 8) + 4], edx
 129     loop    pageTableEntries4kLoop
 130
 131     ;
 132     ; Clear the encryption bit from the GHCB entry
 133     ;
 134     mov     ecx, (GHCB_BASE & 0x1F_FFFF) >> 12
 135     mov     [ecx * 8 + GHCB_PT_ADDR + 4], strict dword 0
 136
 137     mov     ecx, GHCB_SIZE / 4
 138     xor     eax, eax
 139 clearGhcbMemoryLoop:
 140     mov     dword[ecx * 4 + GHCB_BASE - 4], eax
 141     loop    clearGhcbMemoryLoop
 142
 143 SetCr3:
 144     ;
 145     ; Set CR3 now that the paging structures are available
 146     ;
 147     mov     eax, PT_ADDR (0)
 148     mov     cr3, eax
 149
 150     OneTimeCallRet SetCr3ForPageTables64