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OvmfPkg/ResetVector: update SEV support to use new work area format
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1 ;------------------------------------------------------------------------------
2 ; @file
3 ; Sets the CR3 register for 64-bit paging
4 ;
5 ; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
6 ; Copyright (c) 2017 - 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>
7 ; SPDX-License-Identifier: BSD-2-Clause-Patent
8 ;
9 ;------------------------------------------------------------------------------
10
11 BITS 32
12
13 %define PAGE_PRESENT 0x01
14 %define PAGE_READ_WRITE 0x02
15 %define PAGE_USER_SUPERVISOR 0x04
16 %define PAGE_WRITE_THROUGH 0x08
17 %define PAGE_CACHE_DISABLE 0x010
18 %define PAGE_ACCESSED 0x020
19 %define PAGE_DIRTY 0x040
20 %define PAGE_PAT 0x080
21 %define PAGE_GLOBAL 0x0100
22 %define PAGE_2M_MBO 0x080
23 %define PAGE_2M_PAT 0x01000
24
25 %define PAGE_4K_PDE_ATTR (PAGE_ACCESSED + \
26 PAGE_DIRTY + \
27 PAGE_READ_WRITE + \
28 PAGE_PRESENT)
29
30 %define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
31 PAGE_ACCESSED + \
32 PAGE_DIRTY + \
33 PAGE_READ_WRITE + \
34 PAGE_PRESENT)
35
36 %define PAGE_PDP_ATTR (PAGE_ACCESSED + \
37 PAGE_READ_WRITE + \
38 PAGE_PRESENT)
39
40 ;
41 ; Modified: EAX, EBX, ECX, EDX
42 ;
43 SetCr3ForPageTables64:
44
45 ; Clear the WorkArea header. The SEV probe routines will populate the
46 ; work area when detected.
47 mov byte[WORK_AREA_GUEST_TYPE], 0
48
49 OneTimeCall CheckSevFeatures
50 xor edx, edx
51 test eax, eax
52 jz SevNotActive
53
54 ; If SEV is enabled, C-bit is always above 31
55 sub eax, 32
56 bts edx, eax
57
58 SevNotActive:
59
60 ;
61 ; For OVMF, build some initial page tables at
62 ; PcdOvmfSecPageTablesBase - (PcdOvmfSecPageTablesBase + 0x6000).
63 ;
64 ; This range should match with PcdOvmfSecPageTablesSize which is
65 ; declared in the FDF files.
66 ;
67 ; At the end of PEI, the pages tables will be rebuilt into a
68 ; more permanent location by DxeIpl.
69 ;
70
71 mov ecx, 6 * 0x1000 / 4
72 xor eax, eax
73 clearPageTablesMemoryLoop:
74 mov dword[ecx * 4 + PT_ADDR (0) - 4], eax
75 loop clearPageTablesMemoryLoop
76
77 ;
78 ; Top level Page Directory Pointers (1 * 512GB entry)
79 ;
80 mov dword[PT_ADDR (0)], PT_ADDR (0x1000) + PAGE_PDP_ATTR
81 mov dword[PT_ADDR (4)], edx
82
83 ;
84 ; Next level Page Directory Pointers (4 * 1GB entries => 4GB)
85 ;
86 mov dword[PT_ADDR (0x1000)], PT_ADDR (0x2000) + PAGE_PDP_ATTR
87 mov dword[PT_ADDR (0x1004)], edx
88 mov dword[PT_ADDR (0x1008)], PT_ADDR (0x3000) + PAGE_PDP_ATTR
89 mov dword[PT_ADDR (0x100C)], edx
90 mov dword[PT_ADDR (0x1010)], PT_ADDR (0x4000) + PAGE_PDP_ATTR
91 mov dword[PT_ADDR (0x1014)], edx
92 mov dword[PT_ADDR (0x1018)], PT_ADDR (0x5000) + PAGE_PDP_ATTR
93 mov dword[PT_ADDR (0x101C)], edx
94
95 ;
96 ; Page Table Entries (2048 * 2MB entries => 4GB)
97 ;
98 mov ecx, 0x800
99 pageTableEntriesLoop:
100 mov eax, ecx
101 dec eax
102 shl eax, 21
103 add eax, PAGE_2M_PDE_ATTR
104 mov [ecx * 8 + PT_ADDR (0x2000 - 8)], eax
105 mov [(ecx * 8 + PT_ADDR (0x2000 - 8)) + 4], edx
106 loop pageTableEntriesLoop
107
108 OneTimeCall IsSevEsEnabled
109 test eax, eax
110 jz SetCr3
111
112 ;
113 ; The initial GHCB will live at GHCB_BASE and needs to be un-encrypted.
114 ; This requires the 2MB page for this range be broken down into 512 4KB
115 ; pages. All will be marked encrypted, except for the GHCB.
116 ;
117 mov ecx, (GHCB_BASE >> 21)
118 mov eax, GHCB_PT_ADDR + PAGE_PDP_ATTR
119 mov [ecx * 8 + PT_ADDR (0x2000)], eax
120
121 ;
122 ; Page Table Entries (512 * 4KB entries => 2MB)
123 ;
124 mov ecx, 512
125 pageTableEntries4kLoop:
126 mov eax, ecx
127 dec eax
128 shl eax, 12
129 add eax, GHCB_BASE & 0xFFE0_0000
130 add eax, PAGE_4K_PDE_ATTR
131 mov [ecx * 8 + GHCB_PT_ADDR - 8], eax
132 mov [(ecx * 8 + GHCB_PT_ADDR - 8) + 4], edx
133 loop pageTableEntries4kLoop
134
135 ;
136 ; Clear the encryption bit from the GHCB entry
137 ;
138 mov ecx, (GHCB_BASE & 0x1F_FFFF) >> 12
139 mov [ecx * 8 + GHCB_PT_ADDR + 4], strict dword 0
140
141 mov ecx, GHCB_SIZE / 4
142 xor eax, eax
143 clearGhcbMemoryLoop:
144 mov dword[ecx * 4 + GHCB_BASE - 4], eax
145 loop clearGhcbMemoryLoop
146
147 SetCr3:
148 ;
149 ; Set CR3 now that the paging structures are available
150 ;
151 mov eax, PT_ADDR (0)
152 mov cr3, eax
153
154 OneTimeCallRet SetCr3ForPageTables64