1 ;------------------------------------------------------------------------------
3 ; This file includes all other code files to assemble the reset vector code
5 ; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
6 ; Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>
7 ; SPDX-License-Identifier: BSD-2-Clause-Patent
9 ;------------------------------------------------------------------------------
12 ; If neither ARCH_IA32 nor ARCH_X64 are defined, then try to include
13 ; Base.h to use the C pre-processor to determine the architecture.
18 #if defined (MDE_CPU_IA32)
20 #elif defined (MDE_CPU_X64)
28 %error "Only one of ARCH_IA32 or ARCH_X64 can be defined."
32 %error "Either ARCH_IA32 or ARCH_X64 must be defined."
35 %include "CommonMacros.inc"
37 %include "PostCodes.inc"
40 %include "Port80Debug.asm"
42 %include "SerialDebug.asm"
44 %include "DebugDisabled.asm"
47 %include "Ia32/SearchForBfvBase.asm"
48 %include "Ia32/SearchForSecEntry.asm"
50 %define WORK_AREA_GUEST_TYPE (FixedPcdGet32 (PcdOvmfWorkAreaBase))
55 %if (FixedPcdGet32 (PcdOvmfSecPageTablesSize) != 0x6000)
56 %error "This implementation inherently depends on PcdOvmfSecPageTablesSize"
59 %if (FixedPcdGet32 (PcdOvmfSecGhcbPageTableSize) != 0x1000)
60 %error "This implementation inherently depends on PcdOvmfSecGhcbPageTableSize"
63 %if (FixedPcdGet32 (PcdOvmfSecGhcbSize) != 0x2000)
64 %error "This implementation inherently depends on PcdOvmfSecGhcbSize"
67 %if ((FixedPcdGet32 (PcdOvmfSecGhcbBase) >> 21) != \
68 ((FixedPcdGet32 (PcdOvmfSecGhcbBase) + FixedPcdGet32 (PcdOvmfSecGhcbSize) - 1) >> 21))
69 %error "This implementation inherently depends on PcdOvmfSecGhcbBase not straddling a 2MB boundary"
72 %define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset))
74 %define GHCB_PT_ADDR (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBase))
75 %define GHCB_BASE (FixedPcdGet32 (PcdOvmfSecGhcbBase))
76 %define GHCB_SIZE (FixedPcdGet32 (PcdOvmfSecGhcbSize))
77 %define SEV_ES_WORK_AREA (FixedPcdGet32 (PcdSevEsWorkAreaBase))
78 %define SEV_ES_WORK_AREA_RDRAND (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 8)
79 %define SEV_ES_WORK_AREA_ENC_MASK (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 16)
80 %define SEV_ES_VC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))
81 %include "Ia32/Flat32ToFlat64.asm"
82 %include "Ia32/AmdSev.asm"
83 %include "Ia32/PageTables64.asm"
86 %include "Ia16/Real16ToFlat32.asm"
87 %include "Ia16/Init16.asm"
91 %define SEV_ES_AP_RESET_IP FixedPcdGet32 (PcdSevEsWorkAreaBase)
92 %define SEV_LAUNCH_SECRET_BASE FixedPcdGet32 (PcdSevLaunchSecretBase)
93 %define SEV_LAUNCH_SECRET_SIZE FixedPcdGet32 (PcdSevLaunchSecretSize)
94 %define SEV_FW_HASH_BLOCK_BASE FixedPcdGet32 (PcdQemuHashTableBase)
95 %define SEV_FW_HASH_BLOCK_SIZE FixedPcdGet32 (PcdQemuHashTableSize)
96 %include "Ia16/ResetVectorVtf0.asm"