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OvmfPkg: Update Sec to support Tdx
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1 ;------------------------------------------------------------------------------
2 ;*
3 ;* Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
4 ;* SPDX-License-Identifier: BSD-2-Clause-Patent
5 ;*
6 ;* CpuAsm.asm
7 ;*
8 ;* Abstract:
9 ;*
10 ;------------------------------------------------------------------------------
11
12 #include <Base.h>
13 %include "TdxCommondefs.inc"
14
15 DEFAULT REL
16 SECTION .text
17
18 extern ASM_PFX(SecCoreStartupWithStack)
19
20 %macro tdcall 0
21 db 0x66, 0x0f, 0x01, 0xcc
22 %endmacro
23
24 ;
25 ; SecCore Entry Point
26 ;
27 ; Processor is in flat protected mode
28 ;
29 ; @param[in] RAX Initial value of the EAX register (BIST: Built-in Self Test)
30 ; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor
31 ; @param[in] RBP Pointer to the start of the Boot Firmware Volume
32 ; @param[in] DS Selector allowing flat access to all addresses
33 ; @param[in] ES Selector allowing flat access to all addresses
34 ; @param[in] FS Selector allowing flat access to all addresses
35 ; @param[in] GS Selector allowing flat access to all addresses
36 ; @param[in] SS Selector allowing flat access to all addresses
37 ;
38 ; @return None This routine does not return
39 ;
40 global ASM_PFX(_ModuleEntryPoint)
41 ASM_PFX(_ModuleEntryPoint):
42
43 ;
44 ; Guest type is stored in OVMF_WORK_AREA
45 ;
46 %define OVMF_WORK_AREA FixedPcdGet32 (PcdOvmfWorkAreaBase)
47 %define VM_GUEST_TYPE_TDX 2
48 mov eax, OVMF_WORK_AREA
49 cmp byte[eax], VM_GUEST_TYPE_TDX
50 jne InitStack
51
52 mov rax, TDCALL_TDINFO
53 tdcall
54
55 ;
56 ; R8 [31:0] NUM_VCPUS
57 ; [63:32] MAX_VCPUS
58 ; R9 [31:0] VCPU_INDEX
59 ; Td Guest set the VCPU0 as the BSP, others are the APs
60 ; APs jump to spinloop and get released by DXE's MpInitLib
61 ;
62 mov rax, r9
63 and rax, 0xffff
64 test rax, rax
65 jne ParkAp
66
67 InitStack:
68
69 ;
70 ; Fill the temporary RAM with the initial stack value.
71 ; The loop below will seed the heap as well, but that's harmless.
72 ;
73 mov rax, (FixedPcdGet32 (PcdInitValueInTempStack) << 32) | FixedPcdGet32 (PcdInitValueInTempStack)
74 ; qword to store
75 mov rdi, FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) ; base address,
76 ; relative to
77 ; ES
78 mov rcx, FixedPcdGet32 (PcdOvmfSecPeiTempRamSize) / 8 ; qword count
79 cld ; store from base
80 ; up
81 rep stosq
82
83 ;
84 ; Load temporary RAM stack based on PCDs
85 ;
86 %define SEC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + \
87 FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))
88 mov rsp, SEC_TOP_OF_STACK
89 nop
90
91 ;
92 ; Setup parameters and call SecCoreStartupWithStack
93 ; rcx: BootFirmwareVolumePtr
94 ; rdx: TopOfCurrentStack
95 ;
96 mov rcx, rbp
97 mov rdx, rsp
98 sub rsp, 0x20
99 call ASM_PFX(SecCoreStartupWithStack)
100
101 ;
102 ; Note: BSP never gets here. APs will be unblocked by DXE
103 ;
104 ; R8 [31:0] NUM_VCPUS
105 ; [63:32] MAX_VCPUS
106 ; R9 [31:0] VCPU_INDEX
107 ;
108 ParkAp:
109
110 mov rbp, r9
111
112 .do_wait_loop:
113 mov rsp, FixedPcdGet32 (PcdOvmfSecGhcbBackupBase)
114
115 ;
116 ; register itself in [rsp + CpuArrivalOffset]
117 ;
118 mov rax, 1
119 lock xadd dword [rsp + CpuArrivalOffset], eax
120 inc eax
121
122 .check_arrival_cnt:
123 cmp eax, r8d
124 je .check_command
125 mov eax, dword[rsp + CpuArrivalOffset]
126 jmp .check_arrival_cnt
127
128 .check_command:
129 mov eax, dword[rsp + CommandOffset]
130 cmp eax, MpProtectedModeWakeupCommandNoop
131 je .check_command
132
133 cmp eax, MpProtectedModeWakeupCommandWakeup
134 je .do_wakeup
135
136 ; Don't support this command, so ignore
137 jmp .check_command
138
139 .do_wakeup:
140 ;
141 ; BSP sets these variables before unblocking APs
142 ; RAX: WakeupVectorOffset
143 ; RBX: Relocated mailbox address
144 ; RBP: vCpuId
145 ;
146 mov rax, 0
147 mov eax, dword[rsp + WakeupVectorOffset]
148 mov rbx, [rsp + WakeupArgsRelocatedMailBox]
149 nop
150 jmp rax
151 jmp $