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1 /** @file
2 Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation
3
4 Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "PciHostBridge.h"
16
17 //
18 // Hard code: Root Bridge Number within the host bridge
19 // Root Bridge's attribute
20 // Root Bridge's device path
21 // Root Bridge's resource appeture
22 //
23 UINTN RootBridgeNumber[1] = { 1 };
24
25 UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };
26
27 EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
28 {
29 {
30 {
31 {
32 ACPI_DEVICE_PATH,
33 ACPI_DP,
34 {
35 (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
36 (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
37 }
38 },
39 EISA_PNP_ID(0x0A03),
40 0
41 },
42
43 {
44 END_DEVICE_PATH_TYPE,
45 END_ENTIRE_DEVICE_PATH_SUBTYPE,
46 {
47 END_DEVICE_PATH_LENGTH,
48 0
49 }
50 }
51 }
52 }
53 };
54
55 PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[1][1] = {
56 {{0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}}
57 };
58
59 EFI_HANDLE mDriverImageHandle;
60
61 PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {
62 PCI_HOST_BRIDGE_SIGNATURE, // Signature
63 NULL, // HostBridgeHandle
64 0, // RootBridgeNumber
65 {NULL, NULL}, // Head
66 FALSE, // ResourceSubiteed
67 TRUE, // CanRestarted
68 {
69 NotifyPhase,
70 GetNextRootBridge,
71 GetAttributes,
72 StartBusEnumeration,
73 SetBusNumbers,
74 SubmitResources,
75 GetProposedResources,
76 PreprocessController
77 }
78 };
79
80 //
81 // Implementation
82 //
83
84 /**
85 Entry point of this driver
86
87 @param ImageHandle Handle of driver image
88 @param SystemTable Point to EFI_SYSTEM_TABLE
89
90 @retval EFI_OUT_OF_RESOURCES Can not allocate memory resource
91 @retval EFI_DEVICE_ERROR Can not install the protocol instance
92 @retval EFI_SUCCESS Success to initialize the Pci host bridge.
93 **/
94 EFI_STATUS
95 EFIAPI
96 InitializePciHostBridge (
97 IN EFI_HANDLE ImageHandle,
98 IN EFI_SYSTEM_TABLE *SystemTable
99 )
100 {
101 EFI_STATUS Status;
102 UINTN Loop1;
103 UINTN Loop2;
104 PCI_HOST_BRIDGE_INSTANCE *HostBridge;
105 PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
106
107 mDriverImageHandle = ImageHandle;
108
109 //
110 // Create Host Bridge Device Handle
111 //
112 for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
113 HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);
114 if (HostBridge == NULL) {
115 return EFI_OUT_OF_RESOURCES;
116 }
117
118 HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
119 InitializeListHead (&HostBridge->Head);
120
121 Status = gBS->InstallMultipleProtocolInterfaces (
122 &HostBridge->HostBridgeHandle,
123 &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
124 NULL
125 );
126 if (EFI_ERROR (Status)) {
127 FreePool (HostBridge);
128 return EFI_DEVICE_ERROR;
129 }
130
131 //
132 // Create Root Bridge Device Handle in this Host Bridge
133 //
134
135 for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
136 PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
137 if (PrivateData == NULL) {
138 return EFI_OUT_OF_RESOURCES;
139 }
140
141 PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
142 PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
143
144 RootBridgeConstructor (
145 &PrivateData->Io,
146 HostBridge->HostBridgeHandle,
147 RootBridgeAttribute[Loop1][Loop2],
148 &mResAppeture[Loop1][Loop2]
149 );
150
151 Status = gBS->InstallMultipleProtocolInterfaces(
152 &PrivateData->Handle,
153 &gEfiDevicePathProtocolGuid, PrivateData->DevicePath,
154 &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,
155 NULL
156 );
157 if (EFI_ERROR (Status)) {
158 FreePool(PrivateData);
159 return EFI_DEVICE_ERROR;
160 }
161
162 InsertTailList (&HostBridge->Head, &PrivateData->Link);
163 }
164 }
165
166 return EFI_SUCCESS;
167 }
168
169
170 /**
171 These are the notifications from the PCI bus driver that it is about to enter a certain
172 phase of the PCI enumeration process.
173
174 This member function can be used to notify the host bridge driver to perform specific actions,
175 including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
176 Eight notification points are defined at this time. See belows:
177 EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
178 structures. The PCI enumerator should issue this notification
179 before starting a fresh enumeration process. Enumeration cannot
180 be restarted after sending any other notification such as
181 EfiPciHostBridgeBeginBusAllocation.
182 EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
183 required here. This notification can be used to perform any
184 chipset-specific programming.
185 EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
186 specific action is required here. This notification can be used to
187 perform any chipset-specific programming.
188 EfiPciHostBridgeBeginResourceAllocation
189 The resource allocation phase is about to begin. No specific
190 action is required here. This notification can be used to perform
191 any chipset-specific programming.
192 EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
193 root bridges. These resource settings are returned on the next call to
194 GetProposedResources(). Before calling NotifyPhase() with a Phase of
195 EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
196 for gathering I/O and memory requests for
197 all the PCI root bridges and submitting these requests using
198 SubmitResources(). This function pads the resource amount
199 to suit the root bridge hardware, takes care of dependencies between
200 the PCI root bridges, and calls the Global Coherency Domain (GCD)
201 with the allocation request. In the case of padding, the allocated range
202 could be bigger than what was requested.
203 EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
204 resources (proposed resources) for all the PCI root bridges. After the
205 hardware is programmed, reassigning resources will not be supported.
206 The bus settings are not affected.
207 EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
208 root bridges and resets the I/O and memory apertures to their initial
209 state. The bus settings are not affected. If the request to allocate
210 resources fails, the PCI enumerator can use this notification to
211 deallocate previous resources, adjust the requests, and retry
212 allocation.
213 EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
214 required here. This notification can be used to perform any chipsetspecific
215 programming.
216
217 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
218 @param[in] Phase The phase during enumeration
219
220 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
221 is valid for a Phase of EfiPciHostBridgeAllocateResources if
222 SubmitResources() has not been called for one or more
223 PCI root bridges before this call
224 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
225 for a Phase of EfiPciHostBridgeSetResources.
226 @retval EFI_INVALID_PARAMETER Invalid phase parameter
227 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
228 This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
229 previously submitted resource requests cannot be fulfilled or
230 were only partially fulfilled.
231 @retval EFI_SUCCESS The notification was accepted without any errors.
232
233 **/
234 EFI_STATUS
235 EFIAPI
236 NotifyPhase(
237 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
238 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
239 )
240 {
241 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
242 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
243 PCI_RESOURCE_TYPE Index;
244 LIST_ENTRY *List;
245 EFI_PHYSICAL_ADDRESS BaseAddress;
246 UINT64 AddrLen;
247 UINTN BitsOfAlignment;
248 EFI_STATUS Status;
249 EFI_STATUS ReturnStatus;
250
251 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
252
253 switch (Phase) {
254
255 case EfiPciHostBridgeBeginEnumeration:
256 if (HostBridgeInstance->CanRestarted) {
257 //
258 // Reset the Each Root Bridge
259 //
260 List = HostBridgeInstance->Head.ForwardLink;
261
262 while (List != &HostBridgeInstance->Head) {
263 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
264 for (Index = TypeIo; Index < TypeMax; Index++) {
265 RootBridgeInstance->ResAllocNode[Index].Type = Index;
266 RootBridgeInstance->ResAllocNode[Index].Base = 0;
267 RootBridgeInstance->ResAllocNode[Index].Length = 0;
268 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
269 }
270
271 List = List->ForwardLink;
272 }
273
274 HostBridgeInstance->ResourceSubmited = FALSE;
275 HostBridgeInstance->CanRestarted = TRUE;
276 } else {
277 //
278 // Can not restart
279 //
280 return EFI_NOT_READY;
281 }
282 break;
283
284 case EfiPciHostBridgeBeginBusAllocation:
285 //
286 // No specific action is required here, can perform any chipset specific programing
287 //
288 HostBridgeInstance->CanRestarted = FALSE;
289 return EFI_SUCCESS;
290 break;
291
292 case EfiPciHostBridgeEndBusAllocation:
293 //
294 // No specific action is required here, can perform any chipset specific programing
295 //
296 //HostBridgeInstance->CanRestarted = FALSE;
297 return EFI_SUCCESS;
298 break;
299
300 case EfiPciHostBridgeBeginResourceAllocation:
301 //
302 // No specific action is required here, can perform any chipset specific programing
303 //
304 //HostBridgeInstance->CanRestarted = FALSE;
305 return EFI_SUCCESS;
306 break;
307
308 case EfiPciHostBridgeAllocateResources:
309 ReturnStatus = EFI_SUCCESS;
310 if (HostBridgeInstance->ResourceSubmited) {
311 //
312 // Take care of the resource dependencies between the root bridges
313 //
314 List = HostBridgeInstance->Head.ForwardLink;
315
316 while (List != &HostBridgeInstance->Head) {
317 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
318 for (Index = TypeIo; Index < TypeBus; Index++) {
319 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
320
321 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
322
323 //
324 // Get the number of '1' in Alignment.
325 //
326 BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
327
328 switch (Index) {
329
330 case TypeIo:
331 //
332 // It is impossible for this chipset to align 0xFFFF for IO16
333 // So clear it
334 //
335 if (BitsOfAlignment >= 16) {
336 BitsOfAlignment = 0;
337 }
338
339 Status = gDS->AllocateIoSpace (
340 EfiGcdAllocateAnySearchBottomUp,
341 EfiGcdIoTypeIo,
342 BitsOfAlignment,
343 AddrLen,
344 &BaseAddress,
345 mDriverImageHandle,
346 NULL
347 );
348
349 if (!EFI_ERROR (Status)) {
350 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
351 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
352 } else {
353 ReturnStatus = Status;
354 if (Status != EFI_OUT_OF_RESOURCES) {
355 RootBridgeInstance->ResAllocNode[Index].Length = 0;
356 }
357 }
358
359 break;
360
361
362 case TypeMem32:
363 //
364 // It is impossible for this chipset to align 0xFFFFFFFF for Mem32
365 // So clear it
366 //
367
368 if (BitsOfAlignment >= 32) {
369 BitsOfAlignment = 0;
370 }
371
372 Status = gDS->AllocateMemorySpace (
373 EfiGcdAllocateAnySearchBottomUp,
374 EfiGcdMemoryTypeMemoryMappedIo,
375 BitsOfAlignment,
376 AddrLen,
377 &BaseAddress,
378 mDriverImageHandle,
379 NULL
380 );
381
382 if (!EFI_ERROR (Status)) {
383 // We were able to allocate the PCI memory
384 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
385 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
386
387 } else {
388 // Not able to allocate enough PCI memory
389 ReturnStatus = Status;
390
391 if (Status != EFI_OUT_OF_RESOURCES) {
392 RootBridgeInstance->ResAllocNode[Index].Length = 0;
393 }
394 ASSERT (FALSE);
395 }
396 break;
397
398 case TypePMem32:
399 case TypeMem64:
400 case TypePMem64:
401 ReturnStatus = EFI_ABORTED;
402 break;
403 default:
404 ASSERT (FALSE);
405 break;
406 }; //end switch
407 }
408 }
409
410 List = List->ForwardLink;
411 }
412
413 return ReturnStatus;
414
415 } else {
416 return EFI_NOT_READY;
417 }
418 break;
419
420 case EfiPciHostBridgeSetResources:
421 break;
422
423 case EfiPciHostBridgeFreeResources:
424 ReturnStatus = EFI_SUCCESS;
425 List = HostBridgeInstance->Head.ForwardLink;
426 while (List != &HostBridgeInstance->Head) {
427 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
428 for (Index = TypeIo; Index < TypeBus; Index++) {
429 if (RootBridgeInstance->ResAllocNode[Index].Status == ResAllocated) {
430 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
431 BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;
432 switch (Index) {
433
434 case TypeIo:
435 Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
436 if (EFI_ERROR (Status)) {
437 ReturnStatus = Status;
438 }
439 break;
440
441 case TypeMem32:
442 Status = gDS->FreeMemorySpace (BaseAddress, AddrLen);
443 if (EFI_ERROR (Status)) {
444 ReturnStatus = Status;
445 }
446 break;
447
448 case TypePMem32:
449 break;
450
451 case TypeMem64:
452 break;
453
454 case TypePMem64:
455 break;
456
457 default:
458 ASSERT (FALSE);
459 break;
460
461 }; //end switch
462 RootBridgeInstance->ResAllocNode[Index].Type = Index;
463 RootBridgeInstance->ResAllocNode[Index].Base = 0;
464 RootBridgeInstance->ResAllocNode[Index].Length = 0;
465 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
466 }
467 }
468
469 List = List->ForwardLink;
470 }
471
472 HostBridgeInstance->ResourceSubmited = FALSE;
473 HostBridgeInstance->CanRestarted = TRUE;
474 return ReturnStatus;
475 break;
476
477 case EfiPciHostBridgeEndResourceAllocation:
478 HostBridgeInstance->CanRestarted = FALSE;
479 break;
480
481 default:
482 return EFI_INVALID_PARAMETER;
483 }; // end switch
484
485 return EFI_SUCCESS;
486 }
487
488 /**
489 Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
490
491 This function is called multiple times to retrieve the device handles of all the PCI root bridges that
492 are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
493 root bridges. On each call, the handle that was returned by the previous call is passed into the
494 interface, and on output the interface returns the device handle of the next PCI root bridge. The
495 caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
496 for that root bridge. When there are no more PCI root bridges to report, the interface returns
497 EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
498 are returned by this function.
499 For D945 implementation, there is only one root bridge in PCI host bridge.
500
501 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
502 @param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.
503
504 @retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
505 specific Host bridge and return EFI_SUCCESS.
506 @retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.
507 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was
508 returned on a previous call to GetNextRootBridge().
509 **/
510 EFI_STATUS
511 EFIAPI
512 GetNextRootBridge(
513 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
514 IN OUT EFI_HANDLE *RootBridgeHandle
515 )
516 {
517 BOOLEAN NoRootBridge;
518 LIST_ENTRY *List;
519 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
520 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
521
522 NoRootBridge = TRUE;
523 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
524 List = HostBridgeInstance->Head.ForwardLink;
525
526
527 while (List != &HostBridgeInstance->Head) {
528 NoRootBridge = FALSE;
529 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
530 if (*RootBridgeHandle == NULL) {
531 //
532 // Return the first Root Bridge Handle of the Host Bridge
533 //
534 *RootBridgeHandle = RootBridgeInstance->Handle;
535 return EFI_SUCCESS;
536 } else {
537 if (*RootBridgeHandle == RootBridgeInstance->Handle) {
538 //
539 // Get next if have
540 //
541 List = List->ForwardLink;
542 if (List!=&HostBridgeInstance->Head) {
543 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
544 *RootBridgeHandle = RootBridgeInstance->Handle;
545 return EFI_SUCCESS;
546 } else {
547 return EFI_NOT_FOUND;
548 }
549 }
550 }
551
552 List = List->ForwardLink;
553 } //end while
554
555 if (NoRootBridge) {
556 return EFI_NOT_FOUND;
557 } else {
558 return EFI_INVALID_PARAMETER;
559 }
560 }
561
562 /**
563 Returns the allocation attributes of a PCI root bridge.
564
565 The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
566 from one PCI root bridge to another. These attributes are different from the decode-related
567 attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
568 RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
569 handles of all the root bridges that are associated with this host bridge must be obtained by calling
570 GetNextRootBridge(). The attributes are static in the sense that they do not change during or
571 after the enumeration process. The hardware may provide mechanisms to change the attributes on
572 the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
573 installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
574 "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
575 For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
576 include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
577 prefetchable memory.
578 Attribute Description
579 ------------------------------------ ----------------------------------------------------------------------
580 EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM If this bit is set, then the PCI root bridge does not support separate
581 windows for nonprefetchable and prefetchable memory. A PCI bus
582 driver needs to include requests for prefetchable memory in the
583 nonprefetchable memory pool.
584
585 EFI_PCI_HOST_BRIDGE_MEM64_DECODE If this bit is set, then the PCI root bridge supports 64-bit memory
586 windows. If this bit is not set, the PCI bus driver needs to include
587 requests for a 64-bit memory address in the corresponding 32-bit
588 memory pool.
589
590 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
591 @param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type
592 EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
593 @param[out] Attributes The pointer to attribte of root bridge, it is output parameter
594
595 @retval EFI_INVALID_PARAMETER Attribute pointer is NULL
596 @retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.
597 @retval EFI_SUCCESS Success to get attribute of interested root bridge.
598
599 **/
600 EFI_STATUS
601 EFIAPI
602 GetAttributes(
603 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
604 IN EFI_HANDLE RootBridgeHandle,
605 OUT UINT64 *Attributes
606 )
607 {
608 LIST_ENTRY *List;
609 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
610 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
611
612 if (Attributes == NULL) {
613 return EFI_INVALID_PARAMETER;
614 }
615
616 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
617 List = HostBridgeInstance->Head.ForwardLink;
618
619 while (List != &HostBridgeInstance->Head) {
620 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
621 if (RootBridgeHandle == RootBridgeInstance->Handle) {
622 *Attributes = RootBridgeInstance->RootBridgeAttrib;
623 return EFI_SUCCESS;
624 }
625 List = List->ForwardLink;
626 }
627
628 //
629 // RootBridgeHandle is not an EFI_HANDLE
630 // that was returned on a previous call to GetNextRootBridge()
631 //
632 return EFI_INVALID_PARAMETER;
633 }
634
635 /**
636 Sets up the specified PCI root bridge for the bus enumeration process.
637
638 This member function sets up the root bridge for bus enumeration and returns the PCI bus range
639 over which the search should be performed in ACPI 2.0 resource descriptor format.
640
641 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
642 @param[in] RootBridgeHandle The PCI Root Bridge to be set up.
643 @param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.
644
645 @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
646 @retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.
647 @retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.
648
649 **/
650 EFI_STATUS
651 EFIAPI
652 StartBusEnumeration(
653 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
654 IN EFI_HANDLE RootBridgeHandle,
655 OUT VOID **Configuration
656 )
657 {
658 LIST_ENTRY *List;
659 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
660 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
661 VOID *Buffer;
662 UINT8 *Temp;
663 UINT64 BusStart;
664 UINT64 BusEnd;
665
666 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
667 List = HostBridgeInstance->Head.ForwardLink;
668
669 while (List != &HostBridgeInstance->Head) {
670 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
671 if (RootBridgeHandle == RootBridgeInstance->Handle) {
672 //
673 // Set up the Root Bridge for Bus Enumeration
674 //
675 BusStart = RootBridgeInstance->BusBase;
676 BusEnd = RootBridgeInstance->BusLimit;
677 //
678 // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
679 //
680
681 Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
682 if (Buffer == NULL) {
683 return EFI_OUT_OF_RESOURCES;
684 }
685
686 Temp = (UINT8 *)Buffer;
687
688 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
689 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;
690 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
691 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
692 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
693 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
694 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
695 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
696 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
697 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;
698
699 Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
700 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
701 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
702
703 *Configuration = Buffer;
704 return EFI_SUCCESS;
705 }
706 List = List->ForwardLink;
707 }
708
709 return EFI_INVALID_PARAMETER;
710 }
711
712 /**
713 Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
714
715 This member function programs the specified PCI root bridge to decode the bus range that is
716 specified by the input parameter Configuration.
717 The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
718
719 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
720 @param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed
721 @param[in] Configuration The pointer to the PCI bus resource descriptor
722
723 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
724 @retval EFI_INVALID_PARAMETER Configuration is NULL.
725 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
726 @retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.
727 @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than
728 bus descriptors.
729 @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.
730 @retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.
731 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.
732 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
733 @retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.
734
735 **/
736 EFI_STATUS
737 EFIAPI
738 SetBusNumbers(
739 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
740 IN EFI_HANDLE RootBridgeHandle,
741 IN VOID *Configuration
742 )
743 {
744 LIST_ENTRY *List;
745 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
746 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
747 UINT8 *Ptr;
748 UINTN BusStart;
749 UINTN BusEnd;
750 UINTN BusLen;
751
752 if (Configuration == NULL) {
753 return EFI_INVALID_PARAMETER;
754 }
755
756 Ptr = Configuration;
757
758 //
759 // Check the Configuration is valid
760 //
761 if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
762 return EFI_INVALID_PARAMETER;
763 }
764
765 if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
766 return EFI_INVALID_PARAMETER;
767 }
768
769 Ptr += sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
770 if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {
771 return EFI_INVALID_PARAMETER;
772 }
773
774 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
775 List = HostBridgeInstance->Head.ForwardLink;
776
777 Ptr = Configuration;
778
779 while (List != &HostBridgeInstance->Head) {
780 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
781 if (RootBridgeHandle == RootBridgeInstance->Handle) {
782 BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;
783 BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
784 BusEnd = BusStart + BusLen - 1;
785
786 if (BusStart > BusEnd) {
787 return EFI_INVALID_PARAMETER;
788 }
789
790 if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {
791 return EFI_INVALID_PARAMETER;
792 }
793
794 //
795 // Update the Bus Range
796 //
797 RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;
798 RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
799 RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
800
801 //
802 // Program the Root Bridge Hardware
803 //
804
805 return EFI_SUCCESS;
806 }
807
808 List = List->ForwardLink;
809 }
810
811 return EFI_INVALID_PARAMETER;
812 }
813
814
815 /**
816 Submits the I/O and memory resource requirements for the specified PCI root bridge.
817
818 This function is used to submit all the I/O and memory resources that are required by the specified
819 PCI root bridge. The input parameter Configuration is used to specify the following:
820 - The various types of resources that are required
821 - The associated lengths in terms of ACPI 2.0 resource descriptor format
822
823 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
824 @param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.
825 @param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.
826
827 @retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.
828 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
829 @retval EFI_INVALID_PARAMETER Configuration is NULL.
830 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
831 @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are
832 not supported by this PCI root bridge. This error will happen if the caller
833 did not combine resources according to Attributes that were returned by
834 GetAllocAttributes().
835 @retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.
836 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.
837 @retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.
838
839 **/
840 EFI_STATUS
841 EFIAPI
842 SubmitResources(
843 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
844 IN EFI_HANDLE RootBridgeHandle,
845 IN VOID *Configuration
846 )
847 {
848 LIST_ENTRY *List;
849 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
850 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
851 UINT8 *Temp;
852 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
853 UINT64 AddrLen;
854 UINT64 Alignment;
855
856 //
857 // Check the input parameter: Configuration
858 //
859 if (Configuration == NULL) {
860 return EFI_INVALID_PARAMETER;
861 }
862
863 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
864 List = HostBridgeInstance->Head.ForwardLink;
865
866 Temp = (UINT8 *)Configuration;
867 while ( *Temp == 0x8A) {
868 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
869 }
870 if (*Temp != 0x79) {
871 return EFI_INVALID_PARAMETER;
872 }
873
874 Temp = (UINT8 *)Configuration;
875 while (List != &HostBridgeInstance->Head) {
876 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
877 if (RootBridgeHandle == RootBridgeInstance->Handle) {
878 while ( *Temp == 0x8A) {
879 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
880
881 //
882 // Check Address Length
883 //
884 if (Ptr->AddrLen > 0xffffffff) {
885 return EFI_INVALID_PARAMETER;
886 }
887
888 //
889 // Check address range alignment
890 //
891 if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {
892 return EFI_INVALID_PARAMETER;
893 }
894
895 switch (Ptr->ResType) {
896
897 case 0:
898
899 //
900 // Check invalid Address Sapce Granularity
901 //
902 if (Ptr->AddrSpaceGranularity != 32) {
903 return EFI_INVALID_PARAMETER;
904 }
905
906 //
907 // check the memory resource request is supported by PCI root bridge
908 //
909 if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&
910 Ptr->SpecificFlag == 0x06) {
911 return EFI_INVALID_PARAMETER;
912 }
913
914 AddrLen = Ptr->AddrLen;
915 Alignment = Ptr->AddrRangeMax;
916 if (Ptr->AddrSpaceGranularity == 32) {
917 if (Ptr->SpecificFlag == 0x06) {
918 //
919 // Apply from GCD
920 //
921 RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;
922 } else {
923 RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
924 RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;
925 RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;
926 HostBridgeInstance->ResourceSubmited = TRUE;
927 }
928 }
929
930 if (Ptr->AddrSpaceGranularity == 64) {
931 if (Ptr->SpecificFlag == 0x06) {
932 RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;
933 } else {
934 RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;
935 }
936 }
937 break;
938
939 case 1:
940 AddrLen = (UINTN) Ptr->AddrLen;
941 Alignment = (UINTN) Ptr->AddrRangeMax;
942 RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;
943 RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
944 RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;
945 HostBridgeInstance->ResourceSubmited = TRUE;
946 break;
947
948 default:
949 break;
950 };
951
952 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
953 }
954
955 return EFI_SUCCESS;
956 }
957
958 List = List->ForwardLink;
959 }
960
961 return EFI_INVALID_PARAMETER;
962 }
963
964 /**
965 Returns the proposed resource settings for the specified PCI root bridge.
966
967 This member function returns the proposed resource settings for the specified PCI root bridge. The
968 proposed resource settings are prepared when NotifyPhase() is called with a Phase of
969 EfiPciHostBridgeAllocateResources. The output parameter Configuration
970 specifies the following:
971 - The various types of resources, excluding bus resources, that are allocated
972 - The associated lengths in terms of ACPI 2.0 resource descriptor format
973
974 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
975 @param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
976 @param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.
977
978 @retval EFI_SUCCESS The requested parameters were returned.
979 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
980 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
981 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
982
983 **/
984 EFI_STATUS
985 EFIAPI
986 GetProposedResources(
987 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
988 IN EFI_HANDLE RootBridgeHandle,
989 OUT VOID **Configuration
990 )
991 {
992 LIST_ENTRY *List;
993 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
994 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
995 UINTN Index;
996 UINTN Number;
997 VOID *Buffer;
998 UINT8 *Temp;
999 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
1000 UINT64 ResStatus;
1001
1002 Buffer = NULL;
1003 Number = 0;
1004 //
1005 // Get the Host Bridge Instance from the resource allocation protocol
1006 //
1007 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1008 List = HostBridgeInstance->Head.ForwardLink;
1009
1010 //
1011 // Enumerate the root bridges in this host bridge
1012 //
1013 while (List != &HostBridgeInstance->Head) {
1014 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1015 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1016 for (Index = 0; Index < TypeBus; Index ++) {
1017 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1018 Number ++;
1019 }
1020 }
1021
1022 if (Number == 0) {
1023 return EFI_INVALID_PARAMETER;
1024 }
1025
1026 Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
1027 if (Buffer == NULL) {
1028 return EFI_OUT_OF_RESOURCES;
1029 }
1030
1031 Temp = Buffer;
1032 for (Index = 0; Index < TypeBus; Index ++) {
1033 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1034 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
1035 ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
1036
1037 switch (Index) {
1038
1039 case TypeIo:
1040 //
1041 // Io
1042 //
1043 Ptr->Desc = 0x8A;
1044 Ptr->Len = 0x2B;
1045 Ptr->ResType = 1;
1046 Ptr->GenFlag = 0;
1047 Ptr->SpecificFlag = 0;
1048 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1049 Ptr->AddrRangeMax = 0;
1050 Ptr->AddrTranslationOffset = \
1051 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1052 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1053 break;
1054
1055 case TypeMem32:
1056 //
1057 // Memory 32
1058 //
1059 Ptr->Desc = 0x8A;
1060 Ptr->Len = 0x2B;
1061 Ptr->ResType = 0;
1062 Ptr->GenFlag = 0;
1063 Ptr->SpecificFlag = 0;
1064 Ptr->AddrSpaceGranularity = 32;
1065 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1066 Ptr->AddrRangeMax = 0;
1067 Ptr->AddrTranslationOffset = \
1068 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1069 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1070 break;
1071
1072 case TypePMem32:
1073 //
1074 // Prefetch memory 32
1075 //
1076 Ptr->Desc = 0x8A;
1077 Ptr->Len = 0x2B;
1078 Ptr->ResType = 0;
1079 Ptr->GenFlag = 0;
1080 Ptr->SpecificFlag = 6;
1081 Ptr->AddrSpaceGranularity = 32;
1082 Ptr->AddrRangeMin = 0;
1083 Ptr->AddrRangeMax = 0;
1084 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1085 Ptr->AddrLen = 0;
1086 break;
1087
1088 case TypeMem64:
1089 //
1090 // Memory 64
1091 //
1092 Ptr->Desc = 0x8A;
1093 Ptr->Len = 0x2B;
1094 Ptr->ResType = 0;
1095 Ptr->GenFlag = 0;
1096 Ptr->SpecificFlag = 0;
1097 Ptr->AddrSpaceGranularity = 64;
1098 Ptr->AddrRangeMin = 0;
1099 Ptr->AddrRangeMax = 0;
1100 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1101 Ptr->AddrLen = 0;
1102 break;
1103
1104 case TypePMem64:
1105 //
1106 // Prefetch memory 64
1107 //
1108 Ptr->Desc = 0x8A;
1109 Ptr->Len = 0x2B;
1110 Ptr->ResType = 0;
1111 Ptr->GenFlag = 0;
1112 Ptr->SpecificFlag = 6;
1113 Ptr->AddrSpaceGranularity = 64;
1114 Ptr->AddrRangeMin = 0;
1115 Ptr->AddrRangeMax = 0;
1116 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1117 Ptr->AddrLen = 0;
1118 break;
1119 };
1120
1121 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
1122 }
1123 }
1124
1125 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
1126 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
1127
1128 *Configuration = Buffer;
1129
1130 return EFI_SUCCESS;
1131 }
1132
1133 List = List->ForwardLink;
1134 }
1135
1136 return EFI_INVALID_PARAMETER;
1137 }
1138
1139 /**
1140 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
1141 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
1142 PCI controllers before enumeration.
1143
1144 This function is called during the PCI enumeration process. No specific action is expected from this
1145 member function. It allows the host bridge driver to preinitialize individual PCI controllers before
1146 enumeration.
1147
1148 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1149 @param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in
1150 InstallProtocolInterface() in the UEFI 2.0 Specification.
1151 @param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the
1152 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
1153 configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
1154 the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
1155 @param Phase The phase of the PCI device enumeration.
1156
1157 @retval EFI_SUCCESS The requested parameters were returned.
1158 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1159 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
1160 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
1161 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
1162 not enumerate this device, including its child devices if it is a PCI-to-PCI
1163 bridge.
1164
1165 **/
1166 EFI_STATUS
1167 EFIAPI
1168 PreprocessController (
1169 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
1170 IN EFI_HANDLE RootBridgeHandle,
1171 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
1172 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
1173 )
1174 {
1175 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1176 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1177 LIST_ENTRY *List;
1178
1179 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1180 List = HostBridgeInstance->Head.ForwardLink;
1181
1182 //
1183 // Enumerate the root bridges in this host bridge
1184 //
1185 while (List != &HostBridgeInstance->Head) {
1186 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1187 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1188 break;
1189 }
1190 List = List->ForwardLink;
1191 }
1192 if (List == &HostBridgeInstance->Head) {
1193 return EFI_INVALID_PARAMETER;
1194 }
1195
1196 if ((UINT32)Phase > EfiPciBeforeResourceCollection) {
1197 return EFI_INVALID_PARAMETER;
1198 }
1199
1200 return EFI_SUCCESS;
1201 }
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