PerformancePkg/Library/DxeTscTimerLib/DxeTscTimerLib.c

   1 /** @file
   2   A Dxe Timer Library implementation which uses the Time Stamp Counter in the processor.
   3
   4   For Pentium 4 processors, Intel Xeon processors (family [0FH], models [03H and higher]);
   5     for Intel Core Solo and Intel Core Duo processors (family [06H], model [0EH]);
   6     for the Intel Xeon processor 5100 series and Intel Core 2 Duo processors (family [06H], model [0FH]);
   7     for Intel Core 2 and Intel Xeon processors (family [06H], display_model [17H]);
   8     for Intel Atom processors (family [06H], display_model [1CH]):
   9   the time-stamp counter increments at a constant rate.
  10   That rate may be set by the maximum core-clock to bus-clock ratio of the processor or may be set by
  11   the maximum resolved frequency at which the processor is booted. The maximum resolved frequency may
  12   differ from the maximum qualified frequency of the processor.
  13
  14   The specific processor configuration determines the behavior. Constant TSC behavior ensures that the
  15   duration of each clock tick is uniform and supports the use of the TSC as a wall clock timer even if
  16   the processor core changes frequency. This is the architectural behavior moving forward.
  17
  18   A Processor's support for invariant TSC is indicated by CPUID.0x80000007.EDX[8].
  19
  20   Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
  21   This program and the accompanying materials
  22   are licensed and made available under the terms and conditions of the BSD License
  23   which accompanies this distribution. The full text of the license may be found at
  24   http://opensource.org/licenses/bsd-license.php
  25
  26   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  27   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  28
  29 **/
  30
  31 #include <PiDxe.h>
  32 #include <Ich/GenericIch.h>
  33
  34 #include <Library/UefiBootServicesTableLib.h>
  35 #include <Library/TimerLib.h>
  36 #include <Library/BaseLib.h>
  37 #include <Library/IoLib.h>
  38 #include <Library/PciLib.h>
  39 #include <Library/PcdLib.h>
  40 #include <Library/UefiLib.h>
  41 #include <Library/DebugLib.h>
  42
  43 #include <Guid/TscFrequency.h>
  44
  45 UINT64 mTscFrequency;
  46
  47 /** The constructor function determines the actual TSC frequency.
  48
  49   First, Get TSC frequency from system configuration table with TSC frequency GUID,
  50   if the table is not found, install it.
  51
  52   The TSC counting frequency is determined by comparing how far it counts
  53   during a 1ms period as determined by the ACPI timer. The ACPI timer is
  54   used because it counts at a known frequency.
  55   If ACPI I/O space not enabled, this function will enable it. Then the
  56   TSC is sampled, followed by waiting for 3579 clocks of the ACPI timer, or 1ms.
  57   The TSC is then sampled again. The difference multiplied by 1000 is the TSC
  58   frequency. There will be a small error because of the overhead of reading
  59   the ACPI timer. An attempt is made to determine and compensate for this error.
  60   This function will always return EFI_SUCCESS.
  61
  62   @param  ImageHandle       The firmware allocated handle for the EFI image.
  63   @param  SystemTable       A pointer to the EFI System Table.
  64
  65   @retval EFI_SUCCESS   The constructor always returns EFI_SUCCESS.
  66
  67 **/
  68 EFI_STATUS
  69 EFIAPI
  70 DxeTscTimerLibConstructor (
  71   IN EFI_HANDLE        ImageHandle,
  72   IN EFI_SYSTEM_TABLE  *SystemTable
  73   )
  74 {
  75   EFI_STATUS  Status;
  76   UINT64      *TscFrequency;
  77   UINT64      StartTSC;
  78   UINT64      EndTSC;
  79   UINT32      TimerAddr;
  80   UINT32      Ticks;
  81
  82   //
  83   // Get TSC frequency from system configuration table with TSC frequency GUID.
  84   //
  85   Status = EfiGetSystemConfigurationTable (&gEfiTscFrequencyGuid, (VOID **) &TscFrequency);
  86   if (Status == EFI_SUCCESS) {
  87     mTscFrequency = *TscFrequency;
  88     return EFI_SUCCESS;
  89   }
  90
  91   //
  92   // TSC frequency GUID system configuration table is not found, install it.
  93   //
  94
  95   //
  96   // If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.
  97   //
  98   if ((PciRead8 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_CNT)) & B_ICH_LPC_ACPI_CNT_ACPI_EN) == 0) {
  99     PciWrite16 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_BASE), PcdGet16 (PcdPerfPkgAcpiIoPortBaseAddress));
 100     PciOr8 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_CNT), B_ICH_LPC_ACPI_CNT_ACPI_EN);
 101   }
 102
 103   //
 104   // ACPI I/O space should be enabled now, locate the ACPI Timer.
 105   // ACPI I/O base address maybe have be initialized by other driver with different value,
 106   // So get it from PCI space directly.
 107   //
 108   TimerAddr = ((PciRead16 (PCI_ICH_LPC_ADDRESS (R_ICH_LPC_ACPI_BASE))) & B_ICH_LPC_ACPI_BASE_BAR) + R_ACPI_PM1_TMR;
 109   Ticks    = IoRead32 (TimerAddr) + (3579);   // Set Ticks to 1ms in the future
 110   StartTSC = AsmReadTsc();                    // Get base value for the TSC
 111   //
 112   // Wait until the ACPI timer has counted 1ms.
 113   // Timer wrap-arounds are handled correctly by this function.
 114   // When the current ACPI timer value is greater than 'Ticks', the while loop will exit.
 115   //
 116   while (((Ticks - IoRead32 (TimerAddr)) & BIT23) == 0) {
 117     CpuPause();
 118   }
 119   EndTSC = AsmReadTsc();    // TSC value 1ms later
 120
 121   Status = gBS->AllocatePool (EfiBootServicesData, sizeof (UINT64), &TscFrequency);
 122   ASSERT_EFI_ERROR (Status);
 123
 124   *TscFrequency = MultU64x32 (
 125                     (EndTSC - StartTSC),      // Number of TSC counts in 1ms
 126                     1000                      // Number of ms in a second
 127                   );
 128   //
 129   // TscFrequency now points to the number of TSC counts per second, install system configuration table for it.
 130   //
 131   gBS->InstallConfigurationTable (&gEfiTscFrequencyGuid, TscFrequency);
 132
 133   mTscFrequency = *TscFrequency;
 134   return EFI_SUCCESS;
 135 }
 136
 137 /**  Stalls the CPU for at least the given number of ticks.
 138
 139   Stalls the CPU for at least the given number of ticks. It's invoked by
 140   MicroSecondDelay() and NanoSecondDelay().
 141
 142   @param[in]  Delay     A period of time to delay in ticks.
 143
 144 **/
 145 VOID
 146 InternalX86Delay (
 147   IN      UINT64                    Delay
 148   )
 149 {
 150   UINT64                             Ticks;
 151
 152   //
 153   // The target timer count is calculated here
 154   //
 155   Ticks = AsmReadTsc() + Delay;
 156
 157   //
 158   // Wait until time out
 159   // Timer wrap-arounds are NOT handled correctly by this function.
 160   // Thus, this function must be called within 10 years of reset since
 161   // Intel guarantees a minimum of 10 years before the TSC wraps.
 162   //
 163   while (AsmReadTsc() <= Ticks) CpuPause();
 164 }
 165
 166 /**  Stalls the CPU for at least the specified number of MicroSeconds.
 167
 168   @param[in]  MicroSeconds  The minimum number of microseconds to delay.
 169
 170   @return The value of MicroSeconds input.
 171
 172 **/
 173 UINTN
 174 EFIAPI
 175 MicroSecondDelay (
 176   IN      UINTN                     MicroSeconds
 177   )
 178 {
 179   InternalX86Delay (
 180     DivU64x32 (
 181       MultU64x64 (
 182         mTscFrequency,
 183         MicroSeconds
 184       ),
 185       1000000u
 186     )
 187   );
 188   return MicroSeconds;
 189 }
 190
 191 /**  Stalls the CPU for at least the specified number of NanoSeconds.
 192
 193   @param[in]  NanoSeconds The minimum number of nanoseconds to delay.
 194
 195   @return The value of NanoSeconds input.
 196
 197 **/
 198 UINTN
 199 EFIAPI
 200 NanoSecondDelay (
 201   IN      UINTN                     NanoSeconds
 202   )
 203 {
 204   InternalX86Delay (
 205     DivU64x32 (
 206       MultU64x32 (
 207         mTscFrequency,
 208         (UINT32)NanoSeconds
 209       ),
 210     1000000000u
 211     )
 212   );
 213   return NanoSeconds;
 214 }
 215
 216 /**  Retrieves the current value of the 64-bit free running Time-Stamp counter.
 217
 218   The time-stamp counter (as implemented in the P6 family, Pentium, Pentium M,
 219   Pentium 4, Intel Xeon, Intel Core Solo and Intel Core Duo processors and
 220   later processors) is a 64-bit counter that is set to 0 following a RESET of
 221   the processor.  Following a RESET, the counter increments even when the
 222   processor is halted by the HLT instruction or the external STPCLK# pin. Note
 223   that the assertion of the external DPSLP# pin may cause the time-stamp
 224   counter to stop.
 225
 226   The properties of the counter can be retrieved by the
 227   GetPerformanceCounterProperties() function.
 228
 229   @return The current value of the free running performance counter.
 230
 231 **/
 232 UINT64
 233 EFIAPI
 234 GetPerformanceCounter (
 235   VOID
 236   )
 237 {
 238   return AsmReadTsc();
 239 }
 240
 241 /**  Retrieves the 64-bit frequency in Hz and the range of performance counter
 242   values.
 243
 244   If StartValue is not NULL, then the value that the performance counter starts
 245   with, 0x0, is returned in StartValue. If EndValue is not NULL, then the value
 246   that the performance counter end with, 0xFFFFFFFFFFFFFFFF, is returned in
 247   EndValue.
 248
 249   The 64-bit frequency of the performance counter, in Hz, is always returned.
 250   To determine average processor clock frequency, Intel recommends the use of
 251   EMON logic to count processor core clocks over the period of time for which
 252   the average is required.
 253
 254
 255   @param[out]   StartValue  Pointer to where the performance counter's starting value is saved, or NULL.
 256   @param[out]   EndValue    Pointer to where the performance counter's ending value is saved, or NULL.
 257
 258   @return The frequency in Hz.
 259
 260 **/
 261 UINT64
 262 EFIAPI
 263 GetPerformanceCounterProperties (
 264   OUT      UINT64                    *StartValue,  OPTIONAL
 265   OUT      UINT64                    *EndValue     OPTIONAL
 266   )
 267 {
 268   if (StartValue != NULL) {
 269     *StartValue = 0;
 270   }
 271   if (EndValue != NULL) {
 272     *EndValue = 0xFFFFFFFFFFFFFFFFull;
 273   }
 274
 275   return mTscFrequency;
 276 }