QuarkPlatformPkg/Acpi/AcpiTables/Dsdt/PcieExpansionPrt.asi

   1 /** @file
   2 PCI express expansion ports
   3
   4 Copyright (c) 2013-2015 Intel Corporation.
   5
   6 SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 **/
   9
  10 #ifndef PcieExpansionPrt_asi
  11 #define PcieExpansionPrt_asi
  12
  13 Device (PEX0)    // PCI express bus bridged from [Bus 0, Device 23, Function 0]
  14 {
  15     Name(_ADR,0x00170000)            // Device (HI WORD)=23, Func (LO WORD)=0
  16     Name(_PRW,Package(){0x11,0x03})  // GPE pin 0x11, Wake from S3 -- PCI PME#
  17
  18     OperationRegion (PES0,PCI_Config,0x40,0xA0)
  19     Field (PES0, AnyAcc, NoLock, Preserve)
  20     {
  21     Offset(0x1A),              // SLSTS - Slot Status Register
  22     ABP0,  1,                  // Bit 0, Attention Button Pressed
  23     ,  2,
  24     PDC0,  1,                  // Bit 3, Presence Detect Changed
  25     ,  2,
  26     PDS0,  1,                  // Bit 6, Presence Detect State
  27     , 1,
  28     LSC0,  1,                  // Bit 8, Link Active State Changed
  29     offset (0x20),
  30     , 16,
  31     PMS0, 1,                   // Bit 16, PME Status
  32     offset (0x98),
  33     , 30,
  34     HPE0, 1,                   // Bit 30, Hot Plug SCI Enable
  35     PCE0, 1,                   // Bit 31, Power Management SCI Enable.
  36     , 30,
  37     HPS0, 1,                   // Bit 30, Hot Plug SCI Status
  38     PCS0, 1,                   // Bit 31, Power Management SCI Status.
  39     }
  40
  41     Method(_PRT,0,NotSerialized) {
  42         If (LEqual(\GPIC, Zero)) // 8259 Interrupt Routing
  43         {
  44             Return (
  45                 Package()
  46                 {
  47                     // Port 0: INTA->PIRQE,INTB->PIRQF,INTC->PIRQG,INTD->PIRQH
  48                     Package() {0x0000ffff, 0, \_SB_.PCI0.LPC.LNKE, 0}, // PCI Slot 1
  49                     Package() {0x0000ffff, 1, \_SB_.PCI0.LPC.LNKF, 0},
  50                     Package() {0x0000ffff, 2, \_SB_.PCI0.LPC.LNKG, 0},
  51                     Package() {0x0000ffff, 3, \_SB_.PCI0.LPC.LNKH, 0},
  52                 }
  53             )
  54         }
  55         else    // IOAPIC Routing
  56         {
  57             Return (
  58                 Package()
  59                 {
  60                     // Port 0: INTA->PIRQE,INTB->PIRQF,INTC->PIRQG,INTD->PIRQH
  61                     Package() {0x0000ffff, 0, 0, 20}, // PCI Slot 1
  62                     Package() {0x0000ffff, 1, 0, 21},
  63                     Package() {0x0000ffff, 2, 0, 22},
  64                     Package() {0x0000ffff, 3, 0, 23},
  65                 }
  66             )
  67         }
  68     }
  69 }
  70
  71 Device (PEX1)    // PCI express bus bridged from [Bus 0, Device 23, Function 1]
  72 {
  73     Name(_ADR,0x00170001)            // Device (HI WORD)=23, Func (LO WORD)=1
  74     Name(_PRW,Package(){0x11,0x03})  // GPE pin 0x11, Wake from S3 -- PCI PME#
  75     OperationRegion (PES1,PCI_Config,0x40,0xA0)
  76     Field (PES1, AnyAcc, NoLock, Preserve)
  77     {
  78     Offset(0x1A),              // SLSTS - Slot Status Register
  79     ABP1,  1,                  // Bit 0, Attention Button Pressed
  80     ,  2,
  81     PDC1,  1,                  // Bit 3, Presence Detect Changed
  82     ,  2,
  83     PDS1,  1,                  // Bit 6, Presence Detect State
  84     , 1,
  85     LSC1,  1,                  // Bit 8, Link Active State Changed
  86     offset (0x20),
  87     , 16,
  88     PMS1, 1,                   // Bit 16, PME Status
  89     offset (0x98),
  90     , 30,
  91     HPE1, 1,                   // Bit 30, Hot Plug SCI Enable
  92     PCE1, 1,                   // Bit 31, Power Management SCI Enable.
  93     , 30,
  94     HPS1, 1,                   // Bit 30, Hot Plug SCI Status
  95     PCS1, 1,                   // Bit 31, Power Management SCI Status.
  96     }
  97     Method(_PRT,0,NotSerialized) {
  98         If (LEqual(\GPIC, Zero)) // 8259 Interrupt Routing
  99         {
 100             Return (
 101                 Package()
 102                 {
 103                     // Port 1: INTA->PIRQF,INTB->PIRQG,INTC->PIRQH,INTD->PIRQE
 104                     Package() {0x0000ffff, 0, \_SB_.PCI0.LPC.LNKF, 0},
 105                     Package() {0x0000ffff, 1, \_SB_.PCI0.LPC.LNKG, 0},
 106                     Package() {0x0000ffff, 2, \_SB_.PCI0.LPC.LNKH, 0},
 107                     Package() {0x0000ffff, 3, \_SB_.PCI0.LPC.LNKE, 0},
 108                 }
 109             )
 110         }
 111         else    // IOAPIC Routing
 112         {
 113             Return (
 114                 Package()
 115                 {
 116                     // Port 1: INTA->PIRQF,INTB->PIRQG,INTC->PIRQH,INTD->PIRQE
 117                     Package() {0x0000ffff, 0, 0, 21},
 118                     Package() {0x0000ffff, 1, 0, 22},
 119                     Package() {0x0000ffff, 2, 0, 23},
 120                     Package() {0x0000ffff, 3, 0, 20},
 121                 }
 122             )
 123         }
 124     }
 125 }
 126
 127 #endif