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1 /** @file
2 Update the _PRT and _PRW method for pci devices
3
4 Copyright (c) 2013-2015 Intel Corporation.
5
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7
8
9 **/
10 #ifndef _ACPI_PCI_UPDATE_H_
11 #define _ACPI_PCI_UPDATE_H_
12
13
14 //
15 // Primary OpCode
16 //
17 #define AML_ZERO_OP 0x00
18 #define AML_ONE_OP 0x01
19 #define AML_ALIAS_OP 0x06
20 #define AML_NAME_OP 0x08
21 #define AML_BYTE_PREFIX 0x0a
22 #define AML_WORD_PREFIX 0x0b
23 #define AML_DWORD_PREFIX 0x0c
24 #define AML_STRING_PREFIX 0x0d
25 #define AML_QWORD_PREFIX 0x0e
26 #define AML_SCOPE_OP 0x10
27 #define AML_BUFFER_OP 0x11
28 #define AML_PACKAGE_OP 0x12
29 #define AML_VAR_PACKAGE_OP 0x13
30 #define AML_METHOD_OP 0x14
31 #define AML_DUAL_NAME_PREFIX 0x2e
32 #define AML_MULTI_NAME_PREFIX 0x2f
33 #define AML_NAME_CHAR_A 0x41
34 #define AML_NAME_CHAR_B 0x42
35 #define AML_NAME_CHAR_C 0x43
36 #define AML_NAME_CHAR_D 0x44
37 #define AML_NAME_CHAR_E 0x45
38 #define AML_NAME_CHAR_F 0x46
39 #define AML_NAME_CHAR_G 0x47
40 #define AML_NAME_CHAR_H 0x48
41 #define AML_NAME_CHAR_I 0x49
42 #define AML_NAME_CHAR_J 0x4a
43 #define AML_NAME_CHAR_K 0x4b
44 #define AML_NAME_CHAR_L 0x4c
45 #define AML_NAME_CHAR_M 0x4d
46 #define AML_NAME_CHAR_N 0x4e
47 #define AML_NAME_CHAR_O 0x4f
48 #define AML_NAME_CHAR_P 0x50
49 #define AML_NAME_CHAR_Q 0x51
50 #define AML_NAME_CHAR_R 0x52
51 #define AML_NAME_CHAR_S 0x53
52 #define AML_NAME_CHAR_T 0x54
53 #define AML_NAME_CHAR_U 0x55
54 #define AML_NAME_CHAR_V 0x56
55 #define AML_NAME_CHAR_W 0x57
56 #define AML_NAME_CHAR_X 0x58
57 #define AML_NAME_CHAR_Y 0x59
58 #define AML_NAME_CHAR_Z 0x5a
59 #define AML_ROOT_CHAR 0x5c
60 #define AML_PARENT_PREFIX_CHAR 0x5e
61 #define AML_NAME_CHAR__ 0x5f
62 #define AML_LOCAL0 0x60
63 #define AML_LOCAL1 0x61
64 #define AML_LOCAL2 0x62
65 #define AML_LOCAL3 0x63
66 #define AML_LOCAL4 0x64
67 #define AML_LOCAL5 0x65
68 #define AML_LOCAL6 0x66
69 #define AML_LOCAL7 0x67
70 #define AML_ARG0 0x68
71 #define AML_ARG1 0x69
72 #define AML_ARG2 0x6a
73 #define AML_ARG3 0x6b
74 #define AML_ARG4 0x6c
75 #define AML_ARG5 0x6d
76 #define AML_ARG6 0x6e
77 #define AML_STORE_OP 0x70
78 #define AML_REF_OF_OP 0x71
79 #define AML_ADD_OP 0x72
80 #define AML_CONCAT_OP 0x73
81 #define AML_SUBTRACT_OP 0x74
82 #define AML_INCREMENT_OP 0x75
83 #define AML_DECREMENT_OP 0x76
84 #define AML_MULTIPLY_OP 0x77
85 #define AML_DIVIDE_OP 0x78
86 #define AML_SHIFT_LEFT_OP 0x79
87 #define AML_SHIFT_RIGHT_OP 0x7a
88 #define AML_AND_OP 0x7b
89 #define AML_NAND_OP 0x7c
90 #define AML_OR_OP 0x7d
91 #define AML_NOR_OP 0x7e
92 #define AML_XOR_OP 0x7f
93 #define AML_NOT_OP 0x80
94 #define AML_FIND_SET_LEFT_BIT_OP 0x81
95 #define AML_FIND_SET_RIGHT_BIT_OP 0x82
96 #define AML_DEREF_OF_OP 0x83
97 #define AML_CONCAT_RES_OP 0x84
98 #define AML_MOD_OP 0x85
99 #define AML_NOTIFY_OP 0x86
100 #define AML_SIZE_OF_OP 0x87
101 #define AML_INDEX_OP 0x88
102 #define AML_MATCH_OP 0x89
103 #define AML_CREATE_DWORD_FIELD_OP 0x8a
104 #define AML_CREATE_WORD_FIELD_OP 0x8b
105 #define AML_CREATE_BYTE_FIELD_OP 0x8c
106 #define AML_CREATE_BIT_FIELD_OP 0x8d
107 #define AML_OBJECT_TYPE_OP 0x8e
108 #define AML_CREATE_QWORD_FIELD_OP 0x8f
109 #define AML_LAND_OP 0x90
110 #define AML_LOR_OP 0x91
111 #define AML_LNOT_OP 0x92
112 #define AML_LEQUAL_OP 0x93
113 #define AML_LGREATER_OP 0x94
114 #define AML_LLESS_OP 0x95
115 #define AML_TO_BUFFER_OP 0x96
116 #define AML_TO_DEC_STRING_OP 0x97
117 #define AML_TO_HEX_STRING_OP 0x98
118 #define AML_TO_INTEGER_OP 0x99
119 #define AML_TO_STRING_OP 0x9c
120 #define AML_COPY_OBJECT_OP 0x9d
121 #define AML_MID_OP 0x9e
122 #define AML_CONTINUE_OP 0x9f
123 #define AML_IF_OP 0xa0
124 #define AML_ELSE_OP 0xa1
125 #define AML_WHILE_OP 0xa2
126 #define AML_NOOP_OP 0xa3
127 #define AML_RETURN_OP 0xa4
128 #define AML_BREAK_OP 0xa5
129 #define AML_BREAK_POINT_OP 0xcc
130 #define AML_ONES_OP 0xff
131
132 //
133 // Extended OpCode
134 //
135 #define AML_EXT_OP 0x5b
136
137 #define AML_EXT_MUTEX_OP 0x01
138 #define AML_EXT_EVENT_OP 0x02
139 #define AML_EXT_COND_REF_OF_OP 0x12
140 #define AML_EXT_CREATE_FIELD_OP 0x13
141 #define AML_EXT_LOAD_TABLE_OP 0x1f
142 #define AML_EXT_LOAD_OP 0x20
143 #define AML_EXT_STALL_OP 0x21
144 #define AML_EXT_SLEEP_OP 0x22
145 #define AML_EXT_ACQUIRE_OP 0x23
146 #define AML_EXT_SIGNAL_OP 0x24
147 #define AML_EXT_WAIT_OP 0x25
148 #define AML_EXT_RESET_OP 0x26
149 #define AML_EXT_RELEASE_OP 0x27
150 #define AML_EXT_FROM_BCD_OP 0x28
151 #define AML_EXT_TO_BCD_OP 0x29
152 #define AML_EXT_UNLOAD_OP 0x2a
153 #define AML_EXT_REVISION_OP 0x30
154 #define AML_EXT_DEBUG_OP 0x31
155 #define AML_EXT_FATAL_OP 0x32
156 #define AML_EXT_TIMER_OP 0x33
157 #define AML_EXT_REGION_OP 0x80
158 #define AML_EXT_FIELD_OP 0x81
159 #define AML_EXT_DEVICE_OP 0x82
160 #define AML_EXT_PROCESSOR_OP 0x83
161 #define AML_EXT_POWER_RES_OP 0x84
162 #define AML_EXT_THERMAL_ZONE_OP 0x85
163 #define AML_EXT_INDEX_FIELD_OP 0x86
164 #define AML_EXT_BANK_FIELD_OP 0x87
165 #define AML_EXT_DATA_REGION_OP 0x88
166
167 #pragma pack(1)
168
169 typedef struct {
170 UINT32 BridgeAddress;
171 UINT32 DeviceAddress;
172 UINT8 INTA[2]; // the first member record the 8259 link, the second member record the io apic irq number
173 UINT8 INTB[2];
174 UINT8 INTC[2];
175 UINT8 INTD[2];
176
177 UINT8 GPEPin;
178 UINT8 SxNum;
179 } PCI_DEVICE_INFO;
180
181 #pragma pack()
182
183 #define PCI_DEVICE_INFO_MAX_NUM 50
184 #define CURRENT_PCI_DEVICE_NUM 13
185
186 #define PIRQ_LINKA 1
187 #define PIRQ_LINKB 2
188 #define PIRQ_LINKC 3
189 #define PIRQ_LINKD 4
190 #define PIRQ_LINKE 5
191 #define PIRQ_LINKF 6
192 #define PIRQ_LINKG 7
193 #define PIRQ_LINKH 8
194 #define PIRQ_INVALID 0xFF
195
196 typedef struct _PCI_DEVICE_SETTING{
197 UINT8 PciDeviceInfoNumber;
198 PCI_DEVICE_INFO PciDeviceInfo[PCI_DEVICE_INFO_MAX_NUM];
199 }PCI_DEVICE_SETTING;
200
201 typedef struct _AML_BYTE_ENCODING AML_BYTE_ENCODING;
202
203 //
204 // AML Handle Entry definition.
205 //
206 // Signature must be set to EFI_AML_HANDLE_SIGNATURE or EFI_AML_ROOT_HANDLE_SIGNATURE
207 // Buffer is the ACPI node buffer pointer, the first/second bytes are opcode.
208 // This buffer should not be freed.
209 // Size is the total size of this ACPI node buffer.
210 //
211 typedef struct {
212 UINT32 Signature;
213 UINT8 *Buffer;
214 UINTN Size;
215 AML_BYTE_ENCODING *AmlByteEncoding;
216 BOOLEAN Modified;
217 } EFI_AML_HANDLE;
218
219 typedef UINT32 AML_OP_PARSE_INDEX;
220
221 typedef UINT32 AML_OP_PARSE_FORMAT;
222
223 typedef UINT32 AML_OP_ATTRIBUTE;
224
225 struct _AML_BYTE_ENCODING {
226 UINT8 OpCode;
227 UINT8 SubOpCode;
228 AML_OP_PARSE_INDEX MaxIndex;
229 AML_OP_PARSE_FORMAT Format[6];
230 AML_OP_ATTRIBUTE Attribute;
231 };
232
233
234 //
235 // Check device info fucntion prototype
236 //
237 typedef
238 BOOLEAN
239 (* CHECK_HANDLE_INFO) (
240 IN EFI_ACPI_SDT_PROTOCOL *AcpiSdt,
241 IN EFI_ACPI_HANDLE CheckHandle,
242 IN VOID *Context
243 );
244
245 extern EFI_ACPI_HANDLE mDsdtHandle;
246 extern EFI_ACPI_SDT_PROTOCOL *mAcpiSdt;
247
248 /**
249 Init Pci Device Structure
250
251 @param mConfigData - Pointer of Pci Device information Structure
252
253 **/
254 VOID
255 InitPciDeviceInfoStructure (
256 PCI_DEVICE_SETTING *mConfigData
257 );
258 /**
259 update pci routing information in acpi table based on pcd settings
260
261 @param AcpiSdt Pointer to Acpi SDT protocol
262 @param DsdtHandle ACPI root handle
263 @param PciDeviceInfo Pointer to PCI_DEVICE_INFO
264
265 **/
266 EFI_STATUS
267 SdtUpdatePciRouting (
268 IN EFI_ACPI_SDT_PROTOCOL *AcpiSdt,
269 IN EFI_ACPI_HANDLE DsdtHandle,
270 IN PCI_DEVICE_INFO *PciDeviceInfo
271 );
272
273
274 /**
275 update power resource wake up information in acpi table based on pcd settings
276
277 @param AcpiSdt Pointer to Acpi SDT protocol
278 @param DsdtHandle ACPI root handle
279 @param PciDeviceInfo Pointer to PCI_DEVICE_INFO
280
281 **/
282 EFI_STATUS
283 SdtUpdatePowerWake (
284 IN EFI_ACPI_SDT_PROTOCOL *AcpiSdt,
285 IN EFI_ACPI_HANDLE DsdtHandle,
286 IN PCI_DEVICE_INFO *PciDeviceInfo
287 );
288
289 /**
290 Get the root bridge handle by scanning the acpi table
291
292 @param AcpiSdt Pointer to Acpi SDT protocol
293 @param DsdtHandle ACPI root handle
294
295 @retval EFI_ACPI_HANDLE the handle of the root bridge
296 **/
297 EFI_ACPI_HANDLE
298 SdtGetRootBridgeHandle (
299 IN EFI_ACPI_SDT_PROTOCOL *AcpiSdt,
300 IN EFI_ACPI_HANDLE DsdtHandle
301 );
302
303 /**
304 Check input Pci device info is changed from the default values
305 @param PciDeviceInfo Pointer to PCI_DEVICE_INFO
306 @param UpdatePRT Pointer to BOOLEAN
307 @param UpdatePRW Pointer to BOOLEAN
308
309 **/
310 VOID
311 SdtCheckPciDeviceInfoChanged (
312 IN PCI_DEVICE_INFO *PciDeviceInfo,
313 IN BOOLEAN *UpdatePRT,
314 IN BOOLEAN *UpdatePRW
315 );
316 #endif