QuarkPlatformPkg/Include/Platform.h

   1 /** @file
   2 Quark platform specific information.
   3
   4 Copyright (c) 2013 Intel Corporation.
   5
   6 SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8
   9 **/
  10 #include "Uefi.h"
  11
  12 #ifndef __PLATFORM_H__
  13 #define __PLATFORM_H__
  14
  15 //
  16 // Constant definition
  17 //
  18 #define MAX_SMRAM_RANGES                    4
  19 #define MAX_NODE                            1
  20
  21 #define QUARK_STAGE1_IMAGE_TYPE_MASK      0xF0
  22 #define QUARK_STAGE1_BOOT_IMAGE_TYPE      0x00  // Stage1 Boot images 0x00 -> 0x0F.
  23 #define QUARK_STAGE1_RECOVERY_IMAGE_TYPE  0x10  // Stage1 Recovery images 0x10 -> 0x1F.
  24
  25 #define QUARK_BOOTROM_BASE_ADDRESS        0xFFFE0000  // Base address of Quark ROM in memory map.
  26 #define QUARK_BOOTROM_SIZE_BYTES          0x20000     // Quark ROM is 128KB.
  27 #define SMM_DEFAULT_SMBASE                  0x30000     // Default SMBASE address.
  28 #define SMM_DEFAULT_SMBASE_SIZE_BYTES       0x10000     // Size in bytes of default SMRAM.
  29
  30 //
  31 // Gpio to be used to assert / deassert PCI express PERST# signal.
  32 //
  33 #define PCIEXP_PERST_RESUMEWELL_GPIO        3
  34
  35 //
  36 // Minimum time in microseconds for assertion of PERST# signal.
  37 //
  38 #define PCIEXP_PERST_MIN_ASSERT_US          100
  39
  40 //
  41 // Microsecond delay post issueing common lane reset.
  42 //
  43 #define PCIEXP_DELAY_US_POST_CMNRESET_RESET 1
  44
  45 //
  46 // Microsecond delay to wait for PLL to lock.
  47 //
  48 #define PCIEXP_DELAY_US_WAIT_PLL_LOCK       80
  49
  50 //
  51 // Microsecond delay post issueing sideband interface reset.
  52 //
  53 #define PCIEXP_DELAY_US_POST_SBI_RESET      20
  54
  55 //
  56 // Microsecond delay post deasserting PERST#.
  57 //
  58 #define PCIEXP_DELAY_US_POST_PERST_DEASSERT 10
  59
  60 //
  61 // Catastrophic Trip point in degrees Celsius for this platform.
  62 //
  63 #define PLATFORM_CATASTROPHIC_TRIP_CELSIUS  105
  64
  65 //
  66 // Platform flash update LED common definitions.
  67 //
  68 #define PLATFORM_FLASH_UPDATE_LED_TOGGLE_COUNT   7
  69 #define PLATFORM_FLASH_UPDATE_LED_TOGGLE_DELTA   (1000 * 1000)  // In Microseconds for EFI_STALL.
  70
  71 //
  72 // This structure stores the base and size of the ACPI reserved memory used when
  73 // resuming from S3.  This region must be allocated by the platform code.
  74 //
  75 typedef struct {
  76   UINT32  AcpiReservedMemoryBase;
  77   UINT32  AcpiReservedMemorySize;
  78   UINT32  SystemMemoryLength;
  79 } RESERVED_ACPI_S3_RANGE;
  80
  81 #define RESERVED_ACPI_S3_RANGE_OFFSET (EFI_PAGE_SIZE - sizeof (RESERVED_ACPI_S3_RANGE))
  82
  83 //
  84 // Define valid platform types.
  85 // First add value before TypePlatformMax in EFI_PLATFORM_TYPE definition
  86 // and then add string description to end of EFI_PLATFORM_TYPE_NAME_TABLE_DEFINITION.
  87 // Value shown for supported platforms to help sanity checking with build tools
  88 // and ACPI method usage.
  89 //
  90 typedef enum {
  91   TypeUnknown = 0,      // !!! SHOULD BE THE FIRST ENTRY !!!
  92   QuarkEmulation = 1,
  93   ClantonPeakSVP = 2,
  94   KipsBay = 3,
  95   CrossHill = 4,
  96   ClantonHill = 5,
  97   Galileo = 6,
  98   TypePlatformRsv7 = 7,
  99   GalileoGen2 = 8,
 100   TypePlatformMax       // !!! SHOULD BE THE LAST ENTRY !!!
 101 } EFI_PLATFORM_TYPE;
 102
 103 #define EFI_PLATFORM_TYPE_NAME_TABLE_DEFINITION \
 104   L"TypeUnknown",\
 105   L"QuarkEmulation",\
 106   L"ClantonPeakSVP",\
 107   L"KipsBay",\
 108   L"CrossHill",\
 109   L"ClantonHill",\
 110   L"Galileo",\
 111   L"TypePlatformRsv7",\
 112   L"GalileoGen2",\
 113
 114 typedef struct {
 115   UINT32  EntryOffset;
 116   UINT8   ImageIndex;
 117 } QUARK_EDKII_STAGE1_HEADER;
 118
 119 #endif