QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.h

   1 /** @file
   2 This code supports a the private implementation
   3 of the Legacy BIOS Platform protocol
   4
   5 Copyright (c) 2013-2015 Intel Corporation.
   6
   7 SPDX-License-Identifier: BSD-2-Clause-Patent
   8
   9
  10 **/
  11
  12 #ifndef PCI_PLATFORM_H_
  13 #define PCI_PLATFORM_H_
  14
  15 #include <IndustryStandard/Pci.h>
  16 #include <Library/PcdLib.h>
  17 //
  18 // Global variables for Option ROMs
  19 //
  20 #define NULL_ROM_FILE_GUID \
  21 { 0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }}
  22
  23 #define ONBOARD_VIDEO_OPTION_ROM_FILE_GUID \
  24 { 0x8dfae5d4, 0xb50e, 0x4c10, {0x96, 0xe6, 0xf2, 0xc2, 0x66, 0xca, 0xcb, 0xb6 }}
  25
  26 #define IDE_RAID_OPTION_ROM_FILE_GUID \
  27 { 0x3392A8E1, 0x1881, 0x4398, {0x83, 0xa6, 0x53, 0xd3, 0x87, 0xdb, 0x20, 0x20 }}
  28
  29 #define TANX_UNDI_OPTION_ROM_FILE_GUID \
  30 { 0x84c24ab0, 0x124e, 0x4aed, {0x8e, 0xfe, 0xf9, 0x1b, 0xb9, 0x73, 0x69, 0xf4 }}
  31
  32 #define PXE_UNDI_OPTION_ROM_FILE_GUID \
  33 { 0xea34cd48, 0x5fdf, 0x46f0, {0xb5, 0xfa, 0xeb, 0xe0, 0x76, 0xa4, 0xf1, 0x2c }}
  34
  35
  36 typedef struct {
  37   EFI_GUID  FileName;
  38   UINTN     Segment;
  39   UINTN     Bus;
  40   UINTN     Device;
  41   UINTN     Function;
  42   UINT16    VendorId;
  43   UINT16    DeviceId;
  44 } PCI_OPTION_ROM_TABLE;
  45
  46
  47 EFI_STATUS
  48 PhaseNotify (
  49   IN EFI_PCI_PLATFORM_PROTOCOL                        *This,
  50   IN EFI_HANDLE                                       HostBridge,
  51   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE    Phase,
  52   IN EFI_PCI_CHIPSET_EXECUTION_PHASE                  ChipsetPhase
  53   );
  54
  55
  56 EFI_STATUS
  57 PlatformPrepController (
  58   IN  EFI_PCI_PLATFORM_PROTOCOL                      *This,
  59   IN  EFI_HANDLE                                     HostBridge,
  60   IN  EFI_HANDLE                                     RootBridge,
  61   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS    PciAddress,
  62   IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE   Phase,
  63   IN  EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase
  64   );
  65
  66 EFI_STATUS
  67 GetPlatformPolicy (
  68   IN  CONST EFI_PCI_PLATFORM_PROTOCOL            *This,
  69   OUT       EFI_PCI_PLATFORM_POLICY             *PciPolicy
  70   );
  71
  72 EFI_STATUS
  73 GetPciRom (
  74   IN CONST EFI_PCI_PLATFORM_PROTOCOL            *This,
  75   IN       EFI_HANDLE                           PciHandle,
  76   OUT      VOID                               **RomImage,
  77   OUT      UINTN                              *RomSize
  78   );
  79
  80 #endif
  81
  82