QuarkPlatformPkg/Platform/Dxe/Setup/QNCRegTable.c

   1 /** @file
   2 Register initialization table for Ich.
   3
   4 Copyright (c) 2013-2015 Intel Corporation.
   5
   6 SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8
   9 **/
  10
  11
  12 #include "CommonHeader.h"
  13
  14 VOID
  15 PlatformInitQNCRegs (
  16   VOID
  17   )
  18 {
  19   //
  20   // All devices on bus 0.
  21   // Device 0:
  22   //    FNC 0: Host Bridge
  23   // Device 20:
  24   //    FNC 0: IOSF2AHB Bridge
  25   // Device 21:
  26   //    FNC 0: IOSF2AHB Bridge
  27   // Device 23:
  28   //    FNC 0: PCIe Port 0
  29   // Device 24:
  30   //    FNC 0: PCIe Port 1
  31
  32   // Device 31:
  33   //    FNC 0: PCI-LPC Bridge
  34   //
  35   S3PciWrite32 (PCI_LIB_ADDRESS (PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, PCI_FUNCTION_NUMBER_QNC_LPC, R_QNC_LPC_FWH_BIOS_DEC),
  36                 B_QNC_LPC_FWH_BIOS_DEC_F0 | B_QNC_LPC_FWH_BIOS_DEC_F8 |
  37                 B_QNC_LPC_FWH_BIOS_DEC_E0 | B_QNC_LPC_FWH_BIOS_DEC_E8 |
  38                 B_QNC_LPC_FWH_BIOS_DEC_D0 | B_QNC_LPC_FWH_BIOS_DEC_D8 |
  39                 B_QNC_LPC_FWH_BIOS_DEC_C0 | B_QNC_LPC_FWH_BIOS_DEC_C8
  40                 );
  41
  42   //
  43   // Program SCI Interrupt for IRQ9
  44   //
  45   S3PciWrite8 (PCI_LIB_ADDRESS (PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, PCI_FUNCTION_NUMBER_QNC_LPC, R_QNC_LPC_ACTL),
  46                V_QNC_LPC_ACTL_SCIS_IRQ9
  47                );
  48
  49   //
  50   // Program Quark Interrupt Route Registers
  51   //
  52   S3MmioWrite16 ((UINTN)PcdGet64(PcdRcbaMmioBaseAddress) + R_QNC_RCRB_AGENT0IR,
  53              PcdGet16(PcdQuarkAgent0IR)
  54              );
  55   S3MmioWrite16 ((UINTN)PcdGet64(PcdRcbaMmioBaseAddress) + R_QNC_RCRB_AGENT1IR,
  56              PcdGet16(PcdQuarkAgent1IR)
  57              );
  58   S3MmioWrite16 ((UINTN)PcdGet64(PcdRcbaMmioBaseAddress) + R_QNC_RCRB_AGENT2IR,
  59              PcdGet16(PcdQuarkAgent2IR)
  60              );
  61   S3MmioWrite16 ((UINTN)PcdGet64(PcdRcbaMmioBaseAddress) + R_QNC_RCRB_AGENT3IR,
  62              PcdGet16(PcdQuarkAgent3IR)
  63              );
  64
  65   //
  66   // Program SVID and SID for QNC PCI devices. In order to boost performance, we
  67   // combine two 16 bit PCI_WRITE into one 32 bit PCI_WRITE. The programmed LPC SVID
  68   // will reflect on all internal devices's SVID registers
  69   //
  70   S3PciWrite32 (PCI_LIB_ADDRESS (PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, PCI_FUNCTION_NUMBER_QNC_LPC, R_EFI_PCI_SVID),
  71                 (UINT32)(V_INTEL_VENDOR_ID + (QUARK_V_LPC_DEVICE_ID_0 << 16))
  72                 );
  73
  74   //
  75   // Write once on Element Self Description Register before OS boot
  76   //
  77   QNCMmio32And (PcdGet64(PcdRcbaMmioBaseAddress), 0x04, 0xFF00FFFF);
  78
  79   return;
  80 }