c196d21274d189596e30d8b304d754be176e5487
[mirror_edk2.git] / QuarkPlatformPkg / Quark.fdf
1 ## @file
2 # FDF file of Clanton Peak CRB platform with 32-bit DXE
3 #
4 # This package provides QuarkNcSocId platform specific modules.
5 # Copyright (c) 2013 - 2016 Intel Corporation.
6 #
7 # This program and the accompanying materials
8 # are licensed and made available under the terms and conditions of the BSD License
9 # which accompanies this distribution. The full text of the license may be found at
10 # http://opensource.org/licenses/bsd-license.php
11 #
12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 #
15 ##
16
17 ################################################################################
18 #
19 # Defines Section - statements that will be processed to create a Makefile.
20 #
21 ################################################################################
22 [Defines]
23 # Address 0x100000000 (4 GB reset address)
24 # Base Size
25 # +---------------------------+
26 # FLASH_BASE | FD.Quark: | 0x800000 (8 MB)
27 # 0xFF800000 | BaseAddress |
28 # +---------------------------+
29 #
30 # Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.
31 # 0xFF800000 + 0x400000 = 0xFFC00000.
32 #
33 # Address 0x0 (0xFF800000 for 8 MB SPI part)
34 # +---------------------------+
35 # FLASH_FV_PAYLOAD_BASE | Payload Image | FLASH_FV_PAYLOAD_SIZE
36 # 0x00400000 | | 0x00100000
37 # +---------------------------+
38 # FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE
39 # 0x00500000 | | 0x001E0000
40 # +---------------------------+
41 # NVRAM_AREA_BASE | NVRAM Area= | NVRAM_AREA_SIZE
42 # 0x006E0000 | Variable + FTW Working + |
43 # | FTW Spare |
44 # +---+-------------------+---+
45 # NVRAM_AREA_VARIABLE_BASE | | NVRAM_AREA_VARIABLE_SIZE
46 # | |
47 # +-------------------+
48 # FTW_WORKING_BASE | | FTW_WORKING_SIZE
49 # | |
50 # +-------------------+
51 # FTW_SPARE_BASE | | FTW_SPARE_SIZE
52 # | |
53 # +---+-------------------+---+
54 # RMU_BINARY_BASE | RMU Binary | RMU_BINARY_SIZE
55 # 0x00700000 | | 0x00008000
56 # +---------------------------+
57 # PLATFORM_DATA_BASE | PlatformData Binary | PLATFORM_DATA_SIZE
58 # 0x00710000 | | 0x00001000
59 # +---------------------------+
60 # FVRECOVERY_IMAGE_BASE | FVRECOVERY Image | FVRECOVERY_IMAGE_SIZE
61 # 0x720000 | | 0x000E0000
62 # +---------------------------+
63
64 #
65 # Define value used to compute FLASH regions below reset vector location just below 4GB
66 #
67 DEFINE RESET_ADDRESS = 0x100000000 # 4 GB
68
69 #
70 # Set size of FLASH to 8MB
71 #
72 DEFINE FLASH_SIZE = 0x800000
73 DEFINE FLASH_BASE = $(RESET_ADDRESS) - $(FLASH_SIZE) # The base address of the Flash Device
74
75 #
76 # Set FLASH block size to 4KB
77 #
78 DEFINE FLASH_BLOCKSIZE = 0x1000 # 4 KB
79
80 #
81 # Misc settings
82 #
83 DEFINE FLASH_BLOCKSIZE_DATA = 0x00, 0x10, 0x00, 0x00 # equivalent for DATA blocks
84
85 #
86 # Start PAYLOAD at 4MB into 8MB FLASH
87 #
88 DEFINE FLASH_FV_PAYLOAD_BASE = 0x00400000
89 DEFINE FLASH_FV_PAYLOAD_SIZE = 0x00100000
90
91 #
92 # Put FVMAIN between PAYLOAD and RMU Binary
93 #
94 DEFINE FLASH_FV_MAIN_BASE = 0x00500000
95 DEFINE FLASH_FV_MAIN_SIZE = 0x001E0000
96
97 #
98 # Place NV Storage just above Platform Data Base
99 #
100 DEFINE NVRAM_AREA_VARIABLE_BASE = 0x006E0000
101 DEFINE NVRAM_AREA_SIZE = 0x00020000
102
103 DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x0000E000
104 DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)
105 DEFINE FTW_WORKING_SIZE = 0x00002000
106 DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)
107 DEFINE FTW_SPARE_SIZE = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)
108
109 #
110 # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)
111 #
112 DEFINE RMU_BINARY_BASE = 0x00700000 # HW fixed address
113 DEFINE RMU_BINARY_SIZE = 0x00008000 # HW fixed address, so fixed size
114
115 #
116 # Platform Data Base must be 64KB above RMU
117 #
118 DEFINE VPD_BASE = 0x00708000
119 DEFINE VPD_SIZE = 0x00001000
120
121 #
122 # Place FV Recovery above NV Storage
123 #
124 DEFINE FVRECOVERY_IMAGE_SIZE = 0x000F0000
125 DEFINE FVRECOVERY_IMAGE_BASE = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)
126
127 ################################################################################
128 #
129 # FD Section
130 # The [FD] Section is made up of the definition statements and a
131 # description of what goes into the Flash Device Image. Each FD section
132 # defines one flash "device" image. A flash device image may be one of
133 # the following: Removable media bootable image (like a boot floppy
134 # image,) an Option ROM image (that would be "flashed" into an add-in
135 # card,) a System "Flash" image (that would be burned into a system's
136 # flash) or an Update ("Capsule") image that will be used to update and
137 # existing system flash.
138 #
139 ################################################################################
140 [FD.Quark]
141 BaseAddress = 0xFF800000 #The base address of the Flash Device; set to same value as FLASH_BASE.
142 Size = 0x800000 #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.
143 ErasePolarity = 1
144 BlockSize = $(FLASH_BLOCKSIZE)
145 NumBlocks = 0x800 #The number of blocks for the Flash Device.
146
147 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)
148 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE)
149
150 ################################################################################
151 #
152 # Following are lists of FD Region layout which correspond to the locations of different
153 # images within the flash device.
154 #
155 # Regions must be defined in ascending order and may not overlap.
156 #
157 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
158 # the pipe "|" character, followed by the size of the region, also in hex with the leading
159 # "0x" characters. Like:
160 # Offset|Size
161 # PcdOffsetCName|PcdSizeCName
162 # RegionType <FV, DATA, or FILE>
163 #
164 ################################################################################
165
166 ########################################################
167 # Quark Payload Image
168 ########################################################
169 $(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)
170 gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize
171 FV = PAYLOAD
172
173 ########################################################
174 # Quark FVMAIN Image (Compressed)
175 ########################################################
176 $(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)
177 gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize
178 FV = FVMAIN_COMPACT
179
180 #############################################################################
181 # Quark NVRAM Area
182 # Quark NVRAM Area contains: Variable + FTW Working + FTW Spare
183 #############################################################################
184 $(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)
185 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
186 #NV_VARIABLE_STORE
187 DATA = {
188 ## This is the EFI_FIRMWARE_VOLUME_HEADER
189 # ZeroVector []
190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
192 # FileSystemGuid: gEfiSystemNvDataFvGuid =
193 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
194 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
195 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
196 # FvLength: 0x20000
197 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
198 #Signature "_FVH" #Attributes
199 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
200 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
201 0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,
202 #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block
203 0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),
204 #Blockmap[1]: End
205 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
206 ## This is the VARIABLE_STORE_HEADER
207 !if $(SECURE_BOOT_ENABLE)
208 # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }
209 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
210 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
211 !else
212 # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
213 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
214 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
215 !endif
216 #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8
217 # This can speed up the Variable Dispatch a bit.
218 0xB8, 0xDF, 0x00, 0x00,
219 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
220 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
221 }
222
223 $(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)
224 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
225 #NV_FTW_WORKING
226 DATA = {
227 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
228 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
229 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,
230 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95,
231 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
232 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
233 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
234 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
235 }
236
237 $(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)
238 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
239 #NV_FTW_SPARE
240
241 #########################################################
242 # Quark Remote Management Unit Binary
243 #########################################################
244 $(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)
245 INF QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf
246
247 #########################################################
248 # PlatformData Binary, default for standalone is none built-in so user selects.
249 #########################################################
250 $(VPD_BASE)|$(VPD_SIZE)
251 gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress
252 FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin
253
254 #######################
255 # Quark FVRECOVERY Image
256 #######################
257 $(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)
258 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize
259 FV = FVRECOVERY
260
261 ################################################################################
262 #
263 # FV Section
264 #
265 # [FV] section is used to define what components or modules are placed within a flash
266 # device file. This section also defines order the components and modules are positioned
267 # within the image. The [FV] section consists of define statements, set statements and
268 # module statements.
269 #
270 ################################################################################
271 [FV.FVRECOVERY]
272 BlockSize = $(FLASH_BLOCKSIZE)
273 FvAlignment = 16 #FV alignment and FV attributes setting.
274 ERASE_POLARITY = 1
275 MEMORY_MAPPED = TRUE
276 STICKY_WRITE = TRUE
277 LOCK_CAP = TRUE
278 LOCK_STATUS = TRUE
279 WRITE_DISABLED_CAP = TRUE
280 WRITE_ENABLED_CAP = TRUE
281 WRITE_STATUS = TRUE
282 WRITE_LOCK_CAP = TRUE
283 WRITE_LOCK_STATUS = TRUE
284 READ_DISABLED_CAP = TRUE
285 READ_ENABLED_CAP = TRUE
286 READ_STATUS = TRUE
287 READ_LOCK_CAP = TRUE
288 READ_LOCK_STATUS = TRUE
289 FvNameGuid = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8
290
291 ################################################################################
292 #
293 # The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.
294 # Parsing tools will scan the INF file to determine the type of component or module.
295 # The component or module type is used to reference the standard rules
296 # defined elsewhere in the FDF file.
297 #
298 # The format for INF statements is:
299 # INF $(PathAndInfFileName)
300 #
301 ################################################################################
302
303 ##
304 # PEI Apriori file example, more PEIM module added later.
305 ##
306 APRIORI PEI {
307 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
308 # PlatformConfigPei should be immediately after Pcd driver.
309 INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
310 INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
311 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
312 INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
313 }
314
315 ##
316 # SEC Phase modules
317 ##
318 INF UefiCpuPkg/SecCore/SecCore.inf
319
320 INF MdeModulePkg/Core/Pei/PeiMain.inf
321
322 ##
323 # PEI Phase RAW Data files.
324 ##
325 FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {
326 SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
327 }
328
329 INF RuleOverride = NORELOC MdeModulePkg/Universal/PCD/Pei/Pcd.inf
330 INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
331 INF RuleOverride = NORELOC MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
332 INF RuleOverride = NORELOC MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
333 INF RuleOverride = NORELOC MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
334 INF RuleOverride = NORELOC MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
335 INF RuleOverride = NORELOC UefiCpuPkg/CpuMpPei/CpuMpPei.inf
336 INF RuleOverride = NORELOC MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
337 INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf
338 INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmAccessPei.inf
339 INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.inf
340 INF QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf
341 INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
342 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
343 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
344 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
345 !if $(MEASURED_BOOT_ENABLE)
346 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
347 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
348 !endif
349
350 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
351 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
352 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID
353 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
354 }
355 }
356
357 ################################################################################
358 #
359 # FV Section
360 #
361 # [FV] section is used to define what components or modules are placed within a flash
362 # device file. This section also defines order the components and modules are positioned
363 # within the image. The [FV] section consists of define statements, set statements and
364 # module statements.
365 #
366 ################################################################################
367 [FV.FVRECOVERY_COMPONENTS]
368 BlockSize = $(FLASH_BLOCKSIZE)
369 FvAlignment = 16 #FV alignment and FV attributes setting.
370 ERASE_POLARITY = 1
371 MEMORY_MAPPED = TRUE
372 STICKY_WRITE = TRUE
373 LOCK_CAP = TRUE
374 LOCK_STATUS = TRUE
375 WRITE_DISABLED_CAP = TRUE
376 WRITE_ENABLED_CAP = TRUE
377 WRITE_STATUS = TRUE
378 WRITE_LOCK_CAP = TRUE
379 WRITE_LOCK_STATUS = TRUE
380 READ_DISABLED_CAP = TRUE
381 READ_ENABLED_CAP = TRUE
382 READ_STATUS = TRUE
383 READ_LOCK_CAP = TRUE
384 READ_LOCK_STATUS = TRUE
385
386 INF QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/UsbPei.inf
387 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
388 INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/OhciPei.inf
389 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
390 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
391 INF FatPkg/FatPei/FatPei.inf
392 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
393
394 ################################################################################
395 #
396 # FV Section
397 #
398 # [FV] section is used to define what components or modules are placed within a flash
399 # device file. This section also defines order the components and modules are positioned
400 # within the image. The [FV] section consists of define statements, set statements and
401 # module statements.
402 #
403 ################################################################################
404 [FV.FVMAIN]
405 BlockSize = $(FLASH_BLOCKSIZE)
406 FvAlignment = 16
407 ERASE_POLARITY = 1
408 MEMORY_MAPPED = TRUE
409 STICKY_WRITE = TRUE
410 LOCK_CAP = TRUE
411 LOCK_STATUS = TRUE
412 WRITE_DISABLED_CAP = TRUE
413 WRITE_ENABLED_CAP = TRUE
414 WRITE_STATUS = TRUE
415 WRITE_LOCK_CAP = TRUE
416 WRITE_LOCK_STATUS = TRUE
417 READ_DISABLED_CAP = TRUE
418 READ_ENABLED_CAP = TRUE
419 READ_STATUS = TRUE
420 READ_LOCK_CAP = TRUE
421 READ_LOCK_STATUS = TRUE
422 FvNameGuid = 30D9ED01-38D2-418a-90D5-C561750BF80F
423
424 ##
425 # DXE Phase modules
426 ##
427 INF MdeModulePkg/Core/Dxe/DxeMain.inf
428 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
429
430 !if $(SOURCE_DEBUG_ENABLE)
431 INF SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf
432 !endif
433
434 #
435 # Early SoC / Platform modules
436 #
437 INF QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf
438
439 ##
440 # EDK Core modules
441 ##
442 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
443 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
444 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
445 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
446 INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf
447 INF MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf
448
449 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
450 INF UefiCpuPkg/CpuDxe/CpuDxe.inf
451 INF MdeModulePkg/Universal/Metronome/Metronome.inf
452 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
453 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
454 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
455 !if $(SECURE_BOOT_ENABLE)
456 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
457 !endif
458 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
459 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
460 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
461 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
462 INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
463 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
464 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
465 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
466
467 #
468 # Platform
469 #
470 INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
471 INF MdeModulePkg/Application/UiApp/UiApp.inf
472
473 INF QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf
474 INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSpi.inf
475 INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSmmSpi.inf
476 INF QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf
477 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
478 INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf
479 INF QuarkSocPkg/QuarkNorthCluster/S3Support/Dxe/QncS3Support.inf
480 INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiRuntime.inf
481 INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiSmm.inf
482 INF QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf
483
484 #
485 # ACPI
486 #
487 INF QuarkPlatformPkg/Platform/Dxe/SaveMemoryConfig/SaveMemoryConfig.inf
488 INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
489 #INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
490 INF QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
491 INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
492 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
493 INF QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.inf
494 INF RuleOverride = ACPITABLE QuarkPlatformPkg/Acpi/AcpiTables/AcpiTables.inf
495
496 #
497 # SMM
498 #
499 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
500 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
501 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
502 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
503 INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf
504 INF QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmDispatcher.inf
505 INF QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf
506 INF QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/SmmPowerManagement.inf
507 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
508 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
509
510 #
511 # SMBIOS
512 #
513 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
514 INF QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/SmbiosMiscDxe.inf
515 INF QuarkPlatformPkg/Platform/Dxe/MemorySubClass/MemorySubClass.inf
516
517 #
518 # PCI
519 #
520 INF QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf
521 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
522 INF QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf
523 !if $(SOURCE_DEBUG_ENABLE)
524 !else
525 INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
526 !endif
527
528 #
529 # USB
530 #
531 !if $(PERFORMANCE_ENABLE)
532 !else
533 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
534 INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf
535 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
536 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
537 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
538 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
539 !endif
540
541 #
542 # SDIO
543 #
544 !if $(PERFORMANCE_ENABLE)
545 !else
546 INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControllerDxe.inf
547 INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/SDMediaDeviceDxe.inf
548 !endif
549
550 #
551 # Console
552 #
553 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
554 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
555 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
556
557 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
558 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
559 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
560 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
561
562 #
563 # File System Modules
564 #
565 !if $(PERFORMANCE_ENABLE)
566 INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
567 !else
568 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
569 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
570 INF FatPkg/EnhancedFatDxe/Fat.inf
571 !endif
572
573 #
574 # Trusted Platform Module
575 #
576 !if $(MEASURED_BOOT_ENABLE)
577 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
578 !endif
579
580 ################################################################################
581 #
582 # FV Section
583 #
584 # [FV] section is used to define what components or modules are placed within a flash
585 # device file. This section also defines order the components and modules are positioned
586 # within the image. The [FV] section consists of define statements, set statements and
587 # module statements.
588 #
589 ################################################################################
590 [FV.FVMAIN_COMPACT]
591 FvAlignment = 16
592 ERASE_POLARITY = 1
593 MEMORY_MAPPED = TRUE
594 STICKY_WRITE = TRUE
595 LOCK_CAP = TRUE
596 LOCK_STATUS = TRUE
597 WRITE_DISABLED_CAP = TRUE
598 WRITE_ENABLED_CAP = TRUE
599 WRITE_STATUS = TRUE
600 WRITE_LOCK_CAP = TRUE
601 WRITE_LOCK_STATUS = TRUE
602 READ_DISABLED_CAP = TRUE
603 READ_ENABLED_CAP = TRUE
604 READ_STATUS = TRUE
605 READ_LOCK_CAP = TRUE
606 READ_LOCK_STATUS = TRUE
607
608 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
609 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID
610 SECTION FV_IMAGE = FVMAIN
611 }
612 }
613
614 ################################################################################
615 #
616 # FV Section
617 #
618 # [FV] section is used to define what components or modules are placed within a flash
619 # device file. This section also defines order the components and modules are positioned
620 # within the image. The [FV] section consists of define statements, set statements and
621 # module statements.
622 #
623 ################################################################################
624 [FV.PAYLOAD]
625 BlockSize = $(FLASH_BLOCKSIZE)
626 FvAlignment = 16 #FV alignment and FV attributes setting.
627 ERASE_POLARITY = 1
628 MEMORY_MAPPED = TRUE
629 STICKY_WRITE = TRUE
630 LOCK_CAP = TRUE
631 LOCK_STATUS = TRUE
632 WRITE_DISABLED_CAP = TRUE
633 WRITE_ENABLED_CAP = TRUE
634 WRITE_STATUS = TRUE
635 WRITE_LOCK_CAP = TRUE
636 WRITE_LOCK_STATUS = TRUE
637 READ_DISABLED_CAP = TRUE
638 READ_ENABLED_CAP = TRUE
639 READ_STATUS = TRUE
640 READ_LOCK_CAP = TRUE
641 READ_LOCK_STATUS = TRUE
642
643 #
644 # Shell and Applications
645 #
646 INF RuleOverride = TIANOCOMPRESSED ShellPkg/Application/Shell/Shell.inf
647 !if $(PERFORMANCE_ENABLE)
648 INF RuleOverride = TIANOCOMPRESSED PerformancePkg/Dp_App/Dp.inf
649 !endif
650
651 ################################################################################
652 #
653 # Rules are use with the [FV] section's module INF type to define
654 # how an FFS file is created for a given INF file. The following Rule are the default
655 # rules for the different module type. User can add the customized rules to define the
656 # content of the FFS file.
657 #
658 ################################################################################
659 [Rule.Common.SEC]
660 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
661 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
662 RAW BIN Align = 16 |.com
663 }
664
665 [Rule.Common.PEI_CORE]
666 FILE PEI_CORE = $(NAMED_GUID) {
667 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
668 UI STRING="$(MODULE_NAME)" Optional
669 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
670 }
671
672 [Rule.Common.PEIM.NORELOC]
673 FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED {
674 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
675 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
676 UI STRING="$(MODULE_NAME)" Optional
677 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
678 }
679
680 [Rule.Common.PEIM]
681 FILE PEIM = $(NAMED_GUID) {
682 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
683 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
684 UI STRING="$(MODULE_NAME)" Optional
685 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
686 }
687
688 [Rule.Common.DXE_CORE]
689 FILE DXE_CORE = $(NAMED_GUID) {
690 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
691 UI STRING="$(MODULE_NAME)" Optional
692 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
693 }
694
695 [Rule.Common.UEFI_DRIVER]
696 FILE DRIVER = $(NAMED_GUID) {
697 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
698 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
699 UI STRING="$(MODULE_NAME)" Optional
700 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
701 }
702
703 [Rule.Common.DXE_DRIVER]
704 FILE DRIVER = $(NAMED_GUID) {
705 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
706 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
707 UI STRING="$(MODULE_NAME)" Optional
708 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
709 }
710
711 [Rule.Common.DXE_RUNTIME_DRIVER]
712 FILE DRIVER = $(NAMED_GUID) {
713 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
714 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
715 UI STRING="$(MODULE_NAME)" Optional
716 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
717 }
718
719 [Rule.Common.DXE_SMM_DRIVER]
720 FILE SMM = $(NAMED_GUID) {
721 SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
722 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
723 UI STRING="$(MODULE_NAME)" Optional
724 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
725 }
726
727 [Rule.Common.SMM_CORE]
728 FILE SMM_CORE = $(NAMED_GUID) {
729 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
730 UI STRING="$(MODULE_NAME)" Optional
731 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
732 }
733
734 [Rule.Common.UEFI_APPLICATION]
735 FILE APPLICATION = $(NAMED_GUID) {
736 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
737 UI STRING="$(MODULE_NAME)" Optional
738 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
739 }
740
741 [Rule.Common.UEFI_APPLICATION.TIANOCOMPRESSED]
742 FILE APPLICATION = $(NAMED_GUID) {
743 UI STRING="$(MODULE_NAME)" Optional
744 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
745 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { # TIANO COMPRESS GUID
746 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
747 }
748 }
749
750 [Rule.Common.UEFI_APPLICATION.UI]
751 FILE APPLICATION = $(NAMED_GUID) {
752 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
753 UI STRING="Enter Setup"
754 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
755 }
756
757 [Rule.Common.USER_DEFINED.ACPITABLE]
758 FILE FREEFORM = $(NAMED_GUID) {
759 RAW ACPI |.acpi
760 RAW ASL |.aml
761 }