MdePkg: introduce standalone MM entry point library implementation
[mirror_edk2.git] / QuarkPlatformPkg / QuarkMin.fdf
1 ## @file\r
2 # FDF file of Clanton Peak CRB platform with 32-bit DXE\r
3 #\r
4 # This package provides QuarkNcSocId platform specific modules.\r
5 # Copyright (c) 2013 - 2017 Intel Corporation.\r
6 #\r
7 # This program and the accompanying materials\r
8 # are licensed and made available under the terms and conditions of the BSD License\r
9 # which accompanies this distribution.  The full text of the license may be found at\r
10 # http://opensource.org/licenses/bsd-license.php\r
11 #\r
12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14 #\r
15 ##\r
16 \r
17 ################################################################################\r
18 #\r
19 # Defines Section - statements that will be processed to create a Makefile.\r
20 #\r
21 ################################################################################\r
22 [Defines]\r
23 #                  Address 0x100000000 (4 GB reset address)\r
24 #                                 Base                               Size\r
25 #                                      +---------------------------+\r
26 #                           FLASH_BASE | FD.Quark:                 | 0x800000 (8 MB)\r
27 #                           0xFF800000 | BaseAddress               |\r
28 #                                      +---------------------------+\r
29 #\r
30 # Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.\r
31 # 0xFF800000 + 0x400000 = 0xFFC00000.\r
32 #\r
33 #                          Address 0x0 (0xFF800000 for 8 MB SPI part)\r
34 #                                      +---------------------------+\r
35 #                FLASH_FV_PAYLOAD_BASE | Payload Image             | FLASH_FV_PAYLOAD_SIZE\r
36 #                           0x00400000 |                           | 0x00100000\r
37 #                                      +---------------------------+\r
38 #                   FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE\r
39 #                           0x00500000 |                           | 0x001E0000\r
40 #                                      +---------------------------+\r
41 #                      NVRAM_AREA_BASE | NVRAM Area=               | NVRAM_AREA_SIZE\r
42 #                           0x006E0000 | Variable + FTW Working +  |\r
43 #                                      | FTW Spare                 |\r
44 #                                      +---+-------------------+---+\r
45 #                 NVRAM_AREA_VARIABLE_BASE |                   | NVRAM_AREA_VARIABLE_SIZE\r
46 #                                          |                   |\r
47 #                                          +-------------------+\r
48 #                         FTW_WORKING_BASE |                   | FTW_WORKING_SIZE\r
49 #                                          |                   |\r
50 #                                          +-------------------+\r
51 #                           FTW_SPARE_BASE |                   | FTW_SPARE_SIZE\r
52 #                                          |                   |\r
53 #                                      +---+-------------------+---+\r
54 #                      RMU_BINARY_BASE | RMU Binary                | RMU_BINARY_SIZE\r
55 #                           0x00700000 |                           | 0x00008000\r
56 #                                      +---------------------------+\r
57 #                   PLATFORM_DATA_BASE | PlatformData Binary       | PLATFORM_DATA_SIZE\r
58 #                           0x00710000 |                           | 0x00001000\r
59 #                                      +---------------------------+\r
60 #                FVRECOVERY_IMAGE_BASE | FVRECOVERY Image          | FVRECOVERY_IMAGE_SIZE\r
61 #                             0x720000 |                           | 0x000E0000\r
62 #                                      +---------------------------+\r
63 \r
64   #\r
65   # Define value used to compute FLASH regions below reset vector location just below 4GB\r
66   #\r
67   DEFINE RESET_ADDRESS                           = 0x100000000       # 4 GB\r
68 \r
69   #\r
70   # Set size of FLASH to 8MB\r
71   #\r
72   DEFINE FLASH_SIZE                              = 0x800000\r
73   DEFINE FLASH_BASE                              = $(RESET_ADDRESS) - $(FLASH_SIZE)                                                      # The base address of the Flash Device\r
74 \r
75   #\r
76   # Set FLASH block size to 4KB\r
77   #\r
78   DEFINE FLASH_BLOCKSIZE                         = 0x1000            # 4 KB\r
79 \r
80   #\r
81   # Misc settings\r
82   #\r
83   DEFINE FLASH_BLOCKSIZE_DATA                    = 0x00, 0x10, 0x00, 0x00                                                                # equivalent for DATA blocks\r
84 \r
85   #\r
86   # Start PAYLOAD at 4MB into 8MB FLASH\r
87   #\r
88   DEFINE FLASH_FV_PAYLOAD_BASE                   = 0x00400000\r
89   DEFINE FLASH_FV_PAYLOAD_SIZE                   = 0x00100000\r
90 \r
91   #\r
92   # Put FVMAIN between PAYLOAD and RMU Binary\r
93   #\r
94   DEFINE FLASH_FV_MAIN_BASE                      = 0x00500000\r
95   DEFINE FLASH_FV_MAIN_SIZE                      = 0x001E0000\r
96 \r
97   #\r
98   # Place NV Storage just above Platform Data Base\r
99   #\r
100   DEFINE NVRAM_AREA_VARIABLE_BASE                = 0x006E0000\r
101   DEFINE NVRAM_AREA_SIZE                         = 0x00020000\r
102 \r
103   DEFINE NVRAM_AREA_VARIABLE_SIZE                = 0x0000E000\r
104   DEFINE FTW_WORKING_BASE                        = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)\r
105   DEFINE FTW_WORKING_SIZE                        = 0x00002000\r
106   DEFINE FTW_SPARE_BASE                          = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)\r
107   DEFINE FTW_SPARE_SIZE                          = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)\r
108 \r
109   #\r
110   # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)\r
111   #\r
112   DEFINE RMU_BINARY_BASE                         = 0x00700000  # HW fixed address\r
113   DEFINE RMU_BINARY_SIZE                         = 0x00008000  # HW fixed address, so fixed size\r
114 \r
115   #\r
116   # Platform Data Base must be 64KB above RMU\r
117   #\r
118   DEFINE VPD_BASE                                = 0x00708000\r
119   DEFINE VPD_SIZE                                = 0x00001000\r
120 \r
121   #\r
122   # Place FV Recovery above NV Storage\r
123   #\r
124   DEFINE FVRECOVERY_IMAGE_SIZE                   = 0x000F0000\r
125   DEFINE FVRECOVERY_IMAGE_BASE                   = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)\r
126 \r
127 ################################################################################\r
128 #\r
129 # FD Section\r
130 # The [FD] Section is made up of the definition statements and a\r
131 # description of what goes into  the Flash Device Image.  Each FD section\r
132 # defines one flash "device" image.  A flash device image may be one of\r
133 # the following: Removable media bootable image (like a boot floppy\r
134 # image,) an Option ROM image (that would be "flashed" into an add-in\r
135 # card,) a System "Flash"  image (that would be burned into a system's\r
136 # flash) or an Update ("Capsule") image that will be used to update and\r
137 # existing system flash.\r
138 #\r
139 ################################################################################\r
140 [FD.Quark]\r
141 BaseAddress   = 0xFF800000                   #The base address of the Flash Device; set to same value as FLASH_BASE.\r
142 Size          = 0x800000                     #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.\r
143 ErasePolarity = 1\r
144 BlockSize     = $(FLASH_BLOCKSIZE)\r
145 NumBlocks     = 0x800                        #The number of blocks for the Flash Device.\r
146 \r
147 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)\r
148 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize        = $(FLASH_SIZE)\r
149 \r
150 ################################################################################\r
151 #\r
152 # Following are lists of FD Region layout which correspond to the locations of different\r
153 # images within the flash device.\r
154 #\r
155 # Regions must be defined in ascending order and may not overlap.\r
156 #\r
157 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
158 # the pipe "|" character, followed by the size of the region, also in hex with the leading\r
159 # "0x" characters. Like:\r
160 # Offset|Size\r
161 # PcdOffsetCName|PcdSizeCName\r
162 # RegionType <FV, DATA, or FILE>\r
163 #\r
164 ################################################################################\r
165 \r
166 ########################################################\r
167 # Quark Payload Image\r
168 ########################################################\r
169 $(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)\r
170 gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize\r
171 FV = PAYLOAD\r
172 \r
173 ########################################################\r
174 # Quark FVMAIN Image (Compressed)\r
175 ########################################################\r
176 $(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)\r
177 gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize\r
178 FV = FVMAIN_COMPACT\r
179 \r
180 #############################################################################\r
181 # Quark NVRAM Area\r
182 # Quark NVRAM Area contains: Variable + FTW Working + FTW Spare\r
183 #############################################################################\r
184 $(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)\r
185 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
186 #NV_VARIABLE_STORE\r
187 DATA = {\r
188   ## This is the EFI_FIRMWARE_VOLUME_HEADER\r
189   # ZeroVector []\r
190   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
191   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
192   # FileSystemGuid: gEfiSystemNvDataFvGuid         =\r
193   #  { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
194   0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,\r
195   0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,\r
196   # FvLength: 0x20000\r
197   0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\r
198   #Signature "_FVH"       #Attributes\r
199   0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,\r
200   #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision\r
201   0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,\r
202   #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block\r
203   0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),\r
204   #Blockmap[1]: End\r
205   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
206   ## This is the VARIABLE_STORE_HEADER\r
207   !if $(SECURE_BOOT_ENABLE)\r
208     # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }\r
209     0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,\r
210     0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,\r
211   !else\r
212     #  Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}\r
213     0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,\r
214     0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,\r
215   !endif\r
216   #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8\r
217   # This can speed up the Variable Dispatch a bit.\r
218   0xB8, 0xDF, 0x00, 0x00,\r
219   #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32\r
220   0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
221 }\r
222 \r
223 $(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)\r
224 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
225 #NV_FTW_WORKING\r
226 DATA = {\r
227   # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid         =\r
228   #  { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95 }}\r
229   0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,\r
230   0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95,\r
231   # Crc:UINT32            #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved\r
232   0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,\r
233   # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0\r
234   0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
235 }\r
236 \r
237 $(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)\r
238 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
239 #NV_FTW_SPARE\r
240 \r
241 #########################################################\r
242 # Quark Remote Management Unit Binary\r
243 #########################################################\r
244 $(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)\r
245 INF  QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf\r
246 \r
247 #########################################################\r
248 # PlatformData Binary, default for standalone is none built-in so user selects.\r
249 #########################################################\r
250 $(VPD_BASE)|$(VPD_SIZE)\r
251 gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress\r
252 FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin\r
253 \r
254 #######################\r
255 # Quark FVRECOVERY Image\r
256 #######################\r
257 $(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)\r
258 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize\r
259 FV = FVRECOVERY\r
260 \r
261 ################################################################################\r
262 #\r
263 # FV Section\r
264 #\r
265 # [FV] section is used to define what components or modules are placed within a flash\r
266 # device file.  This section also defines order the components and modules are positioned\r
267 # within the image.  The [FV] section consists of define statements, set statements and\r
268 # module statements.\r
269 #\r
270 ################################################################################\r
271 [FV.FVRECOVERY]\r
272 BlockSize          = $(FLASH_BLOCKSIZE)\r
273 FvAlignment        = 16         #FV alignment and FV attributes setting.\r
274 ERASE_POLARITY     = 1\r
275 MEMORY_MAPPED      = TRUE\r
276 STICKY_WRITE       = TRUE\r
277 LOCK_CAP           = TRUE\r
278 LOCK_STATUS        = TRUE\r
279 WRITE_DISABLED_CAP = TRUE\r
280 WRITE_ENABLED_CAP  = TRUE\r
281 WRITE_STATUS       = TRUE\r
282 WRITE_LOCK_CAP     = TRUE\r
283 WRITE_LOCK_STATUS  = TRUE\r
284 READ_DISABLED_CAP  = TRUE\r
285 READ_ENABLED_CAP   = TRUE\r
286 READ_STATUS        = TRUE\r
287 READ_LOCK_CAP      = TRUE\r
288 READ_LOCK_STATUS   = TRUE\r
289 FvNameGuid         = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8\r
290 \r
291 ################################################################################\r
292 #\r
293 # The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.\r
294 # Parsing tools will scan the INF file to determine the type of component or module.\r
295 # The component or module type is used to reference the standard rules\r
296 # defined elsewhere in the FDF file.\r
297 #\r
298 # The format for INF statements is:\r
299 # INF $(PathAndInfFileName)\r
300 #\r
301 ################################################################################\r
302 \r
303 ##\r
304 #  PEI Apriori file example, more PEIM module added later.\r
305 ##\r
306 APRIORI PEI {\r
307   INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
308   # PlatformConfigPei should be immediately after Pcd driver.\r
309   INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
310   INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
311 }\r
312 \r
313 ##\r
314 #  SEC Phase modules\r
315 ##\r
316 INF  UefiCpuPkg/SecCore/SecCore.inf\r
317 \r
318 INF  MdeModulePkg/Core/Pei/PeiMain.inf\r
319 \r
320 ##\r
321 #  PEI Phase RAW Data files.\r
322 ##\r
323 FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {\r
324   SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin\r
325 }\r
326 \r
327 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
328 INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
329 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
330 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
331 INF  RuleOverride = NORELOC  QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf\r
332 INF  QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf\r
333 INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
334 INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
335 \r
336 ################################################################################\r
337 #\r
338 # FV Section\r
339 #\r
340 # [FV] section is used to define what components or modules are placed within a flash\r
341 # device file.  This section also defines order the components and modules are positioned\r
342 # within the image.  The [FV] section consists of define statements, set statements and\r
343 # module statements.\r
344 #\r
345 ################################################################################\r
346 [FV.FVMAIN]\r
347 BlockSize          = $(FLASH_BLOCKSIZE)\r
348 FvAlignment        = 16\r
349 ERASE_POLARITY     = 1\r
350 MEMORY_MAPPED      = TRUE\r
351 STICKY_WRITE       = TRUE\r
352 LOCK_CAP           = TRUE\r
353 LOCK_STATUS        = TRUE\r
354 WRITE_DISABLED_CAP = TRUE\r
355 WRITE_ENABLED_CAP  = TRUE\r
356 WRITE_STATUS       = TRUE\r
357 WRITE_LOCK_CAP     = TRUE\r
358 WRITE_LOCK_STATUS  = TRUE\r
359 READ_DISABLED_CAP  = TRUE\r
360 READ_ENABLED_CAP   = TRUE\r
361 READ_STATUS        = TRUE\r
362 READ_LOCK_CAP      = TRUE\r
363 READ_LOCK_STATUS   = TRUE\r
364 FvNameGuid         = 30D9ED01-38D2-418a-90D5-C561750BF80F\r
365 \r
366 ##\r
367 #  DXE Phase modules\r
368 ##\r
369 INF  MdeModulePkg/Core/Dxe/DxeMain.inf\r
370 INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
371 \r
372 !if $(SOURCE_DEBUG_ENABLE)\r
373   INF  SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf\r
374 !endif\r
375 \r
376 #\r
377 # Early SoC / Platform modules\r
378 #\r
379 INF  QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf\r
380 \r
381 ##\r
382 #  EDK Core modules\r
383 ##\r
384 INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
385 \r
386 INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
387 INF  UefiCpuPkg/CpuDxe/CpuDxe.inf\r
388 INF  MdeModulePkg/Universal/Metronome/Metronome.inf\r
389 INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
390 INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
391 INF  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf\r
392 INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
393 INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
394 INF  MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf\r
395 INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
396 INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
397 INF  MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
398 \r
399 #\r
400 # Platform\r
401 #\r
402 INF  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf\r
403 #INF  MdeModulePkg/Application/UiApp/UiApp.inf\r
404 \r
405 INF  QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf\r
406 INF  QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf\r
407 INF  PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
408 INF  QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf\r
409 \r
410 #\r
411 # PCI\r
412 #\r
413 INF  QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf\r
414 INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
415 INF  QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf\r
416 !if $(SOURCE_DEBUG_ENABLE)\r
417 !else\r
418 INF  MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf\r
419 !endif\r
420 \r
421 #\r
422 # Console\r
423 #\r
424 INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
425 INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
426 INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
427 \r
428 INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
429 INF  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
430 INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
431 INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
432 \r
433 #\r
434 # File System Modules\r
435 #\r
436 INF  MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r
437 \r
438 #\r
439 # Performance Application\r
440 #\r
441 !if $(PERFORMANCE_ENABLE)\r
442 INF  ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
443 !endif\r
444 \r
445 ################################################################################\r
446 #\r
447 # FV Section\r
448 #\r
449 # [FV] section is used to define what components or modules are placed within a flash\r
450 # device file.  This section also defines order the components and modules are positioned\r
451 # within the image.  The [FV] section consists of define statements, set statements and\r
452 # module statements.\r
453 #\r
454 ################################################################################\r
455 [FV.FVMAIN_COMPACT]\r
456 FvAlignment        = 16\r
457 ERASE_POLARITY     = 1\r
458 MEMORY_MAPPED      = TRUE\r
459 STICKY_WRITE       = TRUE\r
460 LOCK_CAP           = TRUE\r
461 LOCK_STATUS        = TRUE\r
462 WRITE_DISABLED_CAP = TRUE\r
463 WRITE_ENABLED_CAP  = TRUE\r
464 WRITE_STATUS       = TRUE\r
465 WRITE_LOCK_CAP     = TRUE\r
466 WRITE_LOCK_STATUS  = TRUE\r
467 READ_DISABLED_CAP  = TRUE\r
468 READ_ENABLED_CAP   = TRUE\r
469 READ_STATUS        = TRUE\r
470 READ_LOCK_CAP      = TRUE\r
471 READ_LOCK_STATUS   = TRUE\r
472 \r
473 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
474   SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 {    # TIANO COMPRESS GUID\r
475     SECTION FV_IMAGE = FVMAIN\r
476   }\r
477 }\r
478 \r
479 ################################################################################\r
480 #\r
481 # FV Section\r
482 #\r
483 # [FV] section is used to define what components or modules are placed within a flash\r
484 # device file.  This section also defines order the components and modules are positioned\r
485 # within the image.  The [FV] section consists of define statements, set statements and\r
486 # module statements.\r
487 #\r
488 ################################################################################\r
489 [FV.PAYLOAD]\r
490 BlockSize          = $(FLASH_BLOCKSIZE)\r
491 FvAlignment        = 16         #FV alignment and FV attributes setting.\r
492 ERASE_POLARITY     = 1\r
493 MEMORY_MAPPED      = TRUE\r
494 STICKY_WRITE       = TRUE\r
495 LOCK_CAP           = TRUE\r
496 LOCK_STATUS        = TRUE\r
497 WRITE_DISABLED_CAP = TRUE\r
498 WRITE_ENABLED_CAP  = TRUE\r
499 WRITE_STATUS       = TRUE\r
500 WRITE_LOCK_CAP     = TRUE\r
501 WRITE_LOCK_STATUS  = TRUE\r
502 READ_DISABLED_CAP  = TRUE\r
503 READ_ENABLED_CAP   = TRUE\r
504 READ_STATUS        = TRUE\r
505 READ_LOCK_CAP      = TRUE\r
506 READ_LOCK_STATUS   = TRUE\r
507 \r
508 #\r
509 # Shell and Applications\r
510 #\r
511 INF  ShellPkg/Application/Shell/Shell.inf\r
512 \r
513 ################################################################################\r
514 #\r
515 # Rules are use with the [FV] section's module INF type to define\r
516 # how an FFS file is created for a given INF file. The following Rule are the default\r
517 # rules for the different module type. User can add the customized rules to define the\r
518 # content of the FFS file.\r
519 #\r
520 ################################################################################\r
521 [Rule.Common.SEC]\r
522   FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
523     TE  TE    Align = 8       $(INF_OUTPUT)/$(MODULE_NAME).efi\r
524     RAW BIN   Align = 16      |.com\r
525   }\r
526 \r
527 [Rule.Common.PEI_CORE]\r
528   FILE PEI_CORE = $(NAMED_GUID)            {\r
529     TE       TE               $(INF_OUTPUT)/$(MODULE_NAME).efi\r
530     UI       STRING="$(MODULE_NAME)" Optional\r
531     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
532   }\r
533 \r
534 [Rule.Common.PEIM.NORELOC]\r
535   FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED  {\r
536      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
537      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi\r
538      UI        STRING="$(MODULE_NAME)" Optional\r
539      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
540   }\r
541 \r
542 [Rule.Common.PEIM]\r
543   FILE PEIM = $(NAMED_GUID)               {\r
544      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
545      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi\r
546      UI        STRING="$(MODULE_NAME)" Optional\r
547      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
548   }\r
549 \r
550 [Rule.Common.DXE_CORE]\r
551   FILE DXE_CORE = $(NAMED_GUID) {\r
552     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
553     UI        STRING="$(MODULE_NAME)" Optional\r
554     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
555   }\r
556 \r
557 [Rule.Common.UEFI_DRIVER]\r
558   FILE DRIVER = $(NAMED_GUID) {\r
559     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
560     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
561     UI        STRING="$(MODULE_NAME)" Optional\r
562     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
563   }\r
564 \r
565 [Rule.Common.DXE_DRIVER]\r
566   FILE DRIVER = $(NAMED_GUID) {\r
567     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
568     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
569     UI        STRING="$(MODULE_NAME)" Optional\r
570     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
571   }\r
572 \r
573 [Rule.Common.DXE_RUNTIME_DRIVER]\r
574   FILE DRIVER = $(NAMED_GUID) {\r
575     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
576     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
577     UI        STRING="$(MODULE_NAME)" Optional\r
578     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
579   }\r
580 \r
581 [Rule.Common.DXE_SMM_DRIVER]\r
582   FILE SMM = $(NAMED_GUID) {\r
583     SMM_DEPEX SMM_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
584     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
585     UI        STRING="$(MODULE_NAME)" Optional\r
586     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
587   }\r
588 \r
589 [Rule.Common.SMM_CORE]\r
590   FILE SMM_CORE = $(NAMED_GUID) {\r
591     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
592     UI        STRING="$(MODULE_NAME)" Optional\r
593     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
594   }\r
595 \r
596 [Rule.Common.UEFI_APPLICATION]\r
597   FILE APPLICATION = $(NAMED_GUID) {\r
598     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
599     UI        STRING="$(MODULE_NAME)" Optional\r
600     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
601   }\r
602 \r
603 [Rule.Common.UEFI_APPLICATION.UI]\r
604   FILE APPLICATION = $(NAMED_GUID) {\r
605     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
606     UI        STRING="Enter Setup"\r
607     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
608   }\r
609 \r
610 [Rule.Common.USER_DEFINED.ACPITABLE]\r
611   FILE FREEFORM = $(NAMED_GUID) {\r
612     RAW ACPI               |.acpi\r
613     RAW ASL                |.aml\r
614   }\r