QuarkSocPkg/QuarkNorthCluster/Include/IntelQNCConfig.h

   1 /** @file
   2 Some configuration of QNC Package
   3
   4 Copyright (c) 2013-2015 Intel Corporation.
   5
   6 SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 **/
   9
  10 #ifndef __INTEL_QNC_CONFIG_H__
  11 #define __INTEL_QNC_CONFIG_H__
  12
  13 //
  14 // QNC Fixed configurations.
  15 //
  16
  17 //
  18 // Memory arbiter fixed config values.
  19 //
  20 #define QNC_FIXED_CONFIG_ASTATUS  ((UINT32) (\
  21           (ASTATUS_PRI_NORMAL << ASTATUS0_DEFAULT_BP) | \
  22           (ASTATUS_PRI_NORMAL << ASTATUS1_DEFAULT_BP) | \
  23           (ASTATUS_PRI_URGENT << ASTATUS0_RASISED_BP) | \
  24           (ASTATUS_PRI_URGENT << ASTATUS1_RASISED_BP) \
  25           ))
  26
  27 //
  28 // Memory Manager fixed config values.
  29 //
  30 #define V_DRAM_NON_HOST_RQ_LIMIT                    2
  31
  32 //
  33 // RMU Thermal config fixed config values for TS in Vref Mode.
  34 //
  35 #define V_TSCGF1_CONFIG_ISNSCURRENTSEL_VREF_MODE    0x04
  36 #define V_TSCGF2_CONFIG2_ISPARECTRL_VREF_MODE       0x01
  37 #define V_TSCGF1_CONFIG_IBGEN_VREF_MODE             1
  38 #define V_TSCGF2_CONFIG_IDSCONTROL_VREF_MODE        0x011b
  39 #define V_TSCGF2_CONFIG2_ICALCOARSETUNE_VREF_MODE   0x34
  40
  41 //
  42 // RMU Thermal config fixed config values for TS in Ratiometric mode.
  43 //
  44 #define V_TSCGF1_CONFIG_ISNSCURRENTSEL_RATIO_MODE   0x04
  45 #define V_TSCGF1_CONFIG_ISNSCHOPSEL_RATIO_MODE      0x02
  46 #define V_TSCGF1_CONFIG_ISNSINTERNALVREFEN_RATIO_MODE 1
  47 #define V_TSCGF2_CONFIG_IDSCONTROL_RATIO_MODE       0x011f
  48 #define V_TSCGF2_CONFIG_IDSTIMING_RATIO_MODE        0x0001
  49 #define V_TSCGF2_CONFIG2_ICALCONFIGSEL_RATIO_MODE   0x01
  50 #define V_TSCGF2_CONFIG2_ISPARECTRL_RATIO_MODE      0x00
  51 #define V_TSCGF1_CONFIG_IBGEN_RATIO_MODE            0
  52 #define V_TSCGF1_CONFIG_IBGCHOPEN_RATIO_MODE        0
  53 #define V_TSCGF3_CONFIG_ITSGAMMACOEFF_RATIO_MODE    0xC8
  54 #define V_TSCGF2_CONFIG2_ICALCOARSETUNE_RATIO_MODE  0x17
  55
  56 //
  57 // iCLK fixed config values.
  58 //
  59 #define V_MUXTOP_FLEX2                              3
  60 #define V_MUXTOP_FLEX1                              1
  61
  62 //
  63 // PCIe Root Port fixed config values.
  64 //
  65 #define V_PCIE_ROOT_PORT_SBIC_VALUE                 (B_QNC_PCIE_IOSFSBCTL_SBIC_IDLE_NEVER)
  66
  67 //
  68 // QNC structures for configuration.
  69 //
  70
  71 typedef union {
  72   struct {
  73     UINT32  PortErrorMask               :8;
  74     UINT32  SlotImplemented             :1;
  75     UINT32  Reserved1                   :1;
  76     UINT32  AspmEnable                  :1;
  77     UINT32  AspmAutoEnable              :1;
  78     UINT32  AspmL0sEnable               :2;
  79     UINT32  AspmL1Enable                :1;
  80     UINT32  PmeInterruptEnable          :1;
  81     UINT32  PhysicalSlotNumber          :13;
  82     UINT32  Reserved2                   :1;
  83     UINT32  PmSciEnable                 :1;
  84     UINT32  HotplugSciEnable            :1;
  85   } Bits;
  86   UINT32 Uint32;
  87 } PCIEXP_ROOT_PORT_CONFIGURATION;
  88
  89 typedef union {
  90   UINT32 Uint32;
  91   struct {
  92     UINT32 Pcie_0     :1;   // 0: Disabled; 1: Enabled*
  93     UINT32 Pcie_1     :1;   // 0: Disabled; 1: Enabled*
  94     UINT32 Smbus      :1;   // 0: Disabled; 1: Enabled*
  95     UINT32 Rsvd       :29;  // 0
  96   } Bits;
  97 } QNC_DEVICE_ENABLES;
  98
  99 #endif
 100