QuarkSocPkg/QuarkNorthCluster/Include/Library/IntelQNCLib.h

   1 /** @file
   2 Library that provides QNC specific library services in PEI phase
   3
   4 Copyright (c) 2013-2015 Intel Corporation.
   5
   6 This program and the accompanying materials
   7 are licensed and made available under the terms and conditions of the BSD License
   8 which accompanies this distribution.  The full text of the license may be found at
   9 http://opensource.org/licenses/bsd-license.php
  10
  11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef __INTEL_QNC_LIB_H__
  17 #define __INTEL_QNC_LIB_H__
  18
  19 /**
  20   This function initializes the QNC register before MRC.
  21   It sets RCBA, PMBASE, disable Watchdog timer and initialize QNC GPIO.
  22   If the function cannot complete it'll ASSERT().
  23 **/
  24 VOID
  25 EFIAPI
  26 PeiQNCPreMemInit (
  27   VOID
  28   );
  29
  30
  31 /**
  32   Used to check SCH if it's S3 state.  Clear the register state after query.
  33
  34   @retval TRUE if it's S3 state.
  35   @retval FALSE if it's not S3 state.
  36
  37 **/
  38 BOOLEAN
  39 EFIAPI
  40 QNCCheckS3AndClearState (
  41    VOID
  42   );
  43
  44 /**
  45   Used to check SCH if system wakes up from power on reset. Clear the register state after query.
  46
  47   @retval TRUE  if system wakes up from power on reset
  48   @retval FALSE if system does not wake up from power on reset
  49
  50 **/
  51 BOOLEAN
  52 EFIAPI
  53 QNCCheckPowerOnResetAndClearState (
  54    VOID
  55   );
  56
  57 /**
  58   This function is used to clear SMI and wake status.
  59
  60 **/
  61 VOID
  62 EFIAPI
  63 QNCClearSmiAndWake (
  64   VOID
  65   );
  66
  67 /**
  68   Used to initialize the QNC register after MRC.
  69
  70 **/
  71 VOID
  72 EFIAPI
  73 PeiQNCPostMemInit (
  74   VOID
  75   );
  76
  77 /** Send DRAM Ready opcode.
  78
  79   @param[in]       OpcodeParam  Parameter to DRAM ready opcode.
  80
  81   @retval          VOID
  82 **/
  83 VOID
  84 EFIAPI
  85 QNCSendOpcodeDramReady (
  86   IN UINT32   OpcodeParam
  87   );
  88
  89 /**
  90
  91   Relocate RMU Main binary to memory after MRC to improve performance.
  92
  93   @param[in]  DestBaseAddress  - Specify the new memory address for the RMU Main binary.
  94   @param[in]  SrcBaseAddress   - Specify the current memory address for the RMU Main binary.
  95   @param[in]  Size             - Specify size of the RMU Main binary.
  96
  97   @retval     VOID
  98
  99 **/
 100 VOID
 101 EFIAPI
 102 RmuMainRelocation (
 103   IN CONST UINT32   DestBaseAddress,
 104   IN CONST UINT32   SrcBaseAddress,
 105   IN CONST UINTN    Size
 106   );
 107
 108 /**
 109   Get the total memory size
 110
 111 **/
 112 UINT32
 113 EFIAPI
 114 QNCGetTotalMemorysize (
 115   VOID
 116   );
 117
 118 /**
 119   Get the memory range of TSEG.
 120   The TSEG's memory is below TOLM.
 121
 122   @param[out] BaseAddress The base address of TSEG's memory range
 123   @param[out] MemorySize  The size of TSEG's memory range
 124
 125 **/
 126 VOID
 127 EFIAPI
 128 QNCGetTSEGMemoryRange (
 129   OUT UINT64  *BaseAddress,
 130   OUT UINT64  *MemorySize
 131   );
 132
 133 /**
 134   Updates the PAM registers in the MCH for the requested range and mode.
 135
 136   @param   Start        The start address of the memory region
 137   @param   Length       The length, in bytes, of the memory region
 138   @param   ReadEnable   Pointer to the boolean variable on whether to enable read for legacy memory section.
 139                         If NULL, then read attribute will not be touched by this call.
 140   @param   ReadEnable   Pointer to the boolean variable on whether to enable write for legacy memory section.
 141                         If NULL, then write attribute will not be touched by this call.
 142   @param   Granularity  A pointer to granularity, in bytes, that the PAM registers support
 143
 144   @retval  RETURN_SUCCESS            The PAM registers in the MCH were updated
 145   @retval  RETURN_INVALID_PARAMETER  The memory range is not valid in legacy region.
 146
 147 **/
 148 RETURN_STATUS
 149 EFIAPI
 150 QNCLegacyRegionManipulation (
 151   IN  UINT32                  Start,
 152   IN  UINT32                  Length,
 153   IN  BOOLEAN                 *ReadEnable,
 154   IN  BOOLEAN                 *WriteEnable,
 155   OUT UINT32                  *Granularity
 156   );
 157
 158 /**
 159   Do early init of pci express rootports on Soc.
 160
 161 **/
 162 VOID
 163 EFIAPI
 164 PciExpressEarlyInit (
 165   VOID
 166   );
 167
 168 /**
 169   Complete initialization of all the pci express rootports on Soc.
 170 **/
 171 EFI_STATUS
 172 EFIAPI
 173 PciExpressInit (
 174   );
 175
 176 /**
 177   Determine if QNC is supported.
 178
 179   @retval FALSE  QNC is not supported.
 180   @retval TRUE   QNC is supported.
 181 **/
 182 BOOLEAN
 183 EFIAPI
 184 IsQncSupported (
 185   VOID
 186   );
 187
 188 /**
 189   Get the DeviceId of the SoC
 190
 191   @retval PCI DeviceId of the SoC
 192 **/
 193 UINT16
 194 EFIAPI
 195 QncGetSocDeviceId (
 196   VOID
 197   );
 198
 199 /**
 200   Enable SMI detection of legacy flash access violations.
 201 **/
 202 VOID
 203 EFIAPI
 204 QncEnableLegacyFlashAccessViolationSmi (
 205   VOID
 206   );
 207
 208 /**
 209   Setup RMU Thermal sensor registers for Vref mode.
 210 **/
 211 VOID
 212 EFIAPI
 213 QNCThermalSensorSetVRefMode (
 214   VOID
 215   );
 216
 217 /**
 218   Setup RMU Thermal sensor registers for Ratiometric mode.
 219 **/
 220 VOID
 221 EFIAPI
 222 QNCThermalSensorSetRatiometricMode (
 223   VOID
 224   );
 225
 226 /**
 227   Setup RMU Thermal sensor trip point values.
 228
 229   @param[in]  CatastrophicTripOnDegreesCelsius  - Catastrophic set trip point threshold.
 230   @param[in]  HotTripOnDegreesCelsius           - Hot set trip point threshold.
 231   @param[in]  HotTripOffDegreesCelsius          - Hot clear trip point threshold.
 232
 233   @retval     VOID
 234 **/
 235 EFI_STATUS
 236 EFIAPI
 237 QNCThermalSensorSetTripValues (
 238   IN  CONST UINTN             CatastrophicTripOnDegreesCelsius,
 239   IN  CONST UINTN             HotTripOnDegreesCelsius,
 240   IN  CONST UINTN             HotTripOffDegreesCelsius
 241   );
 242
 243 /**
 244   Enable RMU Thermal sensor with a Catastrophic Trip point.
 245
 246   @retval  EFI_SUCCESS            Trip points setup.
 247   @retval  EFI_INVALID_PARAMETER  Invalid trip point value.
 248
 249 **/
 250 EFI_STATUS
 251 EFIAPI
 252 QNCThermalSensorEnableWithCatastrophicTrip (
 253   IN  CONST UINTN             CatastrophicTripOnDegreesCelsius
 254   );
 255
 256 /**
 257   Lock all RMU Thermal sensor control & trip point registers.
 258
 259 **/
 260 VOID
 261 EFIAPI
 262 QNCThermalSensorLockAllRegisters (
 263   VOID
 264   );
 265
 266 /**
 267   Set chipset policy for double bit ECC error.
 268
 269   @param[in]       PolicyValue  Policy to config on double bit ECC error.
 270
 271 **/
 272 VOID
 273 EFIAPI
 274 QNCPolicyDblEccBitErr (
 275   IN  CONST UINT32                        PolicyValue
 276   );
 277
 278 /**
 279   Determine if running on secure Quark hardware Sku.
 280
 281   @retval FALSE  Base Quark Sku or unprovisioned Secure Sku running.
 282   @retval TRUE   Provisioned SecureSku hardware running.
 283 **/
 284 BOOLEAN
 285 EFIAPI
 286 QncIsSecureProvisionedSku (
 287   VOID
 288   );
 289 #endif
 290