QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/prememinit.c

   1 /************************************************************************
   2  *
   3  * Copyright (c) 2013-2015 Intel Corporation.
   4  *
   5 * SPDX-License-Identifier: BSD-2-Clause-Patent
   6  *
   7  ************************************************************************/
   8
   9 #include "mrc.h"
  10 #include "memory_options.h"
  11
  12 #include "meminit_utils.h"
  13 #include "prememinit.h"
  14 #include "io.h"
  15
  16 // Read character from serial console
  17 uint8_t mgetc(void);
  18
  19 extern uint32_t DpfPrintMask;
  20
  21 // Adjust configuration parameters before initialisation
  22 // sequence.
  23 void PreMemInit(
  24     MRCParams_t *mrc_params)
  25 {
  26   const DRAMParams_t *dram_params;
  27
  28   uint8_t dram_width;
  29   uint32_t dram_cfg_index;
  30   uint32_t channel_i;
  31
  32   ENTERFN();
  33
  34 #ifdef MRC_SV
  35   {
  36     uint8_t ch;
  37
  38     myloop:
  39
  40     DPF(D_INFO, "- c - continue\n");
  41     DPF(D_INFO, "- f - boot mode [%d]\n", mrc_params->boot_mode);
  42     DPF(D_INFO, "- r - rank enable [%d]\n", mrc_params->rank_enables);
  43     DPF(D_INFO, "- e - ecc switch [%d]\n", mrc_params->ecc_enables);
  44     DPF(D_INFO, "- b - scrambling switch [%d]\n", mrc_params->scrambling_enables);
  45     DPF(D_INFO, "- a - adr mode [%d]\n", mrc_params->address_mode);
  46     DPF(D_INFO, "- m - menu after mrc [%d]\n", mrc_params->menu_after_mrc);
  47     DPF(D_INFO, "- t - tune to rcvn [%d]\n", mrc_params->tune_rcvn);
  48     DPF(D_INFO, "- o - odt switch [%d]\n", mrc_params->rd_odt_value);
  49     DPF(D_INFO, "- d - dram density [%d]\n", mrc_params->params.DENSITY);
  50     DPF(D_INFO, "- p - power down disable [%d]\n", mrc_params->power_down_disable);
  51     DPF(D_INFO, "- l - log switch 0x%x\n", DpfPrintMask);
  52     ch = mgetc();
  53
  54     switch (ch)
  55     {
  56     case 'f':
  57       mrc_params->boot_mode >>= 1;
  58       if(mrc_params->boot_mode == bmUnknown)
  59       {
  60          mrc_params->boot_mode = bmWarm;
  61       }
  62       DPF(D_INFO, "Boot mode %d\n", mrc_params->boot_mode);
  63       break;
  64
  65     case 'p':
  66       mrc_params->power_down_disable ^= 1;
  67       DPF(D_INFO, "Power down disable %d\n", mrc_params->power_down_disable);
  68       break;
  69
  70     case 'r':
  71       mrc_params->rank_enables ^= 2;
  72       DPF(D_INFO, "Rank enable %d\n", mrc_params->rank_enables);
  73       break;
  74
  75     case 'e':
  76       mrc_params->ecc_enables ^= 1;
  77       DPF(D_INFO, "Ecc enable %d\n", mrc_params->ecc_enables);
  78       break;
  79
  80     case 'b':
  81       mrc_params->scrambling_enables ^= 1;
  82       DPF(D_INFO, "Scrambler enable %d\n", mrc_params->scrambling_enables);
  83       break;
  84
  85     case 'a':
  86       mrc_params->address_mode = (mrc_params->address_mode + 1) % 3;
  87       DPF(D_INFO, "Adr mode %d\n", mrc_params->address_mode);
  88       break;
  89
  90     case 'm':
  91        mrc_params->menu_after_mrc ^= 1;
  92       DPF(D_INFO, "Menu after mrc %d\n", mrc_params->menu_after_mrc);
  93       break;
  94
  95     case 't':
  96       mrc_params->tune_rcvn ^= 1;
  97       DPF(D_INFO, "Tune to rcvn %d\n", mrc_params->tune_rcvn);
  98       break;
  99
 100     case 'o':
 101       mrc_params->rd_odt_value = (mrc_params->rd_odt_value + 1) % 4;
 102       DPF(D_INFO, "Rd_odt_value %d\n", mrc_params->rd_odt_value);
 103       break;
 104
 105     case 'd':
 106       mrc_params->params.DENSITY = (mrc_params->params.DENSITY + 1) % 4;
 107       DPF(D_INFO, "Dram density %d\n", mrc_params->params.DENSITY);
 108       break;
 109
 110     case 'l':
 111       DpfPrintMask ^= 0x30;
 112       DPF(D_INFO, "Log mask %x\n", DpfPrintMask);
 113       break;
 114
 115     default:
 116       break;
 117     }
 118
 119     if (ch != 'c')
 120       goto myloop;
 121
 122   }
 123 #endif
 124
 125   // initially expect success
 126   mrc_params->status = MRC_SUCCESS;
 127
 128   // todo!!! Setup board layout (must be reviewed as is selecting static timings)
 129   // 0 == R0 (DDR3 x16), 1 == R1 (DDR3 x16), 2 == DV (DDR3 x8), 3 == SV (DDR3 x8)
 130   if (mrc_params->dram_width == x8)
 131   {
 132     mrc_params->board_id = 2;  // select x8 layout
 133   }
 134   else
 135   {
 136     mrc_params->board_id = 0;  // select x16 layout
 137   }
 138
 139   // initially no memory
 140   mrc_params->mem_size = 0;
 141   channel_i = 0;
 142
 143   // begin of channel settings
 144   dram_width = mrc_params->dram_width;
 145   dram_params = &mrc_params->params;
 146   dram_cfg_index = 0;
 147
 148   // Determine Column & Row Bits:
 149   // Column:
 150   // 11 for 8Gbx8, else 10
 151   mrc_params->column_bits[channel_i] = ((dram_params[dram_cfg_index].DENSITY == 4) && (dram_width == x8)) ? (11) : (10);
 152
 153   // Row:
 154   // 512Mbx16=12 512Mbx8=13
 155   //   1Gbx16=13   1Gbx8=14
 156   //   2Gbx16=14   2Gbx8=15
 157   //   4Gbx16=15   4Gbx8=16
 158   //   8Gbx16=16   8Gbx8=16
 159   mrc_params->row_bits[channel_i] = 12 + (dram_params[dram_cfg_index].DENSITY)
 160       + (((dram_params[dram_cfg_index].DENSITY < 4) && (dram_width == x8)) ? (1) : (0));
 161
 162   // Determine Per Channel Memory Size:
 163   // (For 2 RANKs, multiply by 2)
 164   // (For 16 bit data bus, divide by 2)
 165   // DENSITY  WIDTH   MEM_AVAILABLE
 166   // 512Mb    x16     0x008000000 ( 128MB)
 167   // 512Mb    x8      0x010000000 ( 256MB)
 168   // 1Gb      x16     0x010000000 ( 256MB)
 169   // 1Gb      x8      0x020000000 ( 512MB)
 170   // 2Gb      x16     0x020000000 ( 512MB)
 171   // 2Gb      x8      0x040000000 (1024MB)
 172   // 4Gb      x16     0x040000000 (1024MB)
 173   // 4Gb      x8      0x080000000 (2048MB)
 174   mrc_params->channel_size[channel_i] = (1 << dram_params[dram_cfg_index].DENSITY);
 175   mrc_params->channel_size[channel_i] *= ((dram_width == x8) ? (2) : (1));
 176   mrc_params->channel_size[channel_i] *= (mrc_params->rank_enables == 0x3) ? (2) : (1);
 177   mrc_params->channel_size[channel_i] *= (mrc_params->channel_width == x16) ? (1) : (2);
 178
 179   // Determine memory size (convert number of 64MB/512Mb units)
 180   mrc_params->mem_size += mrc_params->channel_size[channel_i] << 26;
 181
 182   // end of channel settings
 183
 184   LEAVEFN();
 185   return;
 186 }
 187