SecurityPkg/Tcg/Opal/OpalPassword/OpalNvmeMode.h

   1 /** @file
   2   Header file for NVMe function definitions
   3
   4 Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
   5 This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef __OPAL_PASSWORD_NVME_MODE_H__
  16 #define __OPAL_PASSWORD_NVME_MODE_H__
  17
  18
  19 #include "OpalNvmeReg.h"
  20
  21 #define NVME_MAX_SECTORS            0x10000
  22 //
  23 // QueueId
  24 //
  25 #define NVME_ADMIN_QUEUE            0x00
  26 #define NVME_IO_QUEUE               0x01
  27
  28 typedef struct {
  29   UINT8                             Opcode;
  30   UINT8                             FusedOperation;
  31     #define NORMAL_CMD              0x00
  32     #define FUSED_FIRST_CMD         0x01
  33     #define FUSED_SECOND_CMD        0x02
  34   UINT16                            Cid;
  35 } NVME_CDW0;
  36
  37 typedef struct {
  38   NVME_CDW0                         Cdw0;
  39   UINT8                             Flags;
  40     #define CDW10_VALID             0x01
  41     #define CDW11_VALID             0x02
  42     #define CDW12_VALID             0x04
  43     #define CDW13_VALID             0x08
  44     #define CDW14_VALID             0x10
  45     #define CDW15_VALID             0x20
  46   UINT32                            Nsid;
  47   UINT32                            Cdw10;
  48   UINT32                            Cdw11;
  49   UINT32                            Cdw12;
  50   UINT32                            Cdw13;
  51   UINT32                            Cdw14;
  52   UINT32                            Cdw15;
  53 } NVM_EXPRESS_COMMAND;
  54
  55 typedef struct {
  56   UINT32                            Cdw0;
  57   UINT32                            Cdw1;
  58   UINT32                            Cdw2;
  59   UINT32                            Cdw3;
  60 } NVM_EXPRESS_RESPONSE;
  61
  62 typedef struct {
  63   UINT64                            CommandTimeout;
  64   UINT64                            TransferBuffer;
  65   UINT32                            TransferLength;
  66   UINT64                            MetadataBuffer;
  67   UINT32                            MetadataLength;
  68   UINT8                             QueueId;
  69   NVM_EXPRESS_COMMAND               *NvmeCmd;
  70   NVM_EXPRESS_RESPONSE              *NvmeResponse;
  71 } NVM_EXPRESS_PASS_THRU_COMMAND_PACKET;
  72
  73
  74 #pragma pack(1)
  75
  76 // Internal fields
  77 typedef enum {
  78   NvmeStatusUnknown,
  79   NvmeStatusInit,
  80   NvmeStatusInuse,
  81   NvmeStatusMax,
  82 } NVME_STATUS;
  83
  84 typedef struct {
  85   UINT32                            Nbar;
  86   VOID                              *BaseMem;
  87   VOID                              *BaseMemMapping;
  88   BOOLEAN                           PollCancellation;
  89   UINT16                            NvmeInitWaitTime;
  90
  91   NVME_STATUS                       State;
  92   UINT8                             BusID;
  93   UINT8                             DeviceID;
  94   UINT8                             FuncID;
  95   UINTN                             PciBase;
  96
  97   UINT32                            Nsid;
  98   UINT64                            Nsuuid;
  99   UINT32                            BlockSize;
 100   EFI_LBA                           LastBlock;
 101
 102   //
 103   // Pointers to 4kB aligned submission & completion queues.
 104   //
 105   NVME_SQ                           *SqBuffer[NVME_MAX_IO_QUEUES];
 106   NVME_CQ                           *CqBuffer[NVME_MAX_IO_QUEUES];
 107   UINT16                            Cid[NVME_MAX_IO_QUEUES];
 108
 109   //
 110   // Submission and completion queue indices.
 111   //
 112   NVME_SQTDBL                       SqTdbl[NVME_MAX_IO_QUEUES];
 113   NVME_CQHDBL                       CqHdbl[NVME_MAX_IO_QUEUES];
 114   UINT8                             Pt[NVME_MAX_IO_QUEUES];
 115
 116   UINTN                             SqeCount[NVME_MAX_IO_QUEUES];
 117
 118   //
 119   // Nvme controller capabilities
 120   //
 121   NVME_CAP                          Cap;
 122
 123   //
 124   // pointer to identify controller Data
 125   //
 126   NVME_ADMIN_CONTROLLER_DATA        *ControllerData;
 127   NVME_ADMIN_NAMESPACE_DATA         *NamespaceData;
 128 } NVME_CONTEXT;
 129
 130 #pragma pack()
 131
 132 /**
 133   Transfer MMIO Data to memory.
 134
 135   @param[in,out] MemBuffer - Destination: Memory address
 136   @param[in] MmioAddr      - Source: MMIO address
 137   @param[in] Size          - Size for read
 138
 139   @retval EFI_SUCCESS - MMIO read sucessfully
 140 **/
 141 EFI_STATUS
 142 NvmeMmioRead (
 143   IN OUT VOID *MemBuffer,
 144   IN     UINTN MmioAddr,
 145   IN     UINTN Size
 146   );
 147
 148 /**
 149   Transfer memory Data to MMIO.
 150
 151   @param[in,out] MmioAddr - Destination: MMIO address
 152   @param[in] MemBuffer    - Source: Memory address
 153   @param[in] Size         - Size for write
 154
 155   @retval EFI_SUCCESS - MMIO write sucessfully
 156 **/
 157 EFI_STATUS
 158 NvmeMmioWrite (
 159   IN OUT UINTN MmioAddr,
 160   IN     VOID *MemBuffer,
 161   IN     UINTN Size
 162   );
 163
 164 /**
 165   Transfer memory data to MMIO.
 166
 167   @param[in,out] MmioAddr - Destination: MMIO address
 168   @param[in] MemBuffer    - Source: Memory address
 169   @param[in] Size         - Size for write
 170
 171   @retval EFI_SUCCESS - MMIO write sucessfully
 172 **/
 173 EFI_STATUS
 174 OpalPciWrite (
 175   IN OUT UINTN MmioAddr,
 176   IN     VOID *MemBuffer,
 177   IN     UINTN Size
 178   );
 179
 180 /**
 181   Transfer MMIO data to memory.
 182
 183   @param[in,out] MemBuffer - Destination: Memory address
 184   @param[in] MmioAddr      - Source: MMIO address
 185   @param[in] Size          - Size for read
 186
 187   @retval EFI_SUCCESS - MMIO read sucessfully
 188 **/
 189 EFI_STATUS
 190 OpalPciRead (
 191   IN OUT VOID *MemBuffer,
 192   IN     UINTN MmioAddr,
 193   IN     UINTN Size
 194   );
 195
 196 /**
 197   Allocate transfer-related Data struct which is used at Nvme.
 198
 199   @param[in, out] Nvme          The pointer to the NVME_CONTEXT Data structure.
 200
 201   @retval EFI_OUT_OF_RESOURCE   No enough resource.
 202   @retval EFI_SUCCESS           Successful to allocate resource.
 203
 204 **/
 205 EFI_STATUS
 206 EFIAPI
 207 NvmeAllocateResource (
 208   IN OUT NVME_CONTEXT       *Nvme
 209   );
 210
 211 /**
 212   Free allocated transfer-related Data struct which is used at NVMe.
 213
 214   @param[in, out] Nvme          The pointer to the NVME_CONTEXT Data structure.
 215
 216 **/
 217 VOID
 218 EFIAPI
 219 NvmeFreeResource (
 220   IN OUT NVME_CONTEXT       *Nvme
 221   );
 222
 223 /**
 224   Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function supports
 225   both blocking I/O and nonblocking I/O. The blocking I/O functionality is required, and the nonblocking
 226   I/O functionality is optional.
 227
 228   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 229   @param[in] NamespaceId            - Is a 32 bit Namespace ID to which the Express HCI command packet will be sent.
 230                                       A Value of 0 denotes the NVM Express controller, a Value of all 0FFh in the namespace
 231                                       ID specifies that the command packet should be sent to all valid namespaces.
 232   @param[in] NamespaceUuid          - Is a 64 bit Namespace UUID to which the Express HCI command packet will be sent.
 233                                       A Value of 0 denotes the NVM Express controller, a Value of all 0FFh in the namespace
 234                                       UUID specifies that the command packet should be sent to all valid namespaces.
 235   @param[in,out] Packet             - A pointer to the NVM Express HCI Command Packet to send to the NVMe namespace specified
 236                                       by NamespaceId.
 237
 238   @retval EFI_SUCCESS               - The NVM Express Command Packet was sent by the host. TransferLength bytes were transferred
 239                                       to, or from DataBuffer.
 240   @retval EFI_NOT_READY             - The NVM Express Command Packet could not be sent because the controller is not ready. The caller
 241                                       may retry again later.
 242   @retval EFI_DEVICE_ERROR          - A device error occurred while attempting to send the NVM Express Command Packet.
 243   @retval EFI_INVALID_PARAMETER     - Namespace, or the contents of NVM_EXPRESS_PASS_THRU_COMMAND_PACKET are invalid. The NVM
 244                                       Express Command Packet was not sent, so no additional status information is available.
 245   @retval EFI_UNSUPPORTED           - The command described by the NVM Express Command Packet is not supported by the host adapter.
 246                                       The NVM Express Command Packet was not sent, so no additional status information is available.
 247   @retval EFI_TIMEOUT               - A timeout occurred while waiting for the NVM Express Command Packet to execute.
 248
 249 **/
 250 EFI_STATUS
 251 NvmePassThru (
 252   IN     NVME_CONTEXT                         *Nvme,
 253   IN     UINT32                               NamespaceId,
 254   IN     UINT64                               NamespaceUuid,
 255   IN OUT NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
 256   );
 257
 258 /**
 259   Waits until all NVME commands completed.
 260
 261   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 262   @param[in] Qid                    - Queue index
 263
 264   @retval EFI_SUCCESS               - All NVME commands have completed
 265   @retval EFI_TIMEOUT               - Timeout occured
 266   @retval EFI_NOT_READY             - Not all NVME commands have completed
 267   @retval others                    - Error occurred on device side.
 268 **/
 269 EFI_STATUS
 270 NvmeWaitAllComplete (
 271   IN NVME_CONTEXT       *Nvme,
 272   IN UINT8              Qid
 273   );
 274
 275 /**
 276   Initialize the Nvm Express controller.
 277
 278   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 279
 280   @retval EFI_SUCCESS               - The NVM Express Controller is initialized successfully.
 281   @retval Others                    - A device error occurred while initializing the controller.
 282
 283 **/
 284 EFI_STATUS
 285 NvmeControllerInit (
 286   IN NVME_CONTEXT       *Nvme
 287   );
 288
 289 /**
 290   Un-initialize the Nvm Express controller.
 291
 292   @param[in] Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 293
 294   @retval EFI_SUCCESS               - The NVM Express Controller is un-initialized successfully.
 295   @retval Others                    - A device error occurred while un-initializing the controller.
 296
 297 **/
 298 EFI_STATUS
 299 NvmeControllerExit (
 300   IN NVME_CONTEXT       *Nvme
 301   );
 302
 303 /**
 304   Security send and receive commands.
 305
 306   @param[in]     Nvme                   - The pointer to the NVME_CONTEXT Data structure.
 307   @param[in]     SendCommand            - The flag to indicate the command type, TRUE for Send command and FALSE for receive command
 308   @param[in]     SecurityProtocol       - Security Protocol
 309   @param[in]     SpSpecific             - Security Protocol Specific
 310   @param[in]     TransferLength         - Transfer Length of Buffer (in bytes) - always a multiple of 512
 311   @param[in,out] TransferBuffer         - Address of Data to transfer
 312
 313   @return EFI_SUCCESS               - Successfully create io submission queue.
 314   @return others                    - Fail to send/receive commands.
 315
 316 **/
 317 EFI_STATUS
 318 NvmeSecuritySendReceive (
 319   IN NVME_CONTEXT                          *Nvme,
 320   IN BOOLEAN                               SendCommand,
 321   IN UINT8                                 SecurityProtocol,
 322   IN UINT16                                SpSpecific,
 323   IN UINTN                                 TransferLength,
 324   IN OUT VOID                              *TransferBuffer
 325   );
 326
 327 #endif