SecurityPkg/Tcg/Tcg2Smm/Tpm.asl

   1 /** @file
   2   The TPM2 definition block in ACPI table for TCG2 physical presence
   3   and MemoryClear.
   4
   5 Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
   6 (c)Copyright 2016 HP Development Company, L.P.<BR>
   7 Copyright (c) 2017, Microsoft Corporation.  All rights reserved. <BR>
   8 This program and the accompanying materials
   9 are licensed and made available under the terms and conditions of the BSD License
  10 which accompanies this distribution.  The full text of the license may be found at
  11 http://opensource.org/licenses/bsd-license.php
  12
  13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  15
  16 **/
  17
  18 DefinitionBlock (
  19   "Tpm.aml",
  20   "SSDT",
  21   2,
  22   "INTEL ",
  23   "Tpm2Tabl",
  24   0x1000
  25   )
  26 {
  27   Scope (\_SB)
  28   {
  29     Device (TPM)
  30     {
  31       //
  32       // TCG2
  33       //
  34
  35       //
  36       //  TAG for patching TPM2.0 _HID
  37       //
  38       Name (_HID, "NNNN0000")
  39
  40       Name (_CID, "MSFT0101")
  41
  42       //
  43       // Readable name of this device, don't know if this way is correct yet
  44       //
  45       Name (_STR, Unicode ("TPM 2.0 Device"))
  46
  47       //
  48       // Operational region for Smi port access
  49       //
  50       OperationRegion (SMIP, SystemIO, 0xB2, 1)
  51       Field (SMIP, ByteAcc, NoLock, Preserve)
  52       {
  53           IOB2, 8
  54       }
  55
  56       //
  57       // Operational region for TPM access
  58       //
  59       OperationRegion (TPMR, SystemMemory, 0xfed40000, 0x5000)
  60       Field (TPMR, AnyAcc, NoLock, Preserve)
  61       {
  62         ACC0, 8,  // TPM_ACCESS_0
  63         Offset(0x8),
  64         INTE, 32, // TPM_INT_ENABLE_0
  65         INTV, 8,  // TPM_INT_VECTOR_0
  66         Offset(0x10),
  67         INTS, 32, // TPM_INT_STATUS_0
  68         INTF, 32, // TPM_INTF_CAPABILITY_0
  69         STS0, 32, // TPM_STS_0
  70         Offset(0x24),
  71         FIFO, 32, // TPM_DATA_FIFO_0
  72         Offset(0x30),
  73         TID0, 32, // TPM_INTERFACE_ID_0
  74                   // ignore the rest
  75       }
  76
  77       //
  78       // Operational region for TPM support, TPM Physical Presence and TPM Memory Clear
  79       // Region Offset 0xFFFF0000 and Length 0xF0 will be fixed in C code.
  80       //
  81       OperationRegion (TNVS, SystemMemory, 0xFFFF0000, 0xF0)
  82       Field (TNVS, AnyAcc, NoLock, Preserve)
  83       {
  84         PPIN,   8,  //   Software SMI for Physical Presence Interface
  85         PPIP,   32, //   Used for save physical presence paramter
  86         PPRP,   32, //   Physical Presence request operation response
  87         PPRQ,   32, //   Physical Presence request operation
  88         PPRM,   32, //   Physical Presence request operation parameter
  89         LPPR,   32, //   Last Physical Presence request operation
  90         FRET,   32, //   Physical Presence function return code
  91         MCIN,   8,  //   Software SMI for Memory Clear Interface
  92         MCIP,   32, //   Used for save the Mor paramter
  93         MORD,   32, //   Memory Overwrite Request Data
  94         MRET,   32, //   Memory Overwrite function return code
  95         UCRQ,   32, //   Phyical Presence request operation to Get User Confirmation Status
  96         IRQN,   32, //   IRQ Number for _CRS
  97         SFRB,   8   //   Is shortformed Pkglength for resource buffer
  98       }
  99
 100       //
 101       // Possible resource settings returned by  _PRS method
 102       //   RESS : ResourceTemplate with PkgLength <=63
 103       //   RESL : ResourceTemplate with PkgLength > 63
 104       //
 105       // The format of the data has to follow the same format as
 106       // _CRS (according to ACPI spec).
 107       //
 108       Name (RESS, ResourceTemplate() {
 109         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
 110         Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {1,2,3,4,5,6,7,8,9,10}
 111       })
 112
 113       Name (RESL, ResourceTemplate() {
 114         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
 115         Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}
 116       })
 117
 118       //
 119       // Current resource settings for _CRS method
 120       //
 121       Name(RES0, ResourceTemplate () {
 122         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000, REG0)
 123         Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , INTR) {12}
 124       })
 125
 126       Name(RES1, ResourceTemplate () {
 127         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000, REG1)
 128       })
 129
 130
 131       //
 132       // Return the resource consumed by TPM device.
 133       //
 134       Method(_CRS,0,Serialized)
 135       {
 136         //
 137         // IRQNum = 0 means disable IRQ support
 138         //
 139         If (LEqual(IRQN, 0)) {
 140           Return (RES1)
 141         }
 142         Else
 143         {
 144           CreateDWordField(RES0, ^INTR._INT, LIRQ)
 145           Store(IRQN, LIRQ)
 146           Return (RES0)
 147         }
 148       }
 149
 150       //
 151       // Set resources consumed by the TPM device. This is used to
 152       // assign an interrupt number to the device. The input byte stream
 153       // has to be the same as returned by _CRS (according to ACPI spec).
 154       //
 155       // Platform may choose to override this function with specific interrupt
 156       // programing logic to replace FIFO/TIS SIRQ registers programing
 157       //
 158       Method(_SRS,1,Serialized)
 159       {
 160         //
 161         // Do not configure Interrupt if IRQ Num is configured 0 by default
 162         //
 163         If (LEqual(IRQN, 0)) {
 164           Return (0)
 165         }
 166
 167         //
 168         // Update resource descriptor
 169         // Use the field name to identify the offsets in the argument
 170         // buffer and RES0 buffer.
 171         //
 172         CreateDWordField(Arg0, ^INTR._INT, IRQ0)
 173         CreateDWordField(RES0, ^INTR._INT, LIRQ)
 174         Store(IRQ0, LIRQ)
 175         Store(IRQ0, IRQN)
 176
 177         CreateBitField(Arg0, ^INTR._HE, ITRG)
 178         CreateBitField(RES0, ^INTR._HE, LTRG)
 179         Store(ITRG, LTRG)
 180
 181         CreateBitField(Arg0, ^INTR._LL, ILVL)
 182         CreateBitField(RES0, ^INTR._LL, LLVL)
 183         Store(ILVL, LLVL)
 184
 185         //
 186         // Update TPM FIFO PTP/TIS interface only, identified by TPM_INTERFACE_ID_x lowest
 187         // nibble.
 188         // 0000 - FIFO interface as defined in PTP for TPM 2.0 is active
 189         // 1111 - FIFO interface as defined in TIS1.3 is active
 190         //
 191         If (LOr(LEqual (And (TID0, 0x0F), 0x00), LEqual (And (TID0, 0x0F), 0x0F))) {
 192           //
 193           // If FIFO interface, interrupt vector register is
 194           // available. TCG PTP specification allows only
 195           // values 1..15 in this field. For other interrupts
 196           // the field should stay 0.
 197           //
 198           If (LLess (IRQ0, 16)) {
 199             Store (And(IRQ0, 0xF), INTV)
 200           }
 201           //
 202           // Interrupt enable register (TPM_INT_ENABLE_x) bits 3:4
 203           // contains settings for interrupt polarity.
 204           // The other bits of the byte enable individual interrupts.
 205           // They should be all be zero, but to avoid changing the
 206           // configuration, the other bits are be preserved.
 207           // 00 - high level
 208           // 01 - low level
 209           // 10 - rising edge
 210           // 11 - falling edge
 211           //
 212           // ACPI spec definitions:
 213           // _HE: '1' is Edge, '0' is Level
 214           // _LL: '1' is ActiveHigh, '0' is ActiveLow (inverted from TCG spec)
 215           //
 216           If (LEqual (ITRG, 1)) {
 217             Or(INTE, 0x00000010, INTE)
 218           } Else {
 219             And(INTE, 0xFFFFFFEF, INTE)
 220           }
 221           if (LEqual (ILVL, 0)) {
 222             Or(INTE, 0x00000008, INTE)
 223           } Else {
 224             And(INTE, 0xFFFFFFF7, INTE)
 225           }
 226         }
 227       }
 228
 229       Method(_PRS,0,Serialized)
 230       {
 231         //
 232         // IRQNum = 0 means disable IRQ support
 233         //
 234         If (LEqual(IRQN, 0)) {
 235           Return (RES1)
 236         } ElseIf(LEqual(SFRB, 0)) {
 237           //
 238           // Long format. Possible resources PkgLength > 63
 239           //
 240           Return (RESL)
 241         } Else {
 242           //
 243           // Short format. Possible resources PkgLength <=63
 244           //
 245           Return (RESS)
 246         }
 247       }
 248
 249       Method (PTS, 1, Serialized)
 250       {
 251         //
 252         // Detect Sx state for MOR, only S4, S5 need to handle
 253         //
 254         If (LAnd (LLess (Arg0, 6), LGreater (Arg0, 3)))
 255         {
 256           //
 257           // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
 258           //
 259           If (LNot (And (MORD, 0x10)))
 260           {
 261             //
 262             // Triggle the SMI through ACPI _PTS method.
 263             //
 264             Store (0x02, MCIP)
 265
 266             //
 267             // Triggle the SMI interrupt
 268             //
 269             Store (MCIN, IOB2)
 270           }
 271         }
 272         Return (0)
 273       }
 274
 275       Method (_STA, 0)
 276       {
 277         if (LEqual (ACC0, 0xff))
 278         {
 279             Return (0)
 280         }
 281         Return (0x0f)
 282       }
 283
 284       //
 285       // TCG Hardware Information
 286       //
 287       Method (HINF, 3, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
 288       {
 289         //
 290         // Switch by function index
 291         //
 292         Switch (ToInteger(Arg1))
 293         {
 294           Case (0)
 295           {
 296             //
 297             // Standard query
 298             //
 299             Return (Buffer () {0x03})
 300           }
 301           Case (1)
 302           {
 303             //
 304             // Return failure if no TPM present
 305             //
 306             Name(TPMV, Package () {0x01, Package () {0x2, 0x0}})
 307             if (LEqual (_STA (), 0x00))
 308             {
 309               Return (Package () {0x00})
 310             }
 311
 312             //
 313             // Return TPM version
 314             //
 315             Return (TPMV)
 316           }
 317           Default {BreakPoint}
 318         }
 319         Return (Buffer () {0})
 320       }
 321
 322       Name(TPM2, Package (0x02){
 323         Zero,
 324         Zero
 325       })
 326
 327       Name(TPM3, Package (0x03){
 328         Zero,
 329         Zero,
 330         Zero
 331       })
 332
 333       //
 334       // TCG Physical Presence Interface
 335       //
 336       Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
 337       {
 338         //
 339         // Switch by function index
 340         //
 341         Switch (ToInteger(Arg1))
 342         {
 343           Case (0)
 344           {
 345             //
 346             // Standard query, supports function 1-8
 347             //
 348             Return (Buffer () {0xFF, 0x01})
 349           }
 350           Case (1)
 351           {
 352             //
 353             // a) Get Physical Presence Interface Version
 354             //
 355             Return ("$PV")
 356           }
 357           Case (2)
 358           {
 359             //
 360             // b) Submit TPM Operation Request to Pre-OS Environment
 361             //
 362
 363             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
 364             Store (0, PPRM)
 365             Store (0x02, PPIP)
 366
 367             //
 368             // Triggle the SMI interrupt
 369             //
 370             Store (PPIN, IOB2)
 371             Return (FRET)
 372
 373
 374           }
 375           Case (3)
 376           {
 377             //
 378             // c) Get Pending TPM Operation Requested By the OS
 379             //
 380
 381             Store (PPRQ, Index (TPM2, 0x01))
 382             Return (TPM2)
 383           }
 384           Case (4)
 385           {
 386             //
 387             // d) Get Platform-Specific Action to Transition to Pre-OS Environment
 388             //
 389             Return (2)
 390           }
 391           Case (5)
 392           {
 393             //
 394             // e) Return TPM Operation Response to OS Environment
 395             //
 396             Store (0x05, PPIP)
 397
 398             //
 399             // Triggle the SMI interrupt
 400             //
 401             Store (PPIN, IOB2)
 402
 403             Store (LPPR, Index (TPM3, 0x01))
 404             Store (PPRP, Index (TPM3, 0x02))
 405
 406             Return (TPM3)
 407           }
 408           Case (6)
 409           {
 410
 411             //
 412             // f) Submit preferred user language (Not implemented)
 413             //
 414
 415             Return (3)
 416
 417           }
 418           Case (7)
 419           {
 420             //
 421             // g) Submit TPM Operation Request to Pre-OS Environment 2
 422             //
 423             Store (7, PPIP)
 424             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
 425             Store (0, PPRM)
 426             If (LEqual (PPRQ, 23)) {
 427               Store (DerefOf (Index (Arg2, 0x01)), PPRM)
 428             }
 429
 430             //
 431             // Triggle the SMI interrupt
 432             //
 433             Store (PPIN, IOB2)
 434             Return (FRET)
 435           }
 436           Case (8)
 437           {
 438             //
 439             // e) Get User Confirmation Status for Operation
 440             //
 441             Store (8, PPIP)
 442             Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
 443
 444             //
 445             // Triggle the SMI interrupt
 446             //
 447             Store (PPIN, IOB2)
 448
 449             Return (FRET)
 450           }
 451
 452           Default {BreakPoint}
 453         }
 454         Return (1)
 455       }
 456
 457       Method (TMCI, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
 458       {
 459         //
 460         // Switch by function index
 461         //
 462         Switch (ToInteger (Arg1))
 463         {
 464           Case (0)
 465           {
 466             //
 467             // Standard query, supports function 1-1
 468             //
 469             Return (Buffer () {0x03})
 470           }
 471           Case (1)
 472           {
 473             //
 474             // Save the Operation Value of the Request to MORD (reserved memory)
 475             //
 476             Store (DerefOf (Index (Arg2, 0x00)), MORD)
 477
 478             //
 479             // Triggle the SMI through ACPI _DSM method.
 480             //
 481             Store (0x01, MCIP)
 482
 483             //
 484             // Triggle the SMI interrupt
 485             //
 486             Store (MCIN, IOB2)
 487             Return (MRET)
 488           }
 489           Default {BreakPoint}
 490         }
 491         Return (1)
 492       }
 493
 494       Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})
 495       {
 496
 497         //
 498         // TCG Hardware Information
 499         //
 500         If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8")))
 501         {
 502           Return (HINF (Arg1, Arg2, Arg3))
 503         }
 504
 505         //
 506         // TCG Physical Presence Interface
 507         //
 508         If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653")))
 509         {
 510           Return (TPPI (Arg1, Arg2, Arg3))
 511         }
 512
 513         //
 514         // TCG Memory Clear Interface
 515         //
 516         If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))
 517         {
 518           Return (TMCI (Arg1, Arg2, Arg3))
 519         }
 520
 521         Return (Buffer () {0})
 522       }
 523     }
 524   }
 525 }