ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Pptt/PpttParser.c

   1 /** @file
   2   PPTT table parser
   3
   4   Copyright (c) 2019 - 2020, ARM Limited. All rights reserved.
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7   @par Reference(s):
   8     - ACPI 6.3 Specification - January 2019
   9     - ARM Architecture Reference Manual ARMv8 (D.a)
  10 **/
  11
  12 #include <Library/PrintLib.h>
  13 #include <Library/UefiLib.h>
  14 #include "AcpiParser.h"
  15 #include "AcpiView.h"
  16 #include "PpttParser.h"
  17
  18 // Local variables
  19 STATIC CONST UINT8*  ProcessorTopologyStructureType;
  20 STATIC CONST UINT8*  ProcessorTopologyStructureLength;
  21 STATIC CONST UINT32* NumberOfPrivateResources;
  22 STATIC ACPI_DESCRIPTION_HEADER_INFO AcpiHdrInfo;
  23
  24 /**
  25   This function validates the Cache Type Structure (Type 1) 'Number of sets'
  26   field.
  27
  28   @param [in] Ptr       Pointer to the start of the field data.
  29   @param [in] Context   Pointer to context specific information e.g. this
  30                         could be a pointer to the ACPI table header.
  31 **/
  32 STATIC
  33 VOID
  34 EFIAPI
  35 ValidateCacheNumberOfSets (
  36   IN UINT8* Ptr,
  37   IN VOID*  Context
  38   )
  39 {
  40   UINT32 NumberOfSets;
  41   NumberOfSets = *(UINT32*)Ptr;
  42
  43   if (NumberOfSets == 0) {
  44     IncrementErrorCount ();
  45     Print (L"\nERROR: Cache number of sets must be greater than 0");
  46     return;
  47   }
  48
  49 #if defined(MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)
  50   if (NumberOfSets > PPTT_ARM_CCIDX_CACHE_NUMBER_OF_SETS_MAX) {
  51     IncrementErrorCount ();
  52     Print (
  53       L"\nERROR: When ARMv8.3-CCIDX is implemented the maximum cache number of "
  54         L"sets must be less than or equal to %d",
  55       PPTT_ARM_CCIDX_CACHE_NUMBER_OF_SETS_MAX
  56       );
  57     return;
  58   }
  59
  60   if (NumberOfSets > PPTT_ARM_CACHE_NUMBER_OF_SETS_MAX) {
  61     IncrementWarningCount ();
  62     Print (
  63       L"\nWARNING: Without ARMv8.3-CCIDX, the maximum cache number of sets "
  64         L"must be less than or equal to %d. Ignore this message if "
  65         L"ARMv8.3-CCIDX is implemented",
  66       PPTT_ARM_CACHE_NUMBER_OF_SETS_MAX
  67       );
  68     return;
  69   }
  70 #endif
  71
  72 }
  73
  74 /**
  75   This function validates the Cache Type Structure (Type 1) 'Associativity'
  76   field.
  77
  78   @param [in] Ptr       Pointer to the start of the field data.
  79   @param [in] Context   Pointer to context specific information e.g. this
  80                         could be a pointer to the ACPI table header.
  81 **/
  82 STATIC
  83 VOID
  84 EFIAPI
  85 ValidateCacheAssociativity (
  86   IN UINT8* Ptr,
  87   IN VOID*  Context
  88   )
  89 {
  90   UINT8 Associativity;
  91   Associativity = *(UINT8*)Ptr;
  92
  93   if (Associativity == 0) {
  94     IncrementErrorCount ();
  95     Print (L"\nERROR: Cache associativity must be greater than 0");
  96     return;
  97   }
  98 }
  99
 100 /**
 101   This function validates the Cache Type Structure (Type 1) Line size field.
 102
 103   @param [in] Ptr     Pointer to the start of the field data.
 104   @param [in] Context Pointer to context specific information e.g. this
 105                       could be a pointer to the ACPI table header.
 106 **/
 107 STATIC
 108 VOID
 109 EFIAPI
 110 ValidateCacheLineSize (
 111   IN UINT8* Ptr,
 112   IN VOID*  Context
 113   )
 114 {
 115 #if defined(MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)
 116   // Reference: ARM Architecture Reference Manual ARMv8 (D.a)
 117   // Section D12.2.25: CCSIDR_EL1, Current Cache Size ID Register
 118   //   LineSize, bits [2:0]
 119   //     (Log2(Number of bytes in cache line)) - 4.
 120
 121   UINT16 LineSize;
 122   LineSize = *(UINT16*)Ptr;
 123
 124   if ((LineSize < PPTT_ARM_CACHE_LINE_SIZE_MIN) ||
 125       (LineSize > PPTT_ARM_CACHE_LINE_SIZE_MAX)) {
 126     IncrementErrorCount ();
 127     Print (
 128       L"\nERROR: The cache line size must be between %d and %d bytes"
 129         L" on ARM Platforms.",
 130       PPTT_ARM_CACHE_LINE_SIZE_MIN,
 131       PPTT_ARM_CACHE_LINE_SIZE_MAX
 132       );
 133     return;
 134   }
 135
 136   if ((LineSize & (LineSize - 1)) != 0) {
 137     IncrementErrorCount ();
 138     Print (L"\nERROR: The cache line size is not a power of 2.");
 139   }
 140 #endif
 141 }
 142
 143 /**
 144   This function validates the Cache Type Structure (Type 1) Attributes field.
 145
 146   @param [in] Ptr     Pointer to the start of the field data.
 147   @param [in] Context Pointer to context specific information e.g. this
 148                       could be a pointer to the ACPI table header.
 149 **/
 150 STATIC
 151 VOID
 152 EFIAPI
 153 ValidateCacheAttributes (
 154   IN UINT8* Ptr,
 155   IN VOID*  Context
 156   )
 157 {
 158   // Reference: Advanced Configuration and Power Interface (ACPI) Specification
 159   //            Version 6.2 Errata A, September 2017
 160   // Table 5-153: Cache Type Structure
 161   UINT8 Attributes;
 162   Attributes = *(UINT8*)Ptr;
 163
 164   if ((Attributes & 0xE0) != 0) {
 165     IncrementErrorCount ();
 166     Print (
 167       L"\nERROR: Attributes bits [7:5] are reserved and must be zero.",
 168       Attributes
 169       );
 170     return;
 171   }
 172 }
 173
 174 /**
 175   An ACPI_PARSER array describing the ACPI PPTT Table.
 176 **/
 177 STATIC CONST ACPI_PARSER PpttParser[] = {
 178   PARSE_ACPI_HEADER (&AcpiHdrInfo)
 179 };
 180
 181 /**
 182   An ACPI_PARSER array describing the processor topology structure header.
 183 **/
 184 STATIC CONST ACPI_PARSER ProcessorTopologyStructureHeaderParser[] = {
 185   {L"Type", 1, 0, NULL, NULL, (VOID**)&ProcessorTopologyStructureType,
 186    NULL, NULL},
 187   {L"Length", 1, 1, NULL, NULL, (VOID**)&ProcessorTopologyStructureLength,
 188    NULL, NULL},
 189   {L"Reserved", 2, 2, NULL, NULL, NULL, NULL, NULL}
 190 };
 191
 192 /**
 193   An ACPI_PARSER array describing the Processor Hierarchy Node Structure - Type 0.
 194 **/
 195 STATIC CONST ACPI_PARSER ProcessorHierarchyNodeStructureParser[] = {
 196   {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
 197   {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
 198   {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
 199
 200   {L"Flags", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
 201   {L"Parent", 4, 8, L"0x%x", NULL, NULL, NULL, NULL},
 202   {L"ACPI Processor ID", 4, 12, L"0x%x", NULL, NULL, NULL, NULL},
 203   {L"Number of private resources", 4, 16, L"%d", NULL,
 204    (VOID**)&NumberOfPrivateResources, NULL, NULL}
 205 };
 206
 207 /**
 208   An ACPI_PARSER array describing the Cache Type Structure - Type 1.
 209 **/
 210 STATIC CONST ACPI_PARSER CacheTypeStructureParser[] = {
 211   {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
 212   {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
 213   {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
 214
 215   {L"Flags", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
 216   {L"Next Level of Cache", 4, 8, L"0x%x", NULL, NULL, NULL, NULL},
 217   {L"Size", 4, 12, L"0x%x", NULL, NULL, NULL, NULL},
 218   {L"Number of sets", 4, 16, L"%d", NULL, NULL, ValidateCacheNumberOfSets, NULL},
 219   {L"Associativity", 1, 20, L"%d", NULL, NULL, ValidateCacheAssociativity, NULL},
 220   {L"Attributes", 1, 21, L"0x%x", NULL, NULL, ValidateCacheAttributes, NULL},
 221   {L"Line size", 2, 22, L"%d", NULL, NULL, ValidateCacheLineSize, NULL}
 222 };
 223
 224 /**
 225   An ACPI_PARSER array describing the ID Type Structure - Type 2.
 226 **/
 227 STATIC CONST ACPI_PARSER IdStructureParser[] = {
 228   {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
 229   {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
 230   {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
 231
 232   {L"VENDOR_ID", 4, 4, NULL, Dump4Chars, NULL, NULL, NULL},
 233   {L"LEVEL_1_ID", 8, 8, L"0x%x", NULL, NULL, NULL, NULL},
 234   {L"LEVEL_2_ID", 8, 16, L"0x%x", NULL, NULL, NULL, NULL},
 235   {L"MAJOR_REV", 2, 24, L"0x%x", NULL, NULL, NULL, NULL},
 236   {L"MINOR_REV", 2, 26, L"0x%x", NULL, NULL, NULL, NULL},
 237   {L"SPIN_REV", 2, 28, L"0x%x", NULL, NULL, NULL, NULL},
 238 };
 239
 240 /**
 241   This function parses the Processor Hierarchy Node Structure (Type 0).
 242
 243   @param [in] Ptr     Pointer to the start of the Processor Hierarchy Node
 244                       Structure data.
 245   @param [in] Length  Length of the Processor Hierarchy Node Structure.
 246 **/
 247 STATIC
 248 VOID
 249 DumpProcessorHierarchyNodeStructure (
 250   IN UINT8* Ptr,
 251   IN UINT8  Length
 252   )
 253 {
 254   UINT32 Offset;
 255   UINT32 Index;
 256   CHAR16 Buffer[OUTPUT_FIELD_COLUMN_WIDTH];
 257
 258   Offset = ParseAcpi (
 259              TRUE,
 260              2,
 261              "Processor Hierarchy Node Structure",
 262              Ptr,
 263              Length,
 264              PARSER_PARAMS (ProcessorHierarchyNodeStructureParser)
 265              );
 266
 267   // Check if the values used to control the parsing logic have been
 268   // successfully read.
 269   if (NumberOfPrivateResources == NULL) {
 270     IncrementErrorCount ();
 271     Print (
 272       L"ERROR: Insufficient Processor Hierarchy Node length. Length = %d.\n",
 273       Length
 274       );
 275     return;
 276   }
 277
 278   // Make sure the Private Resource array lies inside this structure
 279   if (Offset + (*NumberOfPrivateResources * sizeof (UINT32)) > Length) {
 280     IncrementErrorCount ();
 281     Print (
 282       L"ERROR: Invalid Number of Private Resources. " \
 283         L"PrivateResourceCount = %d. RemainingBufferLength = %d. " \
 284         L"Parsing of this structure aborted.\n",
 285       *NumberOfPrivateResources,
 286       Length - Offset
 287       );
 288     return;
 289   }
 290
 291   Index = 0;
 292
 293   // Parse the specified number of private resource references or the Processor
 294   // Hierarchy Node length. Whichever is minimum.
 295   while (Index < *NumberOfPrivateResources) {
 296     UnicodeSPrint (
 297       Buffer,
 298       sizeof (Buffer),
 299       L"Private resources [%d]",
 300       Index
 301       );
 302
 303     PrintFieldName (4, Buffer);
 304     Print (
 305       L"0x%x\n",
 306       *((UINT32*)(Ptr + Offset))
 307       );
 308
 309     Offset += sizeof (UINT32);
 310     Index++;
 311   }
 312 }
 313
 314 /**
 315   This function parses the Cache Type Structure (Type 1).
 316
 317   @param [in] Ptr     Pointer to the start of the Cache Type Structure data.
 318   @param [in] Length  Length of the Cache Type Structure.
 319 **/
 320 STATIC
 321 VOID
 322 DumpCacheTypeStructure (
 323   IN UINT8* Ptr,
 324   IN UINT8  Length
 325   )
 326 {
 327   ParseAcpi (
 328     TRUE,
 329     2,
 330     "Cache Type Structure",
 331     Ptr,
 332     Length,
 333     PARSER_PARAMS (CacheTypeStructureParser)
 334     );
 335 }
 336
 337 /**
 338   This function parses the ID Structure (Type 2).
 339
 340   @param [in] Ptr     Pointer to the start of the ID Structure data.
 341   @param [in] Length  Length of the ID Structure.
 342 **/
 343 STATIC
 344 VOID
 345 DumpIDStructure (
 346   IN UINT8* Ptr,
 347   IN UINT8 Length
 348   )
 349 {
 350   ParseAcpi (
 351     TRUE,
 352     2,
 353     "ID Structure",
 354     Ptr,
 355     Length,
 356     PARSER_PARAMS (IdStructureParser)
 357     );
 358 }
 359
 360 /**
 361   This function parses the ACPI PPTT table.
 362   When trace is enabled this function parses the PPTT table and
 363   traces the ACPI table fields.
 364
 365   This function parses the following processor topology structures:
 366     - Processor hierarchy node structure (Type 0)
 367     - Cache Type Structure (Type 1)
 368     - ID structure (Type 2)
 369
 370   This function also performs validation of the ACPI table fields.
 371
 372   @param [in] Trace              If TRUE, trace the ACPI fields.
 373   @param [in] Ptr                Pointer to the start of the buffer.
 374   @param [in] AcpiTableLength    Length of the ACPI table.
 375   @param [in] AcpiTableRevision  Revision of the ACPI table.
 376 **/
 377 VOID
 378 EFIAPI
 379 ParseAcpiPptt (
 380   IN BOOLEAN Trace,
 381   IN UINT8*  Ptr,
 382   IN UINT32  AcpiTableLength,
 383   IN UINT8   AcpiTableRevision
 384   )
 385 {
 386   UINT32 Offset;
 387   UINT8* ProcessorTopologyStructurePtr;
 388
 389   if (!Trace) {
 390     return;
 391   }
 392
 393   Offset = ParseAcpi (
 394              TRUE,
 395              0,
 396              "PPTT",
 397              Ptr,
 398              AcpiTableLength,
 399              PARSER_PARAMS (PpttParser)
 400              );
 401
 402   ProcessorTopologyStructurePtr = Ptr + Offset;
 403
 404   while (Offset < AcpiTableLength) {
 405     // Parse Processor Hierarchy Node Structure to obtain Type and Length.
 406     ParseAcpi (
 407       FALSE,
 408       0,
 409       NULL,
 410       ProcessorTopologyStructurePtr,
 411       AcpiTableLength - Offset,
 412       PARSER_PARAMS (ProcessorTopologyStructureHeaderParser)
 413       );
 414
 415     // Check if the values used to control the parsing logic have been
 416     // successfully read.
 417     if ((ProcessorTopologyStructureType == NULL) ||
 418         (ProcessorTopologyStructureLength == NULL)) {
 419       IncrementErrorCount ();
 420       Print (
 421         L"ERROR: Insufficient remaining table buffer length to read the " \
 422           L"processor topology structure header. Length = %d.\n",
 423         AcpiTableLength - Offset
 424         );
 425       return;
 426     }
 427
 428     // Validate Processor Topology Structure length
 429     if ((*ProcessorTopologyStructureLength == 0) ||
 430         ((Offset + (*ProcessorTopologyStructureLength)) > AcpiTableLength)) {
 431       IncrementErrorCount ();
 432       Print (
 433         L"ERROR: Invalid Processor Topology Structure length. " \
 434           L"Length = %d. Offset = %d. AcpiTableLength = %d.\n",
 435         *ProcessorTopologyStructureLength,
 436         Offset,
 437         AcpiTableLength
 438         );
 439       return;
 440     }
 441
 442     PrintFieldName (2, L"* Structure Offset *");
 443     Print (L"0x%x\n", Offset);
 444
 445     switch (*ProcessorTopologyStructureType) {
 446       case EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR:
 447         DumpProcessorHierarchyNodeStructure (
 448           ProcessorTopologyStructurePtr,
 449           *ProcessorTopologyStructureLength
 450           );
 451         break;
 452       case EFI_ACPI_6_2_PPTT_TYPE_CACHE:
 453         DumpCacheTypeStructure (
 454           ProcessorTopologyStructurePtr,
 455           *ProcessorTopologyStructureLength
 456           );
 457         break;
 458       case EFI_ACPI_6_2_PPTT_TYPE_ID:
 459         DumpIDStructure (
 460           ProcessorTopologyStructurePtr,
 461           *ProcessorTopologyStructureLength
 462           );
 463         break;
 464       default:
 465         IncrementErrorCount ();
 466         Print (
 467           L"ERROR: Unknown processor topology structure:"
 468             L" Type = %d, Length = %d\n",
 469           *ProcessorTopologyStructureType,
 470           *ProcessorTopologyStructureLength
 471           );
 472     }
 473
 474     ProcessorTopologyStructurePtr += *ProcessorTopologyStructureLength;
 475     Offset += *ProcessorTopologyStructureLength;
 476   } // while
 477 }