ShellPkg/Library/UefiShellDebug1CommandsLib/Mm.c

   1 /** @file
   2   Main file for Mm shell Debug1 function.
   3
   4   (C) Copyright 2015 Hewlett-Packard Development Company, L.P.<BR>
   5   Copyright (c) 2005 - 2017, Intel Corporation. All rights reserved.<BR>
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 **/
   9
  10 #include "UefiShellDebug1CommandsLib.h"
  11 #include <Library/ShellLib.h>
  12 #include <Library/IoLib.h>
  13 #include <Protocol/PciRootBridgeIo.h>
  14 #include <Protocol/DeviceIo.h>
  15
  16 typedef enum {
  17   ShellMmMemory,
  18   ShellMmMemoryMappedIo,
  19   ShellMmIo,
  20   ShellMmPci,
  21   ShellMmPciExpress
  22 } SHELL_MM_ACCESS_TYPE;
  23
  24 CONST UINT16  mShellMmAccessTypeStr[] = {
  25   STRING_TOKEN (STR_MM_MEM),
  26   STRING_TOKEN (STR_MM_MMIO),
  27   STRING_TOKEN (STR_MM_IO),
  28   STRING_TOKEN (STR_MM_PCI),
  29   STRING_TOKEN (STR_MM_PCIE)
  30 };
  31
  32 STATIC CONST SHELL_PARAM_ITEM  ParamList[] = {
  33   { L"-mmio", TypeFlag  },
  34   { L"-mem",  TypeFlag  },
  35   { L"-io",   TypeFlag  },
  36   { L"-pci",  TypeFlag  },
  37   { L"-pcie", TypeFlag  },
  38   { L"-n",    TypeFlag  },
  39   { L"-w",    TypeValue },
  40   { NULL,     TypeMax   }
  41 };
  42
  43 CONST UINT64                                 mShellMmMaxNumber[] = {
  44   0, MAX_UINT8, MAX_UINT16, 0, MAX_UINT32, 0, 0, 0, MAX_UINT64
  45 };
  46 CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  mShellMmRootBridgeIoWidth[] = {
  47   0, EfiPciWidthUint8, EfiPciWidthUint16, 0, EfiPciWidthUint32, 0, 0, 0, EfiPciWidthUint64
  48 };
  49 CONST EFI_CPU_IO_PROTOCOL_WIDTH              mShellMmCpuIoWidth[] = {
  50   0, EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, 0, EfiCpuIoWidthUint32, 0, 0, 0, EfiCpuIoWidthUint64
  51 };
  52
  53 /**
  54   Extract the PCI segment, bus, device, function, register from
  55   from a PCI or PCIE format of address..
  56
  57   @param[in]  PciFormat      Whether the address is of PCI format of PCIE format.
  58   @param[in]  Address        PCI or PCIE address.
  59   @param[out] Segment        PCI segment number.
  60   @param[out] Bus            PCI bus number.
  61   @param[out] Device         PCI device number.
  62   @param[out] Function       PCI function number.
  63   @param[out] Register       PCI register offset.
  64 **/
  65 VOID
  66 ShellMmDecodePciAddress (
  67   IN BOOLEAN  PciFormat,
  68   IN UINT64   Address,
  69   OUT UINT32  *Segment,
  70   OUT UINT8   *Bus,
  71   OUT UINT8   *Device    OPTIONAL,
  72   OUT UINT8   *Function  OPTIONAL,
  73   OUT UINT32  *Register  OPTIONAL
  74   )
  75 {
  76   if (PciFormat) {
  77     //
  78     // PCI Configuration Space.The address will have the format ssssbbddffrr,
  79     // where ssss = Segment, bb = Bus, dd = Device, ff = Function and rr = Register.
  80     //
  81     *Segment = (UINT32)(RShiftU64 (Address, 32) & 0xFFFF);
  82     *Bus     = (UINT8)(((UINT32)Address) >> 24);
  83
  84     if (Device != NULL) {
  85       *Device = (UINT8)(((UINT32)Address) >> 16);
  86     }
  87
  88     if (Function != NULL) {
  89       *Function = (UINT8)(((UINT32)Address) >> 8);
  90     }
  91
  92     if (Register != NULL) {
  93       *Register = (UINT8)Address;
  94     }
  95   } else {
  96     //
  97     // PCI Express Configuration Space.The address will have the format ssssssbbddffrrr,
  98     // where ssss = Segment, bb = Bus, dd = Device, ff = Function and rrr = Register.
  99     //
 100     *Segment = (UINT32)(RShiftU64 (Address, 36) & 0xFFFF);
 101     *Bus     = (UINT8)RShiftU64 (Address, 28);
 102     if (Device != NULL) {
 103       *Device = (UINT8)(((UINT32)Address) >> 20);
 104     }
 105
 106     if (Function != NULL) {
 107       *Function = (UINT8)(((UINT32)Address) >> 12);
 108     }
 109
 110     if (Register != NULL) {
 111       *Register = (UINT32)(Address & 0xFFF);
 112     }
 113   }
 114 }
 115
 116 /**
 117   Read or write some data from or into the Address.
 118
 119   @param[in]      AccessType      Access type.
 120   @param[in]      PciRootBridgeIo PciRootBridgeIo instance.
 121   @param[in]      CpuIo           CpuIo instance.
 122   @param[in]      Read            TRUE for read, FALSE for write.
 123   @param[in]      Addresss        The memory location to access.
 124   @param[in]      Size            The size of Buffer in Width sized units.
 125   @param[in, out] Buffer          The buffer to read into or write from.
 126 **/
 127 VOID
 128 ShellMmAccess (
 129   IN     SHELL_MM_ACCESS_TYPE             AccessType,
 130   IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *PciRootBridgeIo,
 131   IN     EFI_CPU_IO2_PROTOCOL             *CpuIo,
 132   IN     BOOLEAN                          Read,
 133   IN     UINT64                           Address,
 134   IN     UINTN                            Size,
 135   IN OUT VOID                             *Buffer
 136   )
 137 {
 138   EFI_STATUS                              Status;
 139   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM  RootBridgeIoMem;
 140   EFI_CPU_IO_PROTOCOL_IO_MEM              CpuIoMem;
 141   UINT32                                  Segment;
 142   UINT8                                   Bus;
 143   UINT8                                   Device;
 144   UINT8                                   Function;
 145   UINT32                                  Register;
 146
 147   if (AccessType == ShellMmMemory) {
 148     if (Read) {
 149       CopyMem (Buffer, (VOID *)(UINTN)Address, Size);
 150     } else {
 151       CopyMem ((VOID *)(UINTN)Address, Buffer, Size);
 152     }
 153   } else {
 154     RootBridgeIoMem = NULL;
 155     CpuIoMem        = NULL;
 156     switch (AccessType) {
 157       case ShellMmPci:
 158       case ShellMmPciExpress:
 159         ASSERT (PciRootBridgeIo != NULL);
 160         ShellMmDecodePciAddress ((BOOLEAN)(AccessType == ShellMmPci), Address, &Segment, &Bus, &Device, &Function, &Register);
 161         if (Read) {
 162           Status = PciRootBridgeIo->Pci.Read (
 163                                           PciRootBridgeIo,
 164                                           mShellMmRootBridgeIoWidth[Size],
 165                                           EFI_PCI_ADDRESS (Bus, Device, Function, Register),
 166                                           1,
 167                                           Buffer
 168                                           );
 169         } else {
 170           Status = PciRootBridgeIo->Pci.Write (
 171                                           PciRootBridgeIo,
 172                                           mShellMmRootBridgeIoWidth[Size],
 173                                           EFI_PCI_ADDRESS (Bus, Device, Function, Register),
 174                                           1,
 175                                           Buffer
 176                                           );
 177         }
 178
 179         ASSERT_EFI_ERROR (Status);
 180         return;
 181
 182       case ShellMmMemoryMappedIo:
 183         if (PciRootBridgeIo != NULL) {
 184           RootBridgeIoMem = Read ? PciRootBridgeIo->Mem.Read : PciRootBridgeIo->Mem.Write;
 185         }
 186
 187         if (CpuIo != NULL) {
 188           CpuIoMem = Read ? CpuIo->Mem.Read : CpuIo->Mem.Write;
 189         }
 190
 191         break;
 192
 193       case ShellMmIo:
 194         if (PciRootBridgeIo != NULL) {
 195           RootBridgeIoMem = Read ? PciRootBridgeIo->Io.Read : PciRootBridgeIo->Io.Write;
 196         }
 197
 198         if (CpuIo != NULL) {
 199           CpuIoMem = Read ? CpuIo->Io.Read : CpuIo->Io.Write;
 200         }
 201
 202         break;
 203       default:
 204         ASSERT (FALSE);
 205         break;
 206     }
 207
 208     Status = EFI_UNSUPPORTED;
 209     if (RootBridgeIoMem != NULL) {
 210       Status = RootBridgeIoMem (PciRootBridgeIo, mShellMmRootBridgeIoWidth[Size], Address, 1, Buffer);
 211     }
 212
 213     if (EFI_ERROR (Status) && (CpuIoMem != NULL)) {
 214       Status = CpuIoMem (CpuIo, mShellMmCpuIoWidth[Size], Address, 1, Buffer);
 215     }
 216
 217     if (EFI_ERROR (Status)) {
 218       if (AccessType == ShellMmIo) {
 219         switch (Size) {
 220           case 1:
 221             if (Read) {
 222               *(UINT8 *)Buffer = IoRead8 ((UINTN)Address);
 223             } else {
 224               IoWrite8 ((UINTN)Address, *(UINT8 *)Buffer);
 225             }
 226
 227             break;
 228           case 2:
 229             if (Read) {
 230               *(UINT16 *)Buffer = IoRead16 ((UINTN)Address);
 231             } else {
 232               IoWrite16 ((UINTN)Address, *(UINT16 *)Buffer);
 233             }
 234
 235             break;
 236           case 4:
 237             if (Read) {
 238               *(UINT32 *)Buffer = IoRead32 ((UINTN)Address);
 239             } else {
 240               IoWrite32 ((UINTN)Address, *(UINT32 *)Buffer);
 241             }
 242
 243             break;
 244           case 8:
 245             if (Read) {
 246               *(UINT64 *)Buffer = IoRead64 ((UINTN)Address);
 247             } else {
 248               IoWrite64 ((UINTN)Address, *(UINT64 *)Buffer);
 249             }
 250
 251             break;
 252           default:
 253             ASSERT (FALSE);
 254             break;
 255         }
 256       } else {
 257         switch (Size) {
 258           case 1:
 259             if (Read) {
 260               *(UINT8 *)Buffer = MmioRead8 ((UINTN)Address);
 261             } else {
 262               MmioWrite8 ((UINTN)Address, *(UINT8 *)Buffer);
 263             }
 264
 265             break;
 266           case 2:
 267             if (Read) {
 268               *(UINT16 *)Buffer = MmioRead16 ((UINTN)Address);
 269             } else {
 270               MmioWrite16 ((UINTN)Address, *(UINT16 *)Buffer);
 271             }
 272
 273             break;
 274           case 4:
 275             if (Read) {
 276               *(UINT32 *)Buffer = MmioRead32 ((UINTN)Address);
 277             } else {
 278               MmioWrite32 ((UINTN)Address, *(UINT32 *)Buffer);
 279             }
 280
 281             break;
 282           case 8:
 283             if (Read) {
 284               *(UINT64 *)Buffer = MmioRead64 ((UINTN)Address);
 285             } else {
 286               MmioWrite64 ((UINTN)Address, *(UINT64 *)Buffer);
 287             }
 288
 289             break;
 290           default:
 291             ASSERT (FALSE);
 292             break;
 293         }
 294       }
 295     }
 296   }
 297 }
 298
 299 /**
 300   Find the CpuIo instance and PciRootBridgeIo instance in the platform.
 301   If there are multiple PciRootBridgeIo instances, the instance which manages
 302   the Address is returned.
 303
 304   @param[in]  AccessType      Access type.
 305   @param[in]  Address         Address to access.
 306   @param[out] CpuIo           Return the CpuIo instance.
 307   @param[out] PciRootBridgeIo Return the proper PciRootBridgeIo instance.
 308
 309   @retval TRUE  There are PciRootBridgeIo instances in the platform.
 310   @retval FALSE There isn't PciRootBridgeIo instance in the platform.
 311 **/
 312 BOOLEAN
 313 ShellMmLocateIoProtocol (
 314   IN SHELL_MM_ACCESS_TYPE              AccessType,
 315   IN UINT64                            Address,
 316   OUT EFI_CPU_IO2_PROTOCOL             **CpuIo,
 317   OUT EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  **PciRootBridgeIo
 318   )
 319 {
 320   EFI_STATUS                         Status;
 321   UINTN                              Index;
 322   UINTN                              HandleCount;
 323   EFI_HANDLE                         *HandleBuffer;
 324   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL    *Io;
 325   UINT32                             Segment;
 326   UINT8                              Bus;
 327   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR  *Descriptors;
 328
 329   Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **)CpuIo);
 330   if (EFI_ERROR (Status)) {
 331     *CpuIo = NULL;
 332   }
 333
 334   *PciRootBridgeIo = NULL;
 335   HandleBuffer     = NULL;
 336   Status           = gBS->LocateHandleBuffer (
 337                             ByProtocol,
 338                             &gEfiPciRootBridgeIoProtocolGuid,
 339                             NULL,
 340                             &HandleCount,
 341                             &HandleBuffer
 342                             );
 343   if (EFI_ERROR (Status) || (HandleCount == 0) || (HandleBuffer == NULL)) {
 344     return FALSE;
 345   }
 346
 347   Segment = 0;
 348   Bus     = 0;
 349   if ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) {
 350     ShellMmDecodePciAddress ((BOOLEAN)(AccessType == ShellMmPci), Address, &Segment, &Bus, NULL, NULL, NULL);
 351   }
 352
 353   //
 354   // Find the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL of the specified segment & bus number
 355   //
 356   for (Index = 0; (Index < HandleCount) && (*PciRootBridgeIo == NULL); Index++) {
 357     Status = gBS->HandleProtocol (
 358                     HandleBuffer[Index],
 359                     &gEfiPciRootBridgeIoProtocolGuid,
 360                     (VOID *)&Io
 361                     );
 362     if (EFI_ERROR (Status)) {
 363       continue;
 364     }
 365
 366     if ((((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) && (Io->SegmentNumber == Segment)) ||
 367         ((AccessType == ShellMmIo) || (AccessType == ShellMmMemoryMappedIo))
 368         )
 369     {
 370       Status = Io->Configuration (Io, (VOID **)&Descriptors);
 371       if (!EFI_ERROR (Status)) {
 372         while (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR) {
 373           //
 374           // Compare the segment and bus range for PCI/PCIE access
 375           //
 376           if ((Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) &&
 377               ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) &&
 378               ((Bus >= Descriptors->AddrRangeMin) && (Bus <= Descriptors->AddrRangeMax))
 379               )
 380           {
 381             *PciRootBridgeIo = Io;
 382             break;
 383
 384             //
 385             // Compare the address range for MMIO/IO access
 386             //
 387           } else if ((((Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_IO) && (AccessType == ShellMmIo)) ||
 388                       ((Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) && (AccessType == ShellMmMemoryMappedIo))
 389                       ) && ((Address >= Descriptors->AddrRangeMin) && (Address <= Descriptors->AddrRangeMax))
 390                      )
 391           {
 392             *PciRootBridgeIo = Io;
 393             break;
 394           }
 395
 396           Descriptors++;
 397         }
 398       }
 399     }
 400   }
 401
 402   if (HandleBuffer != NULL) {
 403     FreePool (HandleBuffer);
 404   }
 405
 406   return TRUE;
 407 }
 408
 409 /**
 410   Function for 'mm' command.
 411
 412   @param[in] ImageHandle  Handle to the Image (NULL if Internal).
 413   @param[in] SystemTable  Pointer to the System Table (NULL if Internal).
 414 **/
 415 SHELL_STATUS
 416 EFIAPI
 417 ShellCommandRunMm (
 418   IN EFI_HANDLE        ImageHandle,
 419   IN EFI_SYSTEM_TABLE  *SystemTable
 420   )
 421 {
 422   EFI_STATUS                       Status;
 423   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *PciRootBridgeIo;
 424   EFI_CPU_IO2_PROTOCOL             *CpuIo;
 425   UINT64                           Address;
 426   UINT64                           Value;
 427   SHELL_MM_ACCESS_TYPE             AccessType;
 428   UINT64                           Buffer;
 429   UINTN                            Index;
 430   UINTN                            Size;
 431   BOOLEAN                          Complete;
 432   CHAR16                           *InputStr;
 433   BOOLEAN                          Interactive;
 434   LIST_ENTRY                       *Package;
 435   CHAR16                           *ProblemParam;
 436   SHELL_STATUS                     ShellStatus;
 437   CONST CHAR16                     *Temp;
 438   BOOLEAN                          HasPciRootBridgeIo;
 439
 440   Value       = 0;
 441   Address     = 0;
 442   ShellStatus = SHELL_SUCCESS;
 443   InputStr    = NULL;
 444   Size        = 1;
 445   AccessType  = ShellMmMemory;
 446
 447   //
 448   // Parse arguments
 449   //
 450   Status = ShellCommandLineParse (ParamList, &Package, &ProblemParam, TRUE);
 451   if (EFI_ERROR (Status)) {
 452     if ((Status == EFI_VOLUME_CORRUPTED) && (ProblemParam != NULL)) {
 453       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PROBLEM), gShellDebug1HiiHandle, L"mm", ProblemParam);
 454       FreePool (ProblemParam);
 455       ShellStatus = SHELL_INVALID_PARAMETER;
 456       goto Done;
 457     } else {
 458       ASSERT (FALSE);
 459     }
 460   } else {
 461     if (ShellCommandLineGetCount (Package) < 2) {
 462       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_FEW), gShellDebug1HiiHandle, L"mm");
 463       ShellStatus = SHELL_INVALID_PARAMETER;
 464       goto Done;
 465     } else if (ShellCommandLineGetCount (Package) > 3) {
 466       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
 467       ShellStatus = SHELL_INVALID_PARAMETER;
 468       goto Done;
 469     } else if (ShellCommandLineGetFlag (Package, L"-w") && (ShellCommandLineGetValue (Package, L"-w") == NULL)) {
 470       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_NO_VALUE), gShellDebug1HiiHandle, L"mm", L"-w");
 471       ShellStatus = SHELL_INVALID_PARAMETER;
 472       goto Done;
 473     } else {
 474       if (ShellCommandLineGetFlag (Package, L"-mmio")) {
 475         AccessType = ShellMmMemoryMappedIo;
 476         if (  ShellCommandLineGetFlag (Package, L"-mem")
 477            || ShellCommandLineGetFlag (Package, L"-io")
 478            || ShellCommandLineGetFlag (Package, L"-pci")
 479            || ShellCommandLineGetFlag (Package, L"-pcie")
 480               )
 481         {
 482           ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
 483           ShellStatus = SHELL_INVALID_PARAMETER;
 484           goto Done;
 485         }
 486       } else if (ShellCommandLineGetFlag (Package, L"-mem")) {
 487         AccessType = ShellMmMemory;
 488         if (  ShellCommandLineGetFlag (Package, L"-io")
 489            || ShellCommandLineGetFlag (Package, L"-pci")
 490            || ShellCommandLineGetFlag (Package, L"-pcie")
 491               )
 492         {
 493           ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
 494           ShellStatus = SHELL_INVALID_PARAMETER;
 495           goto Done;
 496         }
 497       } else if (ShellCommandLineGetFlag (Package, L"-io")) {
 498         AccessType = ShellMmIo;
 499         if (  ShellCommandLineGetFlag (Package, L"-pci")
 500            || ShellCommandLineGetFlag (Package, L"-pcie")
 501               )
 502         {
 503           ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
 504           ShellStatus = SHELL_INVALID_PARAMETER;
 505           goto Done;
 506         }
 507       } else if (ShellCommandLineGetFlag (Package, L"-pci")) {
 508         AccessType = ShellMmPci;
 509         if (ShellCommandLineGetFlag (Package, L"-pcie")
 510             )
 511         {
 512           ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
 513           ShellStatus = SHELL_INVALID_PARAMETER;
 514           goto Done;
 515         }
 516       } else if (ShellCommandLineGetFlag (Package, L"-pcie")) {
 517         AccessType = ShellMmPciExpress;
 518       }
 519     }
 520
 521     //
 522     // Non interactive for a script file or for the specific parameter
 523     //
 524     Interactive = TRUE;
 525     if (gEfiShellProtocol->BatchIsActive () || ShellCommandLineGetFlag (Package, L"-n")) {
 526       Interactive = FALSE;
 527     }
 528
 529     Temp = ShellCommandLineGetValue (Package, L"-w");
 530     if (Temp != NULL) {
 531       Size = ShellStrToUintn (Temp);
 532     }
 533
 534     if ((Size != 1) && (Size != 2) && (Size != 4) && (Size != 8)) {
 535       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PROBLEM_VAL), gShellDebug1HiiHandle, L"mm", Temp, L"-w");
 536       ShellStatus = SHELL_INVALID_PARAMETER;
 537       goto Done;
 538     }
 539
 540     Temp   = ShellCommandLineGetRawValue (Package, 1);
 541     Status = ShellConvertStringToUint64 (Temp, &Address, TRUE, FALSE);
 542     if (EFI_ERROR (Status)) {
 543       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp);
 544       ShellStatus = SHELL_INVALID_PARAMETER;
 545       goto Done;
 546     }
 547
 548     if ((Address & (Size - 1)) != 0) {
 549       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_NOT_ALIGNED), gShellDebug1HiiHandle, L"mm", Address);
 550       ShellStatus = SHELL_INVALID_PARAMETER;
 551       goto Done;
 552     }
 553
 554     //
 555     // locate IO protocol interface
 556     //
 557     HasPciRootBridgeIo = ShellMmLocateIoProtocol (AccessType, Address, &CpuIo, &PciRootBridgeIo);
 558     if ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) {
 559       if (!HasPciRootBridgeIo) {
 560         ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PCIRBIO_NF), gShellDebug1HiiHandle, L"mm");
 561         ShellStatus = SHELL_NOT_FOUND;
 562         goto Done;
 563       }
 564
 565       if (PciRootBridgeIo == NULL) {
 566         ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_PCIE_ADDRESS_RANGE), gShellDebug1HiiHandle, L"mm", Address);
 567         ShellStatus = SHELL_INVALID_PARAMETER;
 568         goto Done;
 569       }
 570     }
 571
 572     //
 573     // Mode 1: Directly set a value
 574     //
 575     Temp = ShellCommandLineGetRawValue (Package, 2);
 576     if (Temp != NULL) {
 577       Status = ShellConvertStringToUint64 (Temp, &Value, TRUE, FALSE);
 578       if (EFI_ERROR (Status)) {
 579         ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp);
 580         ShellStatus = SHELL_INVALID_PARAMETER;
 581         goto Done;
 582       }
 583
 584       if (Value > mShellMmMaxNumber[Size]) {
 585         ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp);
 586         ShellStatus = SHELL_INVALID_PARAMETER;
 587         goto Done;
 588       }
 589
 590       ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, FALSE, Address, Size, &Value);
 591       goto Done;
 592     }
 593
 594     //
 595     // Mode 2: Directly show a value
 596     //
 597     if (!Interactive) {
 598       if (!gEfiShellProtocol->BatchIsActive ()) {
 599         ShellPrintHiiEx (-1, -1, NULL, mShellMmAccessTypeStr[AccessType], gShellDebug1HiiHandle);
 600       }
 601
 602       ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, TRUE, Address, Size, &Buffer);
 603
 604       if (!gEfiShellProtocol->BatchIsActive ()) {
 605         ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS), gShellDebug1HiiHandle, Address);
 606       }
 607
 608       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_BUF), gShellDebug1HiiHandle, Size * 2, Buffer & mShellMmMaxNumber[Size]);
 609       ShellPrintEx (-1, -1, L"\r\n");
 610       goto Done;
 611     }
 612
 613     //
 614     // Mode 3: Show or set values in interactive mode
 615     //
 616     Complete = FALSE;
 617     do {
 618       ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, TRUE, Address, Size, &Buffer);
 619       ShellPrintHiiEx (-1, -1, NULL, mShellMmAccessTypeStr[AccessType], gShellDebug1HiiHandle);
 620       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS), gShellDebug1HiiHandle, Address);
 621       ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_BUF), gShellDebug1HiiHandle, Size * 2, Buffer & mShellMmMaxNumber[Size]);
 622       ShellPrintEx (-1, -1, L" > ");
 623       //
 624       // wait user input to modify
 625       //
 626       if (InputStr != NULL) {
 627         FreePool (InputStr);
 628         InputStr = NULL;
 629       }
 630
 631       ShellPromptForResponse (ShellPromptResponseTypeFreeform, NULL, (VOID **)&InputStr);
 632
 633       if (InputStr != NULL) {
 634         //
 635         // skip space characters
 636         //
 637         for (Index = 0; InputStr[Index] == ' '; Index++) {
 638         }
 639
 640         if (InputStr[Index] != CHAR_NULL) {
 641           if ((InputStr[Index] == '.') || (InputStr[Index] == 'q') || (InputStr[Index] == 'Q')) {
 642             Complete = TRUE;
 643           } else if (!EFI_ERROR (ShellConvertStringToUint64 (InputStr + Index, &Buffer, TRUE, TRUE)) &&
 644                      (Buffer <= mShellMmMaxNumber[Size])
 645                      )
 646           {
 647             ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, FALSE, Address, Size, &Buffer);
 648           } else {
 649             ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ERROR), gShellDebug1HiiHandle, L"mm");
 650             continue;
 651           }
 652         }
 653       }
 654
 655       Address += Size;
 656       ShellPrintEx (-1, -1, L"\r\n");
 657     } while (!Complete);
 658   }
 659
 660   ASSERT (ShellStatus == SHELL_SUCCESS);
 661
 662 Done:
 663   if (InputStr != NULL) {
 664     FreePool (InputStr);
 665   }
 666
 667   if (Package != NULL) {
 668     ShellCommandLineFreeVarList (Package);
 669   }
 670
 671   return ShellStatus;
 672 }