1 ;------------------------------------------------------------------------------
3 ; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
4 ; SPDX-License-Identifier: BSD-2-Clause-Patent
12 ; Debug interrupt handle functions.
14 ;------------------------------------------------------------------------------
16 #include "DebugException.h"
21 extern ASM_PFX(InterruptProcess)
23 global ASM_PFX(Exception0Handle)
24 global ASM_PFX(TimerInterruptHandle)
25 global ASM_PFX(ExceptionStubHeaderSize)
27 %macro AGENT_HANDLER_SIGNATURE 0
28 db 0x41, 0x47, 0x54, 0x48 ; SIGNATURE_32('A','G','T','H')
33 ASM_PFX(ExceptionStubHeaderSize): DD Exception1Handle - ASM_PFX(Exception0Handle)
34 CommonEntryAddr: DD CommonEntry
38 AGENT_HANDLER_SIGNATURE
39 ASM_PFX(Exception0Handle):
43 jmp dword [CommonEntryAddr]
44 AGENT_HANDLER_SIGNATURE
49 jmp dword [CommonEntryAddr]
50 AGENT_HANDLER_SIGNATURE
55 jmp dword [CommonEntryAddr]
56 AGENT_HANDLER_SIGNATURE
61 jmp dword [CommonEntryAddr]
62 AGENT_HANDLER_SIGNATURE
67 jmp dword [CommonEntryAddr]
68 AGENT_HANDLER_SIGNATURE
73 jmp dword [CommonEntryAddr]
74 AGENT_HANDLER_SIGNATURE
79 jmp dword [CommonEntryAddr]
80 AGENT_HANDLER_SIGNATURE
85 jmp dword [CommonEntryAddr]
86 AGENT_HANDLER_SIGNATURE
91 jmp dword [CommonEntryAddr]
92 AGENT_HANDLER_SIGNATURE
97 jmp dword [CommonEntryAddr]
98 AGENT_HANDLER_SIGNATURE
103 jmp dword [CommonEntryAddr]
104 AGENT_HANDLER_SIGNATURE
109 jmp dword [CommonEntryAddr]
110 AGENT_HANDLER_SIGNATURE
115 jmp dword [CommonEntryAddr]
116 AGENT_HANDLER_SIGNATURE
121 jmp dword [CommonEntryAddr]
122 AGENT_HANDLER_SIGNATURE
127 jmp dword [CommonEntryAddr]
128 AGENT_HANDLER_SIGNATURE
133 jmp dword [CommonEntryAddr]
134 AGENT_HANDLER_SIGNATURE
139 jmp dword [CommonEntryAddr]
140 AGENT_HANDLER_SIGNATURE
145 jmp dword [CommonEntryAddr]
146 AGENT_HANDLER_SIGNATURE
151 jmp dword [CommonEntryAddr]
152 AGENT_HANDLER_SIGNATURE
157 jmp dword [CommonEntryAddr]
158 AGENT_HANDLER_SIGNATURE
159 ASM_PFX(TimerInterruptHandle):
163 jmp dword [CommonEntryAddr]
167 ; +---------------------+
169 ; +---------------------+
171 ; +---------------------+
173 ; +---------------------+
175 ; +---------------------+
176 ; + EAX / Vector Number +
177 ; +---------------------+
179 ; +---------------------+ <-- EBP
181 cmp eax, DEBUG_EXCEPT_DOUBLE_FAULT
183 cmp eax, DEBUG_EXCEPT_INVALID_TSS
185 cmp eax, DEBUG_EXCEPT_SEG_NOT_PRESENT
187 cmp eax, DEBUG_EXCEPT_STACK_FAULT
189 cmp eax, DEBUG_EXCEPT_GP_FAULT
191 cmp eax, DEBUG_EXCEPT_PAGE_FAULT
193 cmp eax, DEBUG_EXCEPT_ALIGNMENT_CHECK
197 mov dword [esp + 4], 0
202 mov ebp, esp ; save esp in ebp
204 ; Make stack 16-byte alignment to make sure save fxrstor later
209 ; store UINT32 Edi, Esi, Ebp, Ebx, Edx, Ecx, Eax;
210 push dword [ebp + 4] ; original eax
214 mov ebx, eax ; save vector in ebx
217 push eax ; original ESP
218 push dword [ebp] ; EBP
222 ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
223 ;; insure FXSAVE/FXRSTOR is enabled in CR4...
224 ;; ... while we're at it, make sure DE is also enabled...
226 push ebx ; temporarily save value of ebx on stack
227 cpuid ; use CPUID to determine if FXSAVE/FXRESTOR and
229 pop ebx ; retore value of ebx that was overwritten by CPUID
231 push eax ; push cr4 firstly
232 test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
234 or eax, BIT9 ; Set CR4.OSFXSR
236 test edx, BIT2 ; Test for Debugging Extensions support
238 or eax, BIT3 ; Set CR4.DE
245 push 0 ; cr0 will not saved???
264 mov ecx, [ebp + 4 * 3] ; EIP
267 ;; UINT32 Gdtr[2], Idtr[2];
281 mov ecx, [ebp + 4 * 5]
284 ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
288 ;; clear Dr7 while executing debugger itself
296 ;; insure all status bits in dr6 are clear...
309 ;; Clear Direction Flag
312 ;; FX_SAVE_STATE_IA32 FxSaveState;
317 mov ecx, 128 ;= 512 / 4
321 test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.
322 ; edx still contains result from CPUID above
324 db 0xf, 0xae, 00000111y ;fxsave [edi]
327 ;; save the exception data
330 ; call the C interrupt process function
333 call ASM_PFX(InterruptProcess)
336 ; skip the exception data
339 ;; FX_SAVE_STATE_IA32 FxSaveState;
342 cpuid ; use CPUID to determine if FXSAVE/FXRESTOR are supported
343 test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
345 db 0xf, 0xae, 00001110y ; fxrstor [esi]
349 ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
358 ;; skip restore of dr6. We cleared dr6 during the context save.
364 pop dword [ebp + 4 * 5] ; set EFLAGS in stack
367 ;; UINT32 Gdtr[2], Idtr[2];
368 ;; Best not let anyone mess with these particular registers...
372 pop dword [ebp + 4 * 3] ; set EIP in stack
374 ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
375 ;; NOTE - modified segment registers could hang the debugger... We
376 ;; could attempt to insulate ourselves against this possibility,
377 ;; but that poses risks as well.
383 pop dword [ebp + 4 * 4] ; set CS in stack
386 ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
389 add esp, 4 ; skip for Cr1
397 ;; restore general register
400 pop dword [ebp] ; save updated ebp
401 pop dword [ebp + 4] ; save updated esp
408 pop ebp ; restore ebp maybe updated
409 pop esp ; restore esp maybe updated
410 sub esp, 4 * 3 ; restore interupt pushced stack