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UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm
[mirror_edk2.git] / SourceLevelDebugPkg / Library / DebugAgent / DebugAgentCommon / X64 / ArchDebugSupport.c
1 /** @file
2 Supporting functions for X64 architecture.
3
4 Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #include "DebugAgent.h"
10
11 /**
12 Initialize IDT entries to support source level debug.
13
14 **/
15 VOID
16 InitializeDebugIdt (
17 VOID
18 )
19 {
20 IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
21 UINTN InterruptHandler;
22 IA32_DESCRIPTOR IdtDescriptor;
23 UINTN Index;
24 UINT16 CodeSegment;
25 UINT32 RegEdx;
26
27 AsmReadIdtr (&IdtDescriptor);
28
29 //
30 // Use current CS as the segment selector of interrupt gate in IDT
31 //
32 CodeSegment = AsmReadCs ();
33
34 IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
35
36 for (Index = 0; Index < 20; Index++) {
37 if (((PcdGet32 (PcdExceptionsIgnoredByDebugger) & ~(BIT1 | BIT3)) & (1 << Index)) != 0) {
38 //
39 // If the exception is masked to be reserved except for INT1 and INT3, skip it
40 //
41 continue;
42 }
43
44 InterruptHandler = (UINTN)&Exception0Handle + Index * ExceptionStubHeaderSize;
45 IdtEntry[Index].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
46 IdtEntry[Index].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
47 IdtEntry[Index].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
48 IdtEntry[Index].Bits.Selector = CodeSegment;
49 IdtEntry[Index].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
50 }
51
52 InterruptHandler = (UINTN)&TimerInterruptHandle;
53 IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
54 IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
55 IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
56 IdtEntry[DEBUG_TIMER_VECTOR].Bits.Selector = CodeSegment;
57 IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
58
59 //
60 // If the CPU supports Debug Extensions(CPUID:01 EDX:BIT2), then
61 // Set DE flag in CR4 to enable IO breakpoint
62 //
63 AsmCpuid (1, NULL, NULL, NULL, &RegEdx);
64 if ((RegEdx & BIT2) != 0) {
65 AsmWriteCr4 (AsmReadCr4 () | BIT3);
66 }
67 }
68
69 /**
70 Retrieve exception handler from IDT table by ExceptionNum.
71
72 @param[in] ExceptionNum Exception number
73
74 @return Exception handler
75
76 **/
77 VOID *
78 GetExceptionHandlerInIdtEntry (
79 IN UINTN ExceptionNum
80 )
81 {
82 IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
83 IA32_DESCRIPTOR IdtDescriptor;
84
85 AsmReadIdtr (&IdtDescriptor);
86 IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
87
88 return (VOID *)(IdtEntry[ExceptionNum].Bits.OffsetLow |
89 (((UINTN)IdtEntry[ExceptionNum].Bits.OffsetHigh) << 16) |
90 (((UINTN)IdtEntry[ExceptionNum].Bits.OffsetUpper) << 32));
91 }
92
93 /**
94 Set exception handler in IDT table by ExceptionNum.
95
96 @param[in] ExceptionNum Exception number
97 @param[in] ExceptionHandler Exception Handler to be set
98
99 **/
100 VOID
101 SetExceptionHandlerInIdtEntry (
102 IN UINTN ExceptionNum,
103 IN VOID *ExceptionHandler
104 )
105 {
106 IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
107 IA32_DESCRIPTOR IdtDescriptor;
108
109 AsmReadIdtr (&IdtDescriptor);
110 IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
111
112 IdtEntry[ExceptionNum].Bits.OffsetLow = (UINT16)(UINTN)ExceptionHandler;
113 IdtEntry[ExceptionNum].Bits.OffsetHigh = (UINT16)((UINTN)ExceptionHandler >> 16);
114 IdtEntry[ExceptionNum].Bits.OffsetUpper = (UINT32)((UINTN)ExceptionHandler >> 32);
115 }