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[mirror_edk2.git] / UefiCpuPkg / CpuDxe / CpuPageTable.c
1 /** @file
2 Page table management support.
3
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #include <Base.h>
12 #include <Uefi.h>
13 #include <Library/PeCoffGetEntryPointLib.h>
14 #include <Library/SerialPortLib.h>
15 #include <Library/SynchronizationLib.h>
16 #include <Library/PrintLib.h>
17 #include <Protocol/SmmBase2.h>
18 #include <Register/Cpuid.h>
19 #include <Register/Msr.h>
20
21 #include "CpuDxe.h"
22 #include "CpuPageTable.h"
23
24 ///
25 /// Paging registers
26 ///
27 #define CR0_WP BIT16
28 #define CR0_PG BIT31
29 #define CR4_PSE BIT4
30 #define CR4_PAE BIT5
31
32 ///
33 /// Page Table Entry
34 ///
35 #define IA32_PG_P BIT0
36 #define IA32_PG_RW BIT1
37 #define IA32_PG_U BIT2
38 #define IA32_PG_WT BIT3
39 #define IA32_PG_CD BIT4
40 #define IA32_PG_A BIT5
41 #define IA32_PG_D BIT6
42 #define IA32_PG_PS BIT7
43 #define IA32_PG_PAT_2M BIT12
44 #define IA32_PG_PAT_4K IA32_PG_PS
45 #define IA32_PG_PMNT BIT62
46 #define IA32_PG_NX BIT63
47
48 #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
49 //
50 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
51 // X64 PAE PDPTE does not have such restriction
52 //
53 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
54
55 #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
56
57 #define PAGING_4K_MASK 0xFFF
58 #define PAGING_2M_MASK 0x1FFFFF
59 #define PAGING_1G_MASK 0x3FFFFFFF
60
61 #define PAGING_PAE_INDEX_MASK 0x1FF
62
63 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
64 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
65 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
66
67 #define MAX_PF_ENTRY_COUNT 10
68 #define MAX_DEBUG_MESSAGE_LENGTH 0x100
69 #define IA32_PF_EC_ID BIT4
70
71 typedef enum {
72 PageNone,
73 Page4K,
74 Page2M,
75 Page1G,
76 } PAGE_ATTRIBUTE;
77
78 typedef struct {
79 PAGE_ATTRIBUTE Attribute;
80 UINT64 Length;
81 UINT64 AddressMask;
82 } PAGE_ATTRIBUTE_TABLE;
83
84 typedef enum {
85 PageActionAssign,
86 PageActionSet,
87 PageActionClear,
88 } PAGE_ACTION;
89
90 PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
91 {Page4K, SIZE_4KB, PAGING_4K_ADDRESS_MASK_64},
92 {Page2M, SIZE_2MB, PAGING_2M_ADDRESS_MASK_64},
93 {Page1G, SIZE_1GB, PAGING_1G_ADDRESS_MASK_64},
94 };
95
96 PAGE_TABLE_POOL *mPageTablePool = NULL;
97 BOOLEAN mPageTablePoolLock = FALSE;
98 PAGE_TABLE_LIB_PAGING_CONTEXT mPagingContext;
99 EFI_SMM_BASE2_PROTOCOL *mSmmBase2 = NULL;
100
101 //
102 // Record the page fault exception count for one instruction execution.
103 //
104 UINTN *mPFEntryCount;
105 UINT64 *(*mLastPFEntryPointer)[MAX_PF_ENTRY_COUNT];
106
107 /**
108 Check if current execution environment is in SMM mode or not, via
109 EFI_SMM_BASE2_PROTOCOL.
110
111 This is necessary because of the fact that MdePkg\Library\SmmMemoryAllocationLib
112 supports to free memory outside SMRAM. The library will call gBS->FreePool() or
113 gBS->FreePages() and then SetMemorySpaceAttributes interface in turn to change
114 memory paging attributes during free operation, if some memory related features
115 are enabled (like Heap Guard).
116
117 This means that SetMemorySpaceAttributes() has chance to run in SMM mode. This
118 will cause incorrect result because SMM mode always loads its own page tables,
119 which are usually different from DXE. This function can be used to detect such
120 situation and help to avoid further misoperations.
121
122 @retval TRUE In SMM mode.
123 @retval FALSE Not in SMM mode.
124 **/
125 BOOLEAN
126 IsInSmm (
127 VOID
128 )
129 {
130 BOOLEAN InSmm;
131
132 InSmm = FALSE;
133 if (mSmmBase2 == NULL) {
134 gBS->LocateProtocol (&gEfiSmmBase2ProtocolGuid, NULL, (VOID **)&mSmmBase2);
135 }
136
137 if (mSmmBase2 != NULL) {
138 mSmmBase2->InSmm (mSmmBase2, &InSmm);
139 }
140
141 //
142 // mSmmBase2->InSmm() can only detect if the caller is running in SMRAM
143 // or from SMM driver. It cannot tell if the caller is running in SMM mode.
144 // Check page table base address to guarantee that because SMM mode willl
145 // load its own page table.
146 //
147 return (InSmm &&
148 mPagingContext.ContextData.X64.PageTableBase != (UINT64)AsmReadCr3());
149 }
150
151 /**
152 Return current paging context.
153
154 @param[in,out] PagingContext The paging context.
155 **/
156 VOID
157 GetCurrentPagingContext (
158 IN OUT PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext
159 )
160 {
161 UINT32 RegEax;
162 CPUID_EXTENDED_CPU_SIG_EDX RegEdx;
163 MSR_IA32_EFER_REGISTER MsrEfer;
164
165 //
166 // Don't retrieve current paging context from processor if in SMM mode.
167 //
168 if (!IsInSmm ()) {
169 ZeroMem (&mPagingContext, sizeof(mPagingContext));
170 if (sizeof(UINTN) == sizeof(UINT64)) {
171 mPagingContext.MachineType = IMAGE_FILE_MACHINE_X64;
172 } else {
173 mPagingContext.MachineType = IMAGE_FILE_MACHINE_I386;
174 }
175 if ((AsmReadCr0 () & CR0_PG) != 0) {
176 mPagingContext.ContextData.X64.PageTableBase = (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);
177 } else {
178 mPagingContext.ContextData.X64.PageTableBase = 0;
179 }
180
181 if ((AsmReadCr4 () & CR4_PSE) != 0) {
182 mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PSE;
183 }
184 if ((AsmReadCr4 () & CR4_PAE) != 0) {
185 mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE;
186 }
187 if ((AsmReadCr0 () & CR0_WP) != 0) {
188 mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_WP_ENABLE;
189 }
190
191 AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
192 if (RegEax >= CPUID_EXTENDED_CPU_SIG) {
193 AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &RegEdx.Uint32);
194
195 if (RegEdx.Bits.NX != 0) {
196 // XD supported
197 MsrEfer.Uint64 = AsmReadMsr64(MSR_CORE_IA32_EFER);
198 if (MsrEfer.Bits.NXE != 0) {
199 // XD activated
200 mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
201 }
202 }
203
204 if (RegEdx.Bits.Page1GB != 0) {
205 mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAGE_1G_SUPPORT;
206 }
207 }
208 }
209
210 //
211 // This can avoid getting SMM paging context if in SMM mode. We cannot assume
212 // SMM mode shares the same paging context as DXE.
213 //
214 CopyMem (PagingContext, &mPagingContext, sizeof (mPagingContext));
215 }
216
217 /**
218 Return length according to page attributes.
219
220 @param[in] PageAttributes The page attribute of the page entry.
221
222 @return The length of page entry.
223 **/
224 UINTN
225 PageAttributeToLength (
226 IN PAGE_ATTRIBUTE PageAttribute
227 )
228 {
229 UINTN Index;
230 for (Index = 0; Index < sizeof(mPageAttributeTable)/sizeof(mPageAttributeTable[0]); Index++) {
231 if (PageAttribute == mPageAttributeTable[Index].Attribute) {
232 return (UINTN)mPageAttributeTable[Index].Length;
233 }
234 }
235 return 0;
236 }
237
238 /**
239 Return address mask according to page attributes.
240
241 @param[in] PageAttributes The page attribute of the page entry.
242
243 @return The address mask of page entry.
244 **/
245 UINTN
246 PageAttributeToMask (
247 IN PAGE_ATTRIBUTE PageAttribute
248 )
249 {
250 UINTN Index;
251 for (Index = 0; Index < sizeof(mPageAttributeTable)/sizeof(mPageAttributeTable[0]); Index++) {
252 if (PageAttribute == mPageAttributeTable[Index].Attribute) {
253 return (UINTN)mPageAttributeTable[Index].AddressMask;
254 }
255 }
256 return 0;
257 }
258
259 /**
260 Return page table entry to match the address.
261
262 @param[in] PagingContext The paging context.
263 @param[in] Address The address to be checked.
264 @param[out] PageAttributes The page attribute of the page entry.
265
266 @return The page entry.
267 **/
268 VOID *
269 GetPageTableEntry (
270 IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext,
271 IN PHYSICAL_ADDRESS Address,
272 OUT PAGE_ATTRIBUTE *PageAttribute
273 )
274 {
275 UINTN Index1;
276 UINTN Index2;
277 UINTN Index3;
278 UINTN Index4;
279 UINT64 *L1PageTable;
280 UINT64 *L2PageTable;
281 UINT64 *L3PageTable;
282 UINT64 *L4PageTable;
283 UINT64 AddressEncMask;
284
285 ASSERT (PagingContext != NULL);
286
287 Index4 = ((UINTN)RShiftU64 (Address, 39)) & PAGING_PAE_INDEX_MASK;
288 Index3 = ((UINTN)Address >> 30) & PAGING_PAE_INDEX_MASK;
289 Index2 = ((UINTN)Address >> 21) & PAGING_PAE_INDEX_MASK;
290 Index1 = ((UINTN)Address >> 12) & PAGING_PAE_INDEX_MASK;
291
292 // Make sure AddressEncMask is contained to smallest supported address field.
293 //
294 AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
295
296 if (PagingContext->MachineType == IMAGE_FILE_MACHINE_X64) {
297 L4PageTable = (UINT64 *)(UINTN)PagingContext->ContextData.X64.PageTableBase;
298 if (L4PageTable[Index4] == 0) {
299 *PageAttribute = PageNone;
300 return NULL;
301 }
302
303 L3PageTable = (UINT64 *)(UINTN)(L4PageTable[Index4] & ~AddressEncMask & PAGING_4K_ADDRESS_MASK_64);
304 } else {
305 ASSERT((PagingContext->ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) != 0);
306 L3PageTable = (UINT64 *)(UINTN)PagingContext->ContextData.Ia32.PageTableBase;
307 }
308 if (L3PageTable[Index3] == 0) {
309 *PageAttribute = PageNone;
310 return NULL;
311 }
312 if ((L3PageTable[Index3] & IA32_PG_PS) != 0) {
313 // 1G
314 *PageAttribute = Page1G;
315 return &L3PageTable[Index3];
316 }
317
318 L2PageTable = (UINT64 *)(UINTN)(L3PageTable[Index3] & ~AddressEncMask & PAGING_4K_ADDRESS_MASK_64);
319 if (L2PageTable[Index2] == 0) {
320 *PageAttribute = PageNone;
321 return NULL;
322 }
323 if ((L2PageTable[Index2] & IA32_PG_PS) != 0) {
324 // 2M
325 *PageAttribute = Page2M;
326 return &L2PageTable[Index2];
327 }
328
329 // 4k
330 L1PageTable = (UINT64 *)(UINTN)(L2PageTable[Index2] & ~AddressEncMask & PAGING_4K_ADDRESS_MASK_64);
331 if ((L1PageTable[Index1] == 0) && (Address != 0)) {
332 *PageAttribute = PageNone;
333 return NULL;
334 }
335 *PageAttribute = Page4K;
336 return &L1PageTable[Index1];
337 }
338
339 /**
340 Return memory attributes of page entry.
341
342 @param[in] PageEntry The page entry.
343
344 @return Memory attributes of page entry.
345 **/
346 UINT64
347 GetAttributesFromPageEntry (
348 IN UINT64 *PageEntry
349 )
350 {
351 UINT64 Attributes;
352 Attributes = 0;
353 if ((*PageEntry & IA32_PG_P) == 0) {
354 Attributes |= EFI_MEMORY_RP;
355 }
356 if ((*PageEntry & IA32_PG_RW) == 0) {
357 Attributes |= EFI_MEMORY_RO;
358 }
359 if ((*PageEntry & IA32_PG_NX) != 0) {
360 Attributes |= EFI_MEMORY_XP;
361 }
362 return Attributes;
363 }
364
365 /**
366 Modify memory attributes of page entry.
367
368 @param[in] PagingContext The paging context.
369 @param[in] PageEntry The page entry.
370 @param[in] Attributes The bit mask of attributes to modify for the memory region.
371 @param[in] PageAction The page action.
372 @param[out] IsModified TRUE means page table modified. FALSE means page table not modified.
373 **/
374 VOID
375 ConvertPageEntryAttribute (
376 IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext,
377 IN UINT64 *PageEntry,
378 IN UINT64 Attributes,
379 IN PAGE_ACTION PageAction,
380 OUT BOOLEAN *IsModified
381 )
382 {
383 UINT64 CurrentPageEntry;
384 UINT64 NewPageEntry;
385
386 CurrentPageEntry = *PageEntry;
387 NewPageEntry = CurrentPageEntry;
388 if ((Attributes & EFI_MEMORY_RP) != 0) {
389 switch (PageAction) {
390 case PageActionAssign:
391 case PageActionSet:
392 NewPageEntry &= ~(UINT64)IA32_PG_P;
393 break;
394 case PageActionClear:
395 NewPageEntry |= IA32_PG_P;
396 break;
397 }
398 } else {
399 switch (PageAction) {
400 case PageActionAssign:
401 NewPageEntry |= IA32_PG_P;
402 break;
403 case PageActionSet:
404 case PageActionClear:
405 break;
406 }
407 }
408 if ((Attributes & EFI_MEMORY_RO) != 0) {
409 switch (PageAction) {
410 case PageActionAssign:
411 case PageActionSet:
412 NewPageEntry &= ~(UINT64)IA32_PG_RW;
413 break;
414 case PageActionClear:
415 NewPageEntry |= IA32_PG_RW;
416 break;
417 }
418 } else {
419 switch (PageAction) {
420 case PageActionAssign:
421 NewPageEntry |= IA32_PG_RW;
422 break;
423 case PageActionSet:
424 case PageActionClear:
425 break;
426 }
427 }
428 if ((PagingContext->ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED) != 0) {
429 if ((Attributes & EFI_MEMORY_XP) != 0) {
430 switch (PageAction) {
431 case PageActionAssign:
432 case PageActionSet:
433 NewPageEntry |= IA32_PG_NX;
434 break;
435 case PageActionClear:
436 NewPageEntry &= ~IA32_PG_NX;
437 break;
438 }
439 } else {
440 switch (PageAction) {
441 case PageActionAssign:
442 NewPageEntry &= ~IA32_PG_NX;
443 break;
444 case PageActionSet:
445 case PageActionClear:
446 break;
447 }
448 }
449 }
450 *PageEntry = NewPageEntry;
451 if (CurrentPageEntry != NewPageEntry) {
452 *IsModified = TRUE;
453 DEBUG ((DEBUG_VERBOSE, "ConvertPageEntryAttribute 0x%lx", CurrentPageEntry));
454 DEBUG ((DEBUG_VERBOSE, "->0x%lx\n", NewPageEntry));
455 } else {
456 *IsModified = FALSE;
457 }
458 }
459
460 /**
461 This function returns if there is need to split page entry.
462
463 @param[in] BaseAddress The base address to be checked.
464 @param[in] Length The length to be checked.
465 @param[in] PageEntry The page entry to be checked.
466 @param[in] PageAttribute The page attribute of the page entry.
467
468 @retval SplitAttributes on if there is need to split page entry.
469 **/
470 PAGE_ATTRIBUTE
471 NeedSplitPage (
472 IN PHYSICAL_ADDRESS BaseAddress,
473 IN UINT64 Length,
474 IN UINT64 *PageEntry,
475 IN PAGE_ATTRIBUTE PageAttribute
476 )
477 {
478 UINT64 PageEntryLength;
479
480 PageEntryLength = PageAttributeToLength (PageAttribute);
481
482 if (((BaseAddress & (PageEntryLength - 1)) == 0) && (Length >= PageEntryLength)) {
483 return PageNone;
484 }
485
486 if (((BaseAddress & PAGING_2M_MASK) != 0) || (Length < SIZE_2MB)) {
487 return Page4K;
488 }
489
490 return Page2M;
491 }
492
493 /**
494 This function splits one page entry to small page entries.
495
496 @param[in] PageEntry The page entry to be splitted.
497 @param[in] PageAttribute The page attribute of the page entry.
498 @param[in] SplitAttribute How to split the page entry.
499 @param[in] AllocatePagesFunc If page split is needed, this function is used to allocate more pages.
500
501 @retval RETURN_SUCCESS The page entry is splitted.
502 @retval RETURN_UNSUPPORTED The page entry does not support to be splitted.
503 @retval RETURN_OUT_OF_RESOURCES No resource to split page entry.
504 **/
505 RETURN_STATUS
506 SplitPage (
507 IN UINT64 *PageEntry,
508 IN PAGE_ATTRIBUTE PageAttribute,
509 IN PAGE_ATTRIBUTE SplitAttribute,
510 IN PAGE_TABLE_LIB_ALLOCATE_PAGES AllocatePagesFunc
511 )
512 {
513 UINT64 BaseAddress;
514 UINT64 *NewPageEntry;
515 UINTN Index;
516 UINT64 AddressEncMask;
517
518 ASSERT (PageAttribute == Page2M || PageAttribute == Page1G);
519
520 ASSERT (AllocatePagesFunc != NULL);
521
522 // Make sure AddressEncMask is contained to smallest supported address field.
523 //
524 AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
525
526 if (PageAttribute == Page2M) {
527 //
528 // Split 2M to 4K
529 //
530 ASSERT (SplitAttribute == Page4K);
531 if (SplitAttribute == Page4K) {
532 NewPageEntry = AllocatePagesFunc (1);
533 DEBUG ((DEBUG_VERBOSE, "Split - 0x%x\n", NewPageEntry));
534 if (NewPageEntry == NULL) {
535 return RETURN_OUT_OF_RESOURCES;
536 }
537 BaseAddress = *PageEntry & ~AddressEncMask & PAGING_2M_ADDRESS_MASK_64;
538 for (Index = 0; Index < SIZE_4KB / sizeof(UINT64); Index++) {
539 NewPageEntry[Index] = (BaseAddress + SIZE_4KB * Index) | AddressEncMask | ((*PageEntry) & PAGE_PROGATE_BITS);
540 }
541 (*PageEntry) = (UINT64)(UINTN)NewPageEntry | AddressEncMask | ((*PageEntry) & PAGE_ATTRIBUTE_BITS);
542 return RETURN_SUCCESS;
543 } else {
544 return RETURN_UNSUPPORTED;
545 }
546 } else if (PageAttribute == Page1G) {
547 //
548 // Split 1G to 2M
549 // No need support 1G->4K directly, we should use 1G->2M, then 2M->4K to get more compact page table.
550 //
551 ASSERT (SplitAttribute == Page2M || SplitAttribute == Page4K);
552 if ((SplitAttribute == Page2M || SplitAttribute == Page4K)) {
553 NewPageEntry = AllocatePagesFunc (1);
554 DEBUG ((DEBUG_VERBOSE, "Split - 0x%x\n", NewPageEntry));
555 if (NewPageEntry == NULL) {
556 return RETURN_OUT_OF_RESOURCES;
557 }
558 BaseAddress = *PageEntry & ~AddressEncMask & PAGING_1G_ADDRESS_MASK_64;
559 for (Index = 0; Index < SIZE_4KB / sizeof(UINT64); Index++) {
560 NewPageEntry[Index] = (BaseAddress + SIZE_2MB * Index) | AddressEncMask | IA32_PG_PS | ((*PageEntry) & PAGE_PROGATE_BITS);
561 }
562 (*PageEntry) = (UINT64)(UINTN)NewPageEntry | AddressEncMask | ((*PageEntry) & PAGE_ATTRIBUTE_BITS);
563 return RETURN_SUCCESS;
564 } else {
565 return RETURN_UNSUPPORTED;
566 }
567 } else {
568 return RETURN_UNSUPPORTED;
569 }
570 }
571
572 /**
573 Check the WP status in CR0 register. This bit is used to lock or unlock write
574 access to pages marked as read-only.
575
576 @retval TRUE Write protection is enabled.
577 @retval FALSE Write protection is disabled.
578 **/
579 BOOLEAN
580 IsReadOnlyPageWriteProtected (
581 VOID
582 )
583 {
584 //
585 // To avoid unforseen consequences, don't touch paging settings in SMM mode
586 // in this driver.
587 //
588 if (!IsInSmm ()) {
589 return ((AsmReadCr0 () & CR0_WP) != 0);
590 }
591 return FALSE;
592 }
593
594 /**
595 Disable Write Protect on pages marked as read-only.
596 **/
597 VOID
598 DisableReadOnlyPageWriteProtect (
599 VOID
600 )
601 {
602 //
603 // To avoid unforseen consequences, don't touch paging settings in SMM mode
604 // in this driver.
605 //
606 if (!IsInSmm ()) {
607 AsmWriteCr0 (AsmReadCr0 () & ~CR0_WP);
608 }
609 }
610
611 /**
612 Enable Write Protect on pages marked as read-only.
613 **/
614 VOID
615 EnableReadOnlyPageWriteProtect (
616 VOID
617 )
618 {
619 //
620 // To avoid unforseen consequences, don't touch paging settings in SMM mode
621 // in this driver.
622 //
623 if (!IsInSmm ()) {
624 AsmWriteCr0 (AsmReadCr0 () | CR0_WP);
625 }
626 }
627
628 /**
629 This function modifies the page attributes for the memory region specified by BaseAddress and
630 Length from their current attributes to the attributes specified by Attributes.
631
632 Caller should make sure BaseAddress and Length is at page boundary.
633
634 @param[in] PagingContext The paging context. NULL means get page table from current CPU context.
635 @param[in] BaseAddress The physical address that is the start address of a memory region.
636 @param[in] Length The size in bytes of the memory region.
637 @param[in] Attributes The bit mask of attributes to modify for the memory region.
638 @param[in] PageAction The page action.
639 @param[in] AllocatePagesFunc If page split is needed, this function is used to allocate more pages.
640 NULL mean page split is unsupported.
641 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
642 @param[out] IsModified TRUE means page table modified. FALSE means page table not modified.
643
644 @retval RETURN_SUCCESS The attributes were modified for the memory region.
645 @retval RETURN_ACCESS_DENIED The attributes for the memory resource range specified by
646 BaseAddress and Length cannot be modified.
647 @retval RETURN_INVALID_PARAMETER Length is zero.
648 Attributes specified an illegal combination of attributes that
649 cannot be set together.
650 @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
651 the memory resource range.
652 @retval RETURN_UNSUPPORTED The processor does not support one or more bytes of the memory
653 resource range specified by BaseAddress and Length.
654 The bit mask of attributes is not support for the memory resource
655 range specified by BaseAddress and Length.
656 **/
657 RETURN_STATUS
658 ConvertMemoryPageAttributes (
659 IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext OPTIONAL,
660 IN PHYSICAL_ADDRESS BaseAddress,
661 IN UINT64 Length,
662 IN UINT64 Attributes,
663 IN PAGE_ACTION PageAction,
664 IN PAGE_TABLE_LIB_ALLOCATE_PAGES AllocatePagesFunc OPTIONAL,
665 OUT BOOLEAN *IsSplitted, OPTIONAL
666 OUT BOOLEAN *IsModified OPTIONAL
667 )
668 {
669 PAGE_TABLE_LIB_PAGING_CONTEXT CurrentPagingContext;
670 UINT64 *PageEntry;
671 PAGE_ATTRIBUTE PageAttribute;
672 UINTN PageEntryLength;
673 PAGE_ATTRIBUTE SplitAttribute;
674 RETURN_STATUS Status;
675 BOOLEAN IsEntryModified;
676 BOOLEAN IsWpEnabled;
677
678 if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
679 DEBUG ((DEBUG_ERROR, "BaseAddress(0x%lx) is not aligned!\n", BaseAddress));
680 return EFI_UNSUPPORTED;
681 }
682 if ((Length & (SIZE_4KB - 1)) != 0) {
683 DEBUG ((DEBUG_ERROR, "Length(0x%lx) is not aligned!\n", Length));
684 return EFI_UNSUPPORTED;
685 }
686 if (Length == 0) {
687 DEBUG ((DEBUG_ERROR, "Length is 0!\n"));
688 return RETURN_INVALID_PARAMETER;
689 }
690
691 if ((Attributes & ~(EFI_MEMORY_RP | EFI_MEMORY_RO | EFI_MEMORY_XP)) != 0) {
692 DEBUG ((DEBUG_ERROR, "Attributes(0x%lx) has unsupported bit\n", Attributes));
693 return EFI_UNSUPPORTED;
694 }
695
696 if (PagingContext == NULL) {
697 GetCurrentPagingContext (&CurrentPagingContext);
698 } else {
699 CopyMem (&CurrentPagingContext, PagingContext, sizeof(CurrentPagingContext));
700 }
701 switch(CurrentPagingContext.MachineType) {
702 case IMAGE_FILE_MACHINE_I386:
703 if (CurrentPagingContext.ContextData.Ia32.PageTableBase == 0) {
704 if (Attributes == 0) {
705 return EFI_SUCCESS;
706 } else {
707 DEBUG ((DEBUG_ERROR, "PageTable is 0!\n"));
708 return EFI_UNSUPPORTED;
709 }
710 }
711 if ((CurrentPagingContext.ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) == 0) {
712 DEBUG ((DEBUG_ERROR, "Non-PAE Paging!\n"));
713 return EFI_UNSUPPORTED;
714 }
715 if ((BaseAddress + Length) > BASE_4GB) {
716 DEBUG ((DEBUG_ERROR, "Beyond 4GB memory in 32-bit mode!\n"));
717 return EFI_UNSUPPORTED;
718 }
719 break;
720 case IMAGE_FILE_MACHINE_X64:
721 ASSERT (CurrentPagingContext.ContextData.X64.PageTableBase != 0);
722 break;
723 default:
724 ASSERT(FALSE);
725 return EFI_UNSUPPORTED;
726 break;
727 }
728
729 // DEBUG ((DEBUG_ERROR, "ConvertMemoryPageAttributes(%x) - %016lx, %016lx, %02lx\n", IsSet, BaseAddress, Length, Attributes));
730
731 if (IsSplitted != NULL) {
732 *IsSplitted = FALSE;
733 }
734 if (IsModified != NULL) {
735 *IsModified = FALSE;
736 }
737 if (AllocatePagesFunc == NULL) {
738 AllocatePagesFunc = AllocatePageTableMemory;
739 }
740
741 //
742 // Make sure that the page table is changeable.
743 //
744 IsWpEnabled = IsReadOnlyPageWriteProtected ();
745 if (IsWpEnabled) {
746 DisableReadOnlyPageWriteProtect ();
747 }
748
749 //
750 // Below logic is to check 2M/4K page to make sure we donot waist memory.
751 //
752 Status = EFI_SUCCESS;
753 while (Length != 0) {
754 PageEntry = GetPageTableEntry (&CurrentPagingContext, BaseAddress, &PageAttribute);
755 if (PageEntry == NULL) {
756 Status = RETURN_UNSUPPORTED;
757 goto Done;
758 }
759 PageEntryLength = PageAttributeToLength (PageAttribute);
760 SplitAttribute = NeedSplitPage (BaseAddress, Length, PageEntry, PageAttribute);
761 if (SplitAttribute == PageNone) {
762 ConvertPageEntryAttribute (&CurrentPagingContext, PageEntry, Attributes, PageAction, &IsEntryModified);
763 if (IsEntryModified) {
764 if (IsModified != NULL) {
765 *IsModified = TRUE;
766 }
767 }
768 //
769 // Convert success, move to next
770 //
771 BaseAddress += PageEntryLength;
772 Length -= PageEntryLength;
773 } else {
774 if (AllocatePagesFunc == NULL) {
775 Status = RETURN_UNSUPPORTED;
776 goto Done;
777 }
778 Status = SplitPage (PageEntry, PageAttribute, SplitAttribute, AllocatePagesFunc);
779 if (RETURN_ERROR (Status)) {
780 Status = RETURN_UNSUPPORTED;
781 goto Done;
782 }
783 if (IsSplitted != NULL) {
784 *IsSplitted = TRUE;
785 }
786 if (IsModified != NULL) {
787 *IsModified = TRUE;
788 }
789 //
790 // Just split current page
791 // Convert success in next around
792 //
793 }
794 }
795
796 Done:
797 //
798 // Restore page table write protection, if any.
799 //
800 if (IsWpEnabled) {
801 EnableReadOnlyPageWriteProtect ();
802 }
803 return Status;
804 }
805
806 /**
807 This function assigns the page attributes for the memory region specified by BaseAddress and
808 Length from their current attributes to the attributes specified by Attributes.
809
810 Caller should make sure BaseAddress and Length is at page boundary.
811
812 Caller need guarentee the TPL <= TPL_NOTIFY, if there is split page request.
813
814 @param[in] PagingContext The paging context. NULL means get page table from current CPU context.
815 @param[in] BaseAddress The physical address that is the start address of a memory region.
816 @param[in] Length The size in bytes of the memory region.
817 @param[in] Attributes The bit mask of attributes to set for the memory region.
818 @param[in] AllocatePagesFunc If page split is needed, this function is used to allocate more pages.
819 NULL mean page split is unsupported.
820
821 @retval RETURN_SUCCESS The attributes were cleared for the memory region.
822 @retval RETURN_ACCESS_DENIED The attributes for the memory resource range specified by
823 BaseAddress and Length cannot be modified.
824 @retval RETURN_INVALID_PARAMETER Length is zero.
825 Attributes specified an illegal combination of attributes that
826 cannot be set together.
827 @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
828 the memory resource range.
829 @retval RETURN_UNSUPPORTED The processor does not support one or more bytes of the memory
830 resource range specified by BaseAddress and Length.
831 The bit mask of attributes is not support for the memory resource
832 range specified by BaseAddress and Length.
833 **/
834 RETURN_STATUS
835 EFIAPI
836 AssignMemoryPageAttributes (
837 IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext OPTIONAL,
838 IN PHYSICAL_ADDRESS BaseAddress,
839 IN UINT64 Length,
840 IN UINT64 Attributes,
841 IN PAGE_TABLE_LIB_ALLOCATE_PAGES AllocatePagesFunc OPTIONAL
842 )
843 {
844 RETURN_STATUS Status;
845 BOOLEAN IsModified;
846 BOOLEAN IsSplitted;
847
848 // DEBUG((DEBUG_INFO, "AssignMemoryPageAttributes: 0x%lx - 0x%lx (0x%lx)\n", BaseAddress, Length, Attributes));
849 Status = ConvertMemoryPageAttributes (PagingContext, BaseAddress, Length, Attributes, PageActionAssign, AllocatePagesFunc, &IsSplitted, &IsModified);
850 if (!EFI_ERROR(Status)) {
851 if ((PagingContext == NULL) && IsModified) {
852 //
853 // Flush TLB as last step.
854 //
855 // Note: Since APs will always init CR3 register in HLT loop mode or do
856 // TLB flush in MWAIT loop mode, there's no need to flush TLB for them
857 // here.
858 //
859 CpuFlushTlb();
860 }
861 }
862
863 return Status;
864 }
865
866 /**
867 Check if Execute Disable feature is enabled or not.
868 **/
869 BOOLEAN
870 IsExecuteDisableEnabled (
871 VOID
872 )
873 {
874 MSR_CORE_IA32_EFER_REGISTER MsrEfer;
875
876 MsrEfer.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);
877 return (MsrEfer.Bits.NXE == 1);
878 }
879
880 /**
881 Update GCD memory space attributes according to current page table setup.
882 **/
883 VOID
884 RefreshGcdMemoryAttributesFromPaging (
885 VOID
886 )
887 {
888 EFI_STATUS Status;
889 UINTN NumberOfDescriptors;
890 EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
891 PAGE_TABLE_LIB_PAGING_CONTEXT PagingContext;
892 PAGE_ATTRIBUTE PageAttribute;
893 UINT64 *PageEntry;
894 UINT64 PageLength;
895 UINT64 MemorySpaceLength;
896 UINT64 Length;
897 UINT64 BaseAddress;
898 UINT64 PageStartAddress;
899 UINT64 Attributes;
900 UINT64 Capabilities;
901 UINT64 NewAttributes;
902 UINTN Index;
903
904 //
905 // Assuming that memory space map returned is sorted already; otherwise sort
906 // them in the order of lowest address to highest address.
907 //
908 Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
909 ASSERT_EFI_ERROR (Status);
910
911 GetCurrentPagingContext (&PagingContext);
912
913 Attributes = 0;
914 NewAttributes = 0;
915 BaseAddress = 0;
916 PageLength = 0;
917
918 if (IsExecuteDisableEnabled ()) {
919 Capabilities = EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
920 } else {
921 Capabilities = EFI_MEMORY_RO | EFI_MEMORY_RP;
922 }
923
924 for (Index = 0; Index < NumberOfDescriptors; Index++) {
925 if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
926 continue;
927 }
928
929 //
930 // Sync the actual paging related capabilities back to GCD service first.
931 // As a side effect (good one), this can also help to avoid unnecessary
932 // memory map entries due to the different capabilities of the same type
933 // memory, such as multiple RT_CODE and RT_DATA entries in memory map,
934 // which could cause boot failure of some old Linux distro (before v4.3).
935 //
936 Status = gDS->SetMemorySpaceCapabilities (
937 MemorySpaceMap[Index].BaseAddress,
938 MemorySpaceMap[Index].Length,
939 MemorySpaceMap[Index].Capabilities | Capabilities
940 );
941 if (EFI_ERROR (Status)) {
942 //
943 // If we cannot udpate the capabilities, we cannot update its
944 // attributes either. So just simply skip current block of memory.
945 //
946 DEBUG ((
947 DEBUG_WARN,
948 "Failed to update capability: [%lu] %016lx - %016lx (%016lx -> %016lx)\r\n",
949 (UINT64)Index, MemorySpaceMap[Index].BaseAddress,
950 MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - 1,
951 MemorySpaceMap[Index].Capabilities,
952 MemorySpaceMap[Index].Capabilities | Capabilities
953 ));
954 continue;
955 }
956
957 if (MemorySpaceMap[Index].BaseAddress >= (BaseAddress + PageLength)) {
958 //
959 // Current memory space starts at a new page. Resetting PageLength will
960 // trigger a retrieval of page attributes at new address.
961 //
962 PageLength = 0;
963 } else {
964 //
965 // In case current memory space is not adjacent to last one
966 //
967 PageLength -= (MemorySpaceMap[Index].BaseAddress - BaseAddress);
968 }
969
970 //
971 // Sync actual page attributes to GCD
972 //
973 BaseAddress = MemorySpaceMap[Index].BaseAddress;
974 MemorySpaceLength = MemorySpaceMap[Index].Length;
975 while (MemorySpaceLength > 0) {
976 if (PageLength == 0) {
977 PageEntry = GetPageTableEntry (&PagingContext, BaseAddress, &PageAttribute);
978 if (PageEntry == NULL) {
979 break;
980 }
981
982 //
983 // Note current memory space might start in the middle of a page
984 //
985 PageStartAddress = (*PageEntry) & (UINT64)PageAttributeToMask(PageAttribute);
986 PageLength = PageAttributeToLength (PageAttribute) - (BaseAddress - PageStartAddress);
987 Attributes = GetAttributesFromPageEntry (PageEntry);
988 }
989
990 Length = MIN (PageLength, MemorySpaceLength);
991 if (Attributes != (MemorySpaceMap[Index].Attributes &
992 EFI_MEMORY_PAGETYPE_MASK)) {
993 NewAttributes = (MemorySpaceMap[Index].Attributes &
994 ~EFI_MEMORY_PAGETYPE_MASK) | Attributes;
995 Status = gDS->SetMemorySpaceAttributes (
996 BaseAddress,
997 Length,
998 NewAttributes
999 );
1000 ASSERT_EFI_ERROR (Status);
1001 DEBUG ((
1002 DEBUG_VERBOSE,
1003 "Updated memory space attribute: [%lu] %016lx - %016lx (%016lx -> %016lx)\r\n",
1004 (UINT64)Index, BaseAddress, BaseAddress + Length - 1,
1005 MemorySpaceMap[Index].Attributes,
1006 NewAttributes
1007 ));
1008 }
1009
1010 PageLength -= Length;
1011 MemorySpaceLength -= Length;
1012 BaseAddress += Length;
1013 }
1014 }
1015
1016 FreePool (MemorySpaceMap);
1017 }
1018
1019 /**
1020 Initialize a buffer pool for page table use only.
1021
1022 To reduce the potential split operation on page table, the pages reserved for
1023 page table should be allocated in the times of PAGE_TABLE_POOL_UNIT_PAGES and
1024 at the boundary of PAGE_TABLE_POOL_ALIGNMENT. So the page pool is always
1025 initialized with number of pages greater than or equal to the given PoolPages.
1026
1027 Once the pages in the pool are used up, this method should be called again to
1028 reserve at least another PAGE_TABLE_POOL_UNIT_PAGES. Usually this won't happen
1029 often in practice.
1030
1031 @param[in] PoolPages The least page number of the pool to be created.
1032
1033 @retval TRUE The pool is initialized successfully.
1034 @retval FALSE The memory is out of resource.
1035 **/
1036 BOOLEAN
1037 InitializePageTablePool (
1038 IN UINTN PoolPages
1039 )
1040 {
1041 VOID *Buffer;
1042 BOOLEAN IsModified;
1043
1044 //
1045 // Do not allow re-entrance.
1046 //
1047 if (mPageTablePoolLock) {
1048 return FALSE;
1049 }
1050
1051 mPageTablePoolLock = TRUE;
1052 IsModified = FALSE;
1053
1054 //
1055 // Always reserve at least PAGE_TABLE_POOL_UNIT_PAGES, including one page for
1056 // header.
1057 //
1058 PoolPages += 1; // Add one page for header.
1059 PoolPages = ((PoolPages - 1) / PAGE_TABLE_POOL_UNIT_PAGES + 1) *
1060 PAGE_TABLE_POOL_UNIT_PAGES;
1061 Buffer = AllocateAlignedPages (PoolPages, PAGE_TABLE_POOL_ALIGNMENT);
1062 if (Buffer == NULL) {
1063 DEBUG ((DEBUG_ERROR, "ERROR: Out of aligned pages\r\n"));
1064 goto Done;
1065 }
1066
1067 DEBUG ((
1068 DEBUG_INFO,
1069 "Paging: added %lu pages to page table pool\r\n",
1070 (UINT64)PoolPages
1071 ));
1072
1073 //
1074 // Link all pools into a list for easier track later.
1075 //
1076 if (mPageTablePool == NULL) {
1077 mPageTablePool = Buffer;
1078 mPageTablePool->NextPool = mPageTablePool;
1079 } else {
1080 ((PAGE_TABLE_POOL *)Buffer)->NextPool = mPageTablePool->NextPool;
1081 mPageTablePool->NextPool = Buffer;
1082 mPageTablePool = Buffer;
1083 }
1084
1085 //
1086 // Reserve one page for pool header.
1087 //
1088 mPageTablePool->FreePages = PoolPages - 1;
1089 mPageTablePool->Offset = EFI_PAGES_TO_SIZE (1);
1090
1091 //
1092 // Mark the whole pool pages as read-only.
1093 //
1094 ConvertMemoryPageAttributes (
1095 NULL,
1096 (PHYSICAL_ADDRESS)(UINTN)Buffer,
1097 EFI_PAGES_TO_SIZE (PoolPages),
1098 EFI_MEMORY_RO,
1099 PageActionSet,
1100 AllocatePageTableMemory,
1101 NULL,
1102 &IsModified
1103 );
1104 ASSERT (IsModified == TRUE);
1105
1106 Done:
1107 mPageTablePoolLock = FALSE;
1108 return IsModified;
1109 }
1110
1111 /**
1112 This API provides a way to allocate memory for page table.
1113
1114 This API can be called more than once to allocate memory for page tables.
1115
1116 Allocates the number of 4KB pages and returns a pointer to the allocated
1117 buffer. The buffer returned is aligned on a 4KB boundary.
1118
1119 If Pages is 0, then NULL is returned.
1120 If there is not enough memory remaining to satisfy the request, then NULL is
1121 returned.
1122
1123 @param Pages The number of 4 KB pages to allocate.
1124
1125 @return A pointer to the allocated buffer or NULL if allocation fails.
1126
1127 **/
1128 VOID *
1129 EFIAPI
1130 AllocatePageTableMemory (
1131 IN UINTN Pages
1132 )
1133 {
1134 VOID *Buffer;
1135
1136 if (Pages == 0) {
1137 return NULL;
1138 }
1139
1140 //
1141 // Renew the pool if necessary.
1142 //
1143 if (mPageTablePool == NULL ||
1144 Pages > mPageTablePool->FreePages) {
1145 if (!InitializePageTablePool (Pages)) {
1146 return NULL;
1147 }
1148 }
1149
1150 Buffer = (UINT8 *)mPageTablePool + mPageTablePool->Offset;
1151
1152 mPageTablePool->Offset += EFI_PAGES_TO_SIZE (Pages);
1153 mPageTablePool->FreePages -= Pages;
1154
1155 return Buffer;
1156 }
1157
1158 /**
1159 Special handler for #DB exception, which will restore the page attributes
1160 (not-present). It should work with #PF handler which will set pages to
1161 'present'.
1162
1163 @param ExceptionType Exception type.
1164 @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
1165
1166 **/
1167 VOID
1168 EFIAPI
1169 DebugExceptionHandler (
1170 IN EFI_EXCEPTION_TYPE ExceptionType,
1171 IN EFI_SYSTEM_CONTEXT SystemContext
1172 )
1173 {
1174 UINTN CpuIndex;
1175 UINTN PFEntry;
1176 BOOLEAN IsWpEnabled;
1177
1178 MpInitLibWhoAmI (&CpuIndex);
1179
1180 //
1181 // Clear last PF entries
1182 //
1183 IsWpEnabled = IsReadOnlyPageWriteProtected ();
1184 if (IsWpEnabled) {
1185 DisableReadOnlyPageWriteProtect ();
1186 }
1187
1188 for (PFEntry = 0; PFEntry < mPFEntryCount[CpuIndex]; PFEntry++) {
1189 if (mLastPFEntryPointer[CpuIndex][PFEntry] != NULL) {
1190 *mLastPFEntryPointer[CpuIndex][PFEntry] &= ~(UINT64)IA32_PG_P;
1191 }
1192 }
1193
1194 if (IsWpEnabled) {
1195 EnableReadOnlyPageWriteProtect ();
1196 }
1197
1198 //
1199 // Reset page fault exception count for next page fault.
1200 //
1201 mPFEntryCount[CpuIndex] = 0;
1202
1203 //
1204 // Flush TLB
1205 //
1206 CpuFlushTlb ();
1207
1208 //
1209 // Clear TF in EFLAGS
1210 //
1211 if (mPagingContext.MachineType == IMAGE_FILE_MACHINE_I386) {
1212 SystemContext.SystemContextIa32->Eflags &= (UINT32)~BIT8;
1213 } else {
1214 SystemContext.SystemContextX64->Rflags &= (UINT64)~BIT8;
1215 }
1216 }
1217
1218 /**
1219 Special handler for #PF exception, which will set the pages which caused
1220 #PF to be 'present'. The attribute of those pages should be restored in
1221 the subsequent #DB handler.
1222
1223 @param ExceptionType Exception type.
1224 @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
1225
1226 **/
1227 VOID
1228 EFIAPI
1229 PageFaultExceptionHandler (
1230 IN EFI_EXCEPTION_TYPE ExceptionType,
1231 IN EFI_SYSTEM_CONTEXT SystemContext
1232 )
1233 {
1234 EFI_STATUS Status;
1235 UINT64 PFAddress;
1236 PAGE_TABLE_LIB_PAGING_CONTEXT PagingContext;
1237 PAGE_ATTRIBUTE PageAttribute;
1238 UINT64 Attributes;
1239 UINT64 *PageEntry;
1240 UINTN Index;
1241 UINTN CpuIndex;
1242 UINTN PageNumber;
1243 BOOLEAN NonStopMode;
1244
1245 PFAddress = AsmReadCr2 () & ~EFI_PAGE_MASK;
1246 if (PFAddress < BASE_4KB) {
1247 NonStopMode = NULL_DETECTION_NONSTOP_MODE ? TRUE : FALSE;
1248 } else {
1249 NonStopMode = HEAP_GUARD_NONSTOP_MODE ? TRUE : FALSE;
1250 }
1251
1252 if (NonStopMode) {
1253 MpInitLibWhoAmI (&CpuIndex);
1254 GetCurrentPagingContext (&PagingContext);
1255 //
1256 // Memory operation cross page boundary, like "rep mov" instruction, will
1257 // cause infinite loop between this and Debug Trap handler. We have to make
1258 // sure that current page and the page followed are both in PRESENT state.
1259 //
1260 PageNumber = 2;
1261 while (PageNumber > 0) {
1262 PageEntry = GetPageTableEntry (&PagingContext, PFAddress, &PageAttribute);
1263 ASSERT(PageEntry != NULL);
1264
1265 if (PageEntry != NULL) {
1266 Attributes = GetAttributesFromPageEntry (PageEntry);
1267 if ((Attributes & EFI_MEMORY_RP) != 0) {
1268 Attributes &= ~EFI_MEMORY_RP;
1269 Status = AssignMemoryPageAttributes (&PagingContext, PFAddress,
1270 EFI_PAGE_SIZE, Attributes, NULL);
1271 if (!EFI_ERROR(Status)) {
1272 Index = mPFEntryCount[CpuIndex];
1273 //
1274 // Re-retrieve page entry because above calling might update page
1275 // table due to table split.
1276 //
1277 PageEntry = GetPageTableEntry (&PagingContext, PFAddress, &PageAttribute);
1278 mLastPFEntryPointer[CpuIndex][Index++] = PageEntry;
1279 mPFEntryCount[CpuIndex] = Index;
1280 }
1281 }
1282 }
1283
1284 PFAddress += EFI_PAGE_SIZE;
1285 --PageNumber;
1286 }
1287 }
1288
1289 //
1290 // Initialize the serial port before dumping.
1291 //
1292 SerialPortInitialize ();
1293 //
1294 // Display ExceptionType, CPU information and Image information
1295 //
1296 DumpCpuContext (ExceptionType, SystemContext);
1297 if (NonStopMode) {
1298 //
1299 // Set TF in EFLAGS
1300 //
1301 if (mPagingContext.MachineType == IMAGE_FILE_MACHINE_I386) {
1302 SystemContext.SystemContextIa32->Eflags |= (UINT32)BIT8;
1303 } else {
1304 SystemContext.SystemContextX64->Rflags |= (UINT64)BIT8;
1305 }
1306 } else {
1307 CpuDeadLoop ();
1308 }
1309 }
1310
1311 /**
1312 Initialize the Page Table lib.
1313 **/
1314 VOID
1315 InitializePageTableLib (
1316 VOID
1317 )
1318 {
1319 PAGE_TABLE_LIB_PAGING_CONTEXT CurrentPagingContext;
1320
1321 GetCurrentPagingContext (&CurrentPagingContext);
1322
1323 //
1324 // Reserve memory of page tables for future uses, if paging is enabled.
1325 //
1326 if (CurrentPagingContext.ContextData.X64.PageTableBase != 0 &&
1327 (CurrentPagingContext.ContextData.Ia32.Attributes &
1328 PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) != 0) {
1329 DisableReadOnlyPageWriteProtect ();
1330 InitializePageTablePool (1);
1331 EnableReadOnlyPageWriteProtect ();
1332 }
1333
1334 if (HEAP_GUARD_NONSTOP_MODE || NULL_DETECTION_NONSTOP_MODE) {
1335 mPFEntryCount = (UINTN *)AllocateZeroPool (sizeof (UINTN) * mNumberOfProcessors);
1336 ASSERT (mPFEntryCount != NULL);
1337
1338 mLastPFEntryPointer = (UINT64 *(*)[MAX_PF_ENTRY_COUNT])
1339 AllocateZeroPool (sizeof (mLastPFEntryPointer[0]) * mNumberOfProcessors);
1340 ASSERT (mLastPFEntryPointer != NULL);
1341 }
1342
1343 DEBUG ((DEBUG_INFO, "CurrentPagingContext:\n", CurrentPagingContext.MachineType));
1344 DEBUG ((DEBUG_INFO, " MachineType - 0x%x\n", CurrentPagingContext.MachineType));
1345 DEBUG ((DEBUG_INFO, " PageTableBase - 0x%x\n", CurrentPagingContext.ContextData.X64.PageTableBase));
1346 DEBUG ((DEBUG_INFO, " Attributes - 0x%x\n", CurrentPagingContext.ContextData.X64.Attributes));
1347
1348 return ;
1349 }
1350
EFI Development Kit II mirror for PVE